Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claims 8 is objected to because of the following informalities:
Claim 8 should depend on claim 1 since its original parent claim has been cancelled, and the claim should reflect the amendment in similar claim 19.
Appropriate correction is required.
Response to Amendment
This Office action is in response to Applicant' s communication filed 12/10/2025 in response to the Office action dated 7/10/2025. Claims 1-4, 9, 11-12, 14-17, and 19-23 have been amended. Claims 7 and 18 have been cancelled. Claims 1-6, 8-17, and 19-23 are pending in this application.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-6, 8-10, 12-17, 19-21, and 23 are rejected under 35 U.S.C. 103 as being unpatentable over Brigg (US 20210200441 A1) in view of Terek et al. (US 20100199109 A1), hereinafter Terek.
Regarding claim 1, Brigg teaches a method to improve object storage performance, comprising: linearly writing new data to at least one variable-sized data block (Paragraphs 51, 53, 60; Fig. 3, memory access [write] requests store data in consecutive [linear] variable length data blocks 202, 204, 206, and 208),
tracking each of said variable-sized data blocks by using respective Logical Block Addresses (Paragraphs 58-59; Fig. 4, memory 402 contains addressable variable length data blocks which can be accessed by a respective address), and
wherein said method provides single I/O access performance to any object so stored (Paragraph 53; Fig. 3, each packed block [object] requires only a single memory access request).
Brigg does not explicitly teach performing an atomic update on said at least one variable-sized data block.
However, Terek teaches performing an atomic update on said at least one variable-sized data block (Paragraphs 36, 41, 43, 52; Figs. 1 and 2, atomic record component 106 atomically replaces [updates] data records 206 on blocks 204).
Brigg and Terek are analogous art because they are in the same field of endeavor, that being storage block write management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the method of Brigg to further include the atomic update according to the teachings of Terek. The motivation for doing so would have been to provide data atomicity, improving database consistency (Terek, Paragraph 43).
Regarding claim 2, Brigg in view of Terek teaches the method according to claim 1, wherein said linearly writing new data is to at least two variable-sized data blocks (Brigg, Paragraphs 51, 53, 60; Fig. 3, consecutively [linearly] writing data to four variable-length data blocks 202, 204, 206, and 208),
wherein said at least two variable-sized data blocks are contiguous (Brigg, Paragraph 53; Fig. 3, data blocks 202, 204, 206, and 208 are packed contiguously).
Regarding claim 3, Brigg in view of Terek teaches the method according to claim 1, wherein said linearly writing new data is to at least two variable-sized data blocks (Brigg, Paragraphs 51, 53, 60; Fig. 3, consecutively [linearly] writing data to four variable-length data blocks 202, 204, 206, and 208),
wherein said at least two variable-sized data blocks are non-contiguous (Brigg, Paragraph 50; Fig. 2, variable length blocks 202, 204, 206, and 208 are stored non-contiguously on separate chunks).
Regarding claim 4, Brigg in view of Terek teaches the method according to claim 1, wherein said linearly writing new data is to at least two variable-sized data blocks (Brigg, Paragraphs 51, 53, 60; Fig. 3, consecutively [linearly] writing data to four variable-length data blocks 202, 204, 206, and 208),
wherein said at least two variable-sized data blocks are different sizes (Brigg, Paragraph 50; Fig. 2, variable length block 202 occupies around 196 bytes while block 206 occupies around 64 bytes).
Regarding claim 5, Brigg in view of Terek teaches the method according to claim 1, wherein the respective sizes of said variable-sized data blocks allocated are a power of two contiguous bytes (Brigg, Paragraph 51; Fig. 1, variable length data block may be up to 256 bytes).
Regarding claim 6, Brigg in view of Terek teaches the method according to claim 5, wherein, in said step of linearly writing, allocations of about one to about 32,768 bytes are made (Brigg, Paragraph 51, memory access [write] requests have a maximum size of 64 bytes).
Regarding claim 8, Brigg in view of Terek teaches the method according to claim 7, wherein said performing an atomic update is performed on a grouping (Terek, Paragraphs 36-37, 52; Figs. 1 and 2, atomic record component 106 performs an atomic update on a range of keys, which map to a range [grouping] of blocks 204)
of said variable sized data blocks (Brigg, Paragraph 54; Fig. 3, variable sized data blocks 202, 204, 206, and 208).
Regarding claim 9, Brigg in view of Terek teaches the method according to claim 8, wherein said grouping of said variable sized data blocks is contiguous (Brigg, Paragraph 53; Fig. 3, variable length blocks 202, 204, 206, and 208 are contiguous).
Regarding claim 10, Brigg in view of Terek teaches the method according to claim 8, wherein, within said grouping, at least two of said variable sized data blocks are non-contiguous (Brigg, Paragraph 50; Fig. 2, variable length blocks 202, 204, 206, and 208 are stored non-contiguously on separate chunks).
Regarding claim 12, Brigg teaches a storage device (Paragraphs 58-59; Fig. 4, memory device 402) comprising:
a plurality of variable-sized data blocks, each of said variable-sized data blocks having new data linearly written therein (Paragraphs 51, 53, 60; Fig. 3, memory access [write] requests store data in consecutive [linear] variable length data blocks 202, 204, 206, and 208);
a plurality of Logical Block Addresses, each of said Logical Block Addresses tracking respective variable-sized data blocks stored thereon (Paragraphs 58-59; Fig. 4, memory 402 contains addressable variable length data blocks which can be accessed by a respective address);
wherein said storage device provides single I/O access performance to any object so stored (Paragraph 53; Fig. 3, each packed block [object] requires only a single memory access request).
Brigg does not explicitly teach an atomic updater, said atomic updater performing an atomic update on at least one of said plurality of variable-sized data block.
However, Terek teaches an atomic updater, said atomic updater performing an atomic update on at least one of said plurality of variable-sized data block (Paragraphs 41, 43, 52; Figs. 1 and 2, atomic record component 106 [updater] atomically replaces [updates] data records 206 on blocks 204).
The Examiner notes that Brigg teaches the variable-sized data blocks while Terek teaches performing an atomic update on said data blocks.
Brigg and Terek are analogous art because they are in the same field of endeavor, that being storage block write management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the method of Brigg to further include the atomic update according to the teachings of Terek. The motivation for doing so would have been to provide data atomicity, improving database consistency (Terek, Paragraph 43).
Regarding claim 13, Brigg in view of Terek teaches the storage device according to claim 12, wherein at least two of said variable-sized data blocks are contiguous on said storage device (Brigg, Paragraphs 53, 58-59; Figs. 3 and 4, variable length blocks 202, 204, 206, and 208 are packed contiguously within memory 402).
Regarding claim 14, Brigg in view of Terek teaches the storage device according to claim 12, wherein at least two of said variable-sized data blocks are non-contiguous on said storage device (Brigg, Paragraphs 50, 58-59; Figs. 2 and 4, variable length blocks 202, 204, 206, and 208 are stored non-contiguously on separate chunks within memory 402).
Regarding claim 15, this is a storage device version of the claimed method discussed above (claim 4, respectively), wherein all claim limitations have also been addressed and/or covered in the cited areas as set forth above. Thus, accordingly, this claim is also obvious over Brigg in view of Terek.
Regarding claim 16, Brigg in view of Terek teaches the storage device according to claim 12, wherein the respective sizes of said variable-sized data blocks stored on said storage device have a size that is a power of two contiguous bytes (Brigg, Paragraphs 51, 58-59; Figs. 1 and 4, variable length data block within memory 402 may be up to 256 bytes).
Regarding claim 17, Brigg in view of Terek teaches the storage device according to claim 16, wherein the sizes of a respective variable-sized data block are about one to about 32,768 bytes (Brigg, Paragraph 51; Fig. 1, variable length data block may be up to 256 bytes).
Regarding claim 19, Brigg in view of Terek teaches the storage device according to claim 12, wherein said atomic update is performed on a grouping (Terek, Paragraphs 36-37, 52; Figs. 1 and 2, atomic record component 106 performs an atomic update on a range of keys, which map to a range [grouping] of blocks)
of said variable sized data blocks stored on said storage device (Brigg, Paragraphs 54, 58-59; Figs. 3 and 4, variable sized data blocks 202, 204, 206, and 208 stored on memory 402).
Regarding claim 20, Brigg in view of Terek teaches the storage device according to claim 19, wherein within said grouping at least two of said variable sized data blocks is contiguous (Brigg, Paragraph 53; Fig. 3, four variable length blocks 202, 204, 206, and 208 are contiguous).
Regarding claim 21, this is a storage device version of the claimed method discussed above (claim 10, respectively), wherein all claim limitations have also been addressed and/or covered in the cited areas as set forth above. Thus, accordingly, this claim is also obvious over Brigg in view of Terek.
Regarding claim 23, this is a storage system version of the claimed storage device discussed above (claim 12, respectively), in which Brigg in view of Terek also teaches a storage system (Brigg, Paragraph 58; Fig. 4, memory system 400)
comprising at least one storage device (Brigg, Paragraphs 58-59; Fig. 4, memory device 402).
The remaining claim limitations have been addressed and/or covered in cited areas as set forth above. Thus, accordingly, this claim is also obvious over Brigg in view of Terek.
Claims 11 and 22 are rejected under 35 U.S.C. 103 as being unpatentable over Brigg in view of Terek as applied to claims 8 and 19 above, and further in view of Johri et al. (US 20190004703 A1), hereinafter Johri.
Regarding claim 11, Brigg in view of Terek teaches the method according to claim 8, but does not explicitly teach wherein a plurality of header fields associated with said grouping contain subfields therein selected from the group consisting of: number of file items, number of active groups, number of allocated groups, permissions, timestamps, number of extents, array listing of Extent Logical Block Addresses, number of items in a group, array listing of item lengths within said group, and combinations thereof.
However, Johri teaches wherein a plurality of header fields associated with said grouping contain subfields therein selected from the group (Paragraphs 61-62, 65-66; Figs. 3 and 5, nodes 410 and 430, which manage groups of blocks, contain headers 415 and 435 and subsequent subfields 401-402, 411-412, and 421-422) consisting of:
number of file items, number of active groups, number of allocated groups, permissions, timestamps, number of extents, array listing of Extent Logical Block Addresses (Paragraphs 62, 120; Fig. 3, list of block pointers 401 indicate the addresses of blocks in an extent),
number of items in a group, and an array listing of item lengths within said group (Paragraph 62; Figs. 2 and 3, list of corresponding block size [item length] codes 402 of blocks within the node 410 [group]).
Brigg, Terek, and Johri are analogous art because they are in the same field of endeavor, that being storage block write management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the method of Brigg in view of Terek to further include the headers and subfields according to the teachings of Johri. The motivation for doing so would have been to improve the management of different sized blocks which increase allocation flexibility (Johri, Paragraphs 31, 40).
Regarding claim 22, this is a storage device version of the claimed method discussed above (claim 11, respectively), wherein all claim limitations have also been addressed and/or covered in the cited areas as set forth above. Thus, accordingly, this claim is also obvious over Brigg in view of Terek, further in view of Johri.
Response to Arguments
Applicant’s arguments (see page 6 of the remarks) filed 12/10/25, with respect to the rejections of claims 2-4, 11, and 22 under 35 U.S.C 112 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn.
Applicant’s arguments (see pages 6-8 of the remarks) filed 12/10/25, with respect to the rejections of claims 1-6, 12-17, and 23 under 35 U.S.C 102 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Brigg and Terek.
In regards to the Applicant’s argument that “Brigg… is inapposite to the present invention, as presently claimed, and is contrary to the paradigm of the applicant”, the Examiner respectfully disagrees. The specification of the current application recites that the invention relates to adding flexibility to block storage devices, better allocating logical block addresses by providing variable sized-sized blocks, and improving atomic updates (Paragraph 2). Brigg is reasonably pertinent since it seeks to solve a similar problem of improving the memory allocation and access performance of variable length data blocks in memory (Brigg, Paragraphs 1-3). Thus, the Examiner asserts that Brigg is analogous art to the claimed invention (See MPEP § 2141.01(a)(I)) and maintains the use of Brigg in the rejections above.
Applicant’s arguments (see pages 8-9 of the remarks) filed 12/10/25, with respect to the rejections of claims 7-11 and 18-22 under 35 U.S.C 103 have been fully considered, but are not persuasive.
The Applicant alleges that Terek fails to teach the limitation (or similar thereof): “performing an atomic update on at least one … data block” in claims 7 and 18 (whose subject matter has now been incorporated into claims 1 and 12, respectively). Specifically, the Applicant states that although the language of Terek is similar, it is unclear if the atomic update in Terek is relevant to the limitation.
Therefore, the Examiner submits that Terek performs, in the newly cited areas, an atomic update by replacing a data record within a data block as an atomic operation (Paragraphs 36, 41, 43, 52; Figs 1 and 2, atomically replacing records 206 in data blocks 204), updating the content of said data block. The Examiner argues that, under its broadest reasonable interpretation, the newly cited atomic replacement of Terek teaches the “atomic update” recited in the claims.
The Examiner further notes any arguments with respect to the deficiencies of the rejections of claims 7 and 18 are consummate in scope with the argument above. Thus, the Examiner maintains the rejections set forth above.
In regards to the Applicant’s argument with respect to the Johri reference only adding peripherally to the items in the Markush grouping in claims 11 and 22, the Examiner notes that in the event a Markush grouping reads on multiple species, only one species needs to be taught or suggested by the prior art in order to render the claim obvious. See, e.g., Fresenius USA, Inc. v. Baxter Int’l, Inc., 582 F.3d 1288, 1298, 92 USPQ2d 1163, 1171 (Fed. Cir. 2009). Thus, the Examiner maintains the rejections of claims 11 and 22 as set forth above.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Jason Pinga whose telephone number is (571) 272-2620. The examiner can normally be reached on M-F 8:30am-6pm ET.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Arpan Savla, can be reached on (571) 272-1077. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300.
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/J.M.P./Examiner, Art Unit 2137
/Arpan P. Savla/Supervisory Patent Examiner, Art Unit 2137