Office Action Predictor
Last updated: April 16, 2026
Application No. 18/787,407

IMAGING DEVICE INCLUDING A PHOTOELECTRIC CONVERTER AND A CAPACITIVE ELEMENT HAVING A DIELECTRIC FILM SANDWICHED BETWEEN ELECTRODES AND A MODE SWITCHING TRANSISTOR

Non-Final OA §DP
Filed
Jul 29, 2024
Examiner
PYO, KEVIN K
Art Unit
2878
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Panasonic Intellectual Property Management Co., LTD.
OA Round
1 (Non-Final)
87%
Grant Probability
Favorable
1-2
OA Rounds
2y 2m
To Grant
92%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allow Rate
746 granted / 857 resolved
+19.0% vs TC avg
Moderate +5% lift
Without
With
+5.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
27 currently pending
Career history
884
Total Applications
across all art units

Statute-Specific Performance

§101
1.5%
-38.5% vs TC avg
§103
43.2%
+3.2% vs TC avg
§102
32.9%
-7.1% vs TC avg
§112
18.1%
-21.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 857 resolved cases

Office Action

§DP
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-12 of U.S. Patent No. 12,080,732; and claims 1-18 of 11,670,652. Although the claims at issue are not identical, they are not patentably distinct from each other because the claimed invention of the instant application is a similar version of the claimed invention of the above identified U.S. patents with the similar intended scope. For example, the claims of the copending application differ from the claims of Murakami et al (U.S. 12,080,732) in that the claimed system of the copending application merely include well known features of a camera system comprising a lens that would have been an obvious design choice to one of ordinary skill in the art merely depending on the needs of particular application and involving only routine skill in the art. In addition, although the claims of Murakami et al (U.S. 11,670,652) do not recite the additional feature of a semiconductor substrate, the specific scheme and configuration utilized for an imaging device would have been obvious to one of ordinary skill in the art in view of meeting different design requirements and achieving the particular desired performance. Instant Application Patent No. 12,080,732 Claim 1. A camera system comprising: a lens; and an imaging device that receives a light through the lens; wherein the imaging device including: a semiconductor substrate; a photoelectric converter that is configured to convert the light into a signal charge and that is stacked on the semiconductor substrate; a node to which the signal charge is input; a transistor having a source and a drain, one of the source and the drain being connected to the node; and a capacitive element connected between the transistor and a voltage source or a ground, wherein the transistor is configured to switch between a first state and a second state, a sensitivity in the first state being different from a sensitivity in the second state, and in a cross-sectional view, the capacitive element is located between the semiconductor substrate and the photoelectric converter. Claim 1. An imaging device comprising: a semiconductor substrate; a photoelectric converter that converts incident light into a signal charge, the photoelectric converter being stacked on the semiconductor substrate; a node to which the signal charge is input; a transistor having a source and a drain, one of the source and the drain being connected to the node; and a capacitive element connected between the transistor and a voltage source or a ground, wherein the transistor is configured to switch between a first mode and a second mode, a sensitivity in the first mode being different from a sensitivity in the second mode, and in a cross-sectional view, the capacitive element is located between the semiconductor substrate and the photoelectric converter. Instant Application Patent No. 11,670,652 Claim 1. A camera system comprising: a lens; and an imaging device that receives a light through the lens; wherein the imaging device including: a semiconductor substrate; a photoelectric converter that is configured to convert the light into a signal charge and that is stacked on the semiconductor substrate; a node to which the signal charge is input; a transistor having a source and a drain, one of the source and the drain being connected to the node; and a capacitive element connected between the transistor and a voltage source or a ground, wherein the transistor is configured to switch between a first state and a second state, a sensitivity in the first state being different from a sensitivity in the second state, and in a cross-sectional view, the capacitive element is located between the semiconductor substrate and the photoelectric converter. Claim 1. An imaging device comprising: a photoelectric converter that converts incident light into a signal charge; a node to which the signal charge is input; a transistor having a source and a drain, one of the source and the drain being connected to the node; and a capacitive element including a first electrode, a second electrode and a dielectric film sandwiched between the first electrode and the second electrode, the first electrode being connected to the other of the source and the drain of the transistor, the second electrode being connected to a voltage source or a ground, wherein the transistor is configured to switch between a first mode and a second mode, a sensitivity in the first mode being different from a sensitivity in the second mode. It is noted that claims 2-20 of the present application correspond to claims 2-12 of U.S. Patent No. 12,080, 732; and claims 2-20 of the present application correspond to claims 2-18 of U.S. Patent No. 11,670,652. Allowable Subject Matter Claims 1-20 would be allowable if a timely filed terminal disclaimer would be submitted to overcome the outstanding double patenting rejection. The following is a statement of reasons for the indication of allowable subject matter: Regarding claims 1-20, while the prior art (i.e. Satou et al; US 2022/0109800) discloses the use of a substrate substrate, a photoelectric converter, a capacitor, and a transistor, it fails to disclose or make obvious a camera system comprising, in addition to the other recited features of the claim, the details and functions of a lens, a semiconductor substrate, a photoelectric converter, a node, a transistor and a capacitive element in the manner recited in claim 1, 7 or 13. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Satou et al (US 2022/0109800) is cited for disclosing an imaging device. Any inquiry concerning this communication or earlier communications from the examiner should be directed to KEVIN K PYO whose telephone number is (571)272-2445. The examiner can normally be reached 9:00-5:30 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Georgia Y Epps can be reached at 571-272-2328. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /KEVIN K PYO/Primary Examiner, Art Unit 2878
Read full office action

Prosecution Timeline

Jul 29, 2024
Application Filed
Jan 08, 2026
Non-Final Rejection — §DP
Apr 03, 2026
Response Filed

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
87%
Grant Probability
92%
With Interview (+5.3%)
2y 2m
Median Time to Grant
Low
PTA Risk
Based on 857 resolved cases by this examiner. Grant probability derived from career allow rate.

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