DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after allowance or after an Office action under Ex Parte Quayle, 25 USPQ 74, 453 O.G. 213 (Comm'r Pat. 1935). Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, prosecution in this application has been reopened pursuant to 37 CFR 1.114. Applicant's submission filed on 6/17/26 has been entered.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1 and 6-8 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by U.S. Patent 11,823,725 to WILKERSON et al.
Regarding claim 1, WILKERSON shows the claimed memory array in Fig. 1A as FE memory 101. He shows the claimed controller as controller logic 102. He specifically shows that his controller performs wear leveling for a pool of locations in memory using plural gap locations in the same pool in Fig. 12, described at column 17, lines 4-34. WILKERSON’s region 1 anticipates the claimed pool of memory locations since it has three gap locations in the same pool (region of memory).
Regarding claim 6, WILKERSON teaches that his gap pointers are stored in registers, as claimed, in column 10, lines 44-45.
Regarding claim 7, WILKERSON teaches that his start pointers are stored in registers, as claimed, in column 10, lines 44-45.
Regarding claim 8, WILKERSON’s device operates as claimed, using a first gap location to determine a second gap location as shown in Fig. 2A for example.
Allowable Subject Matter
Claims 2-4 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 9-20 are allowed.
Note
It is noted that any citations to specific pages, columns, lines, or figures in the prior art references and any interpretation of the reference should not be considered to be limiting in any way. A reference is relevant for all it contains and may be relied upon for all that it would have reasonably suggested to one having ordinary skill in the art. See MPEP § 2123.
Conclusion
Any inquiry concerning this Office action should be directed to the Examiner by phone at (571) 272-4214.
Any response to this Office action should be labeled appropriately (including serial number, Art Unit 2132, and type of response) and mailed to Commissioner for Patents, P.O. Box 1450, Alexandria, VA 22313-1450; hand-carried or delivered to the Customer Service Window at the Knox Building, 501 Dulany Street, Alexandria, VA 22314; faxed to (571) 273-8300; or filed electronically using the Patent Center.
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/Kevin Verbrugge/
Kevin Verbrugge
Primary Examiner
Art Unit 2132
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