/THA-O H BUI/Primary Examiner, Art Unit 2825 DETAILED ACTION
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 17 September 2026 has been entered.
Amendment
Acknowledgment is made of applicant’s Amendment, filed 17 September 2026. The changes and remarks disclosed therein have been considered.
No claims have been cancelled or added by the Amendment. Therefore, claims 1-20 are pending in the application.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-3 are rejected under 35 U.S.C. 103 as being unpatentable over Saenz et al (US 9,576,657 B1 hereinafter “Saenz”) in view of YOSHITOMI et al (US 2024/0266594 a1 hereinafter “Yoshitomi”).
Per MPEP 2111 and 2111.01, the claims are given their broadest reasonable interpretation and the words of the claims are given their plain meaning consistent with the specification without importing claim limitations from the specification.
Regarding Independent Claim 1, Saenz, for example in Figs. 1-5, discloses a memory device (e.g., Memory Bay 170; in Figs. 1C-1F related in Figs. 2-5), comprising:
a three-dimensional array of unit cells (e.g., 302a1; in Figa. 3A-3C related in Figs. 1-2, 4-5), each respective unit cell in the array (e.g., array 300a/300b/300c; in Figs. 3A-3C related in Figs. 1-2, 4-5) having a selector transistor (e.g., selector VR1; in Figs. 3A-3C related in Figs. 1-2, 4-5) and a memory cell having a phase-change material (e.g., reversible resistance-switching memory elements include a phase change material; in Figs. 1-2, 4 related in Figs. 3, 5).
However, Saennz is silent with regard to show wherein the respective unit cell further includes tow ionic liquid layers.
In the same field of endeavor, Yoshitomi, for example in Figs. 1-45, discloses wherein the respective unit cell (e.g., unit cell 100; in Figs. 1A, 2A, 3-4 related in Fis. 5-45) further includes two ionic liquid layers (e.g., the active material layers 111 and 113/113 and 117 may contain an ionic liquid instead of the solid; in Figs. 1A, 2A, 3-4 related in Fis. 5-45; see paragraph [0125+]).
It would have been obvious before the effective filling date of the claimed invention was made to a person having ordinary skill in the art to modify the teaching of Saenz such as memory cells including vertically oriented adjustable resistance structures (see for example in Figs. 1-5 of Saenz) by incorporating the teaching of Yoshitomi such as semiconductor device (see for example in Figs. 1-45 of Yoshitomi). In order to provide a memory cell with a memory element having a positive electrode active material and a first solid electrolyte, the negative electrode layer contains a negative electrode active material and a second solid electrolyte, the electrolyte layer contains a third solid electrolyte and an ionic liquid, and a space in the third solid electrolyte is impregnated with the ionic liquid (Yoshitomi, see abstract).
Regarding claim 2, the above Saenz/Yoshitomi, combination discloses wherein the phase-change material is sandwiched between the two ionic liquid layers (see for example in Figs. 4-5 related in Figs. 1-3 of Saenz and also see in Figs. 1A, 2A, 3-4 related in Fis. 5-45; see paragraph [0125+] of Yoshitomi, as discussed above).
Regarding claim 3, the above Saenz/Yoshitomi, combination discloses wherein the respective unit cell further includes two metal layers; and the two ionic liquid layers are sandwiched between the two metal layers (ee for example in Figs. 4-5 related in Figs. 1-3 of Saenz and also see in Figs. 1A, 2A, 3-4 related in Fis. 5-45; see paragraph [0125+] of Yoshitomi, as discussed above).
Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Grobis et al (US 10,355,049 B1 hereinafter “Grobis”) in view of Saenz et al (US 9,576,657 B1 hereinafter “Saenz”).
Per MPEP 2111 and 2111.01, the claims are given their broadest reasonable interpretation and the words of the claims are given their plain meaning consistent with the specification without importing claim limitations from the specification.
Regarding Independent Claim 12, Grobis, for example in Figs. 1-8, discloses an apparatus (see for example in Figs. 2A, 2C1, 2C2, 2C3 related in Figs. 1, 3-8), comprising:
a first local digit line (e.g., LBL11; in Figs. 2A, 2C1, 2C2, 2C3 related in Figs. 1, 3-8) configured to extend in a first direction (e.g., Z direction; in Figs. 2A, 2C1, 2C2, 2C3 related in Figs. 1, 3-8);
a second local digit line (e.g., LBL12; in Figs. 2A, 2C1, 2C2, 2C3 related in Figs. 1, 3-8) configured in parallel with the first local digit line (see for example in Figs. 2A, 2C1, 2C2, 2C3 related in Figs. 1, 3-8);
a plurality of unit cells (e.g., non-volatile memory cells M112-222; in Figs. 2A, 2B, 2C1, 2C2, 2C3 related in Figs. 1, 3-8) stacked in the first direction (see for example in Figs. 2A, 2C1, 2C2, 2C3 related in Figs. 1, 3-8) and sandwiched between
the first local digit line and the second local digit line (see for example in Figs. 2A, 2B, 2C1, 2C2, 2C3 related in Figs. 1, 3-8), each respective unit cell among the plurality of unit cells configured to connect the first local digit line to the second local digit line in a second direction (e.g., X direction; in Figs. 2A, 2B, 2C1, 2C2, 2C3 related in Figs. 1, 3-8) that is perpendicular to the first direction, the respective unit cell having a transistor and a memory cell (e.g., S as selector and R as reversible resistance-switching memory element; in Figs. 2A, 2C1, 2C2, 2C3 related in Figs. 1, 3-8); and
a plurality of wordlines (e.g., WL10-40; in Figs. 2A, 2C1, 2C2, 2C3 related in Figs. 1, 3-8) configured to extend in a third direction (e.g., Y direction; in Figs. 2A, 2C1, 2C2, 2C3 related in Figs. 1, 3-8) that is perpendicular to
the first direction and the second direction, wherein selectors in the plurality of unit cells are connected to the wordlines (see for example in Figs. 2A, 2C1, 2C2, 2C3 related in Figs. 1, 3-8).
However, Grobis is silent with regard to a selector transistor.
In the same field of endeavor, Saenz, for example in Figs. 1-5, discloses the memory cell included the memory element and a selector transistor (e.g., transistor VR1; in Figs. 3A, 3B, 3C related in Figs. 1-2, 4-5).
It would have been obvious before the effective filling date of the claimed invention was made to a person having ordinary skill in the art to modify the teaching of Grobis such as methods and apparatus for three-dimensional non-volatile memory (see for example in Figs. 1-8 of Grobis) by incorporating the teaching of Saenz such as memory cells including vertically oriented adjustable resistance structures (see for example in Figs. 1-5 of Saenz), for the purpose of controlling the memory cell that includes a vertically-oriented adjustable resistance structure including a control terminal coupled to a word line, and a reversible resistance-switching element coupled in series with and disposed above or below the vertically-oriented adjustable resistance structure (Saenz disclosed).
Claims 13-14 are rejected under 35 U.S.C. 103 as being unpatentable over Grobis et al (US 10,355,049 B1 hereinafter “Grobis”) in view of Saenz et al (US 9,576,657 B1 hereinafter “Saenz”) and further in view of YOSHITOMI et al (US 2024/0266594 A1 hereinafter “Yoshitomi”).
Per MPEP 2111 and 2111.01, the claims are given their broadest reasonable interpretation and the words of the claims are given their plain meaning consistent with the specification without importing claim limitations from the specification.
Regarding claim 13, the above Grobis/Saenz, combination discloses a first metal layer; a layer of phase-change material layer; and a second metal layer (see for example in Figs. 2A, 2C1, 2C2, 2C3 related in Figs. 1, 3-8 of Grobis and also see in Figs. 4-5 related in Figs. 1-3 of Saenz, as discussed above).
However, the above Grobis/Saenz are silent with regard to wherein the memory cell includes: a first ionic liquid layer; a second ionic liquid layer (e.g., the active material layers 111 and 113/113 and 117 may contain an ionic liquid instead of the solid; in Figs. 1A, 2A, 3-4 related in Fis. 5-45; see paragraph [0125+]).
It would have been obvious before the effective filling date of the claimed invention was made to a person having ordinary skill in the art to modify the teaching of Grobis such as methods and apparatus for three-dimensional non-volatile memory (see for example in Figs. 1-8 of Grobis) and the teaching of Saenz such as memory cells including vertically oriented adjustable resistance structures (see for example in Figs. 1-5 of Saenz) by incorporating the teaching of Yoshitomi such as semiconductor device (see for example in Figs. 1-45 of Yoshitomi). In order to provide a memory cell with a memory element having a positive electrode active material and a first solid electrolyte, the negative electrode layer contains a negative electrode active material and a second solid electrolyte, the electrolyte layer contains a third solid electrolyte and an ionic liquid, and a space in the third solid electrolyte is impregnated with the ionic liquid (Yoshitomi, see abstract).
Regarding claim 14, the above Grobis/Saenz/Yoshitomi, combination discloses wherein the first metal layer, the first ionic liquid layer, the layer of the phase-change material, the second ionic liquid layer, and the second metal layer are stacked in the second direction (see for example in Figs. 2A, 2C1, 2C2, 2C3 related in Figs. 1, 3-8 of Grobis within Figs. 4-5 related in Figs. 1-3 of Saenz and also see in Figs. 1A, 2A, 3-4 related in Fis. 5-45; see paragraph [0125+] of Yoshitomi, as discussed above)
Allowable Subject Matter
Claims 4-11, 15-16 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 4, the prior arts of record fail to teach or suggest a memory device as recited in claim 4, and particularly, wherein the selector transistor included: a channel of a first type of material sandwich between two regions of a second type of material, the channel extending in a second direction to be in contact with one of the two metal layers of the memory cell.
Regarding claim 15, the prior arts of record fail to teach or suggest an apparatus as recited in claim 15, and particularly, further comprising: one or more dielectric regions positioned between a plurality of groups of unit cells in the plurality of unit cells; wherein each respective group of the plurality of groups has multiple unit cells that are not separated by a dielectric region.
Claims 17-20 are allowed.
The following is an examiner’s statement of reasons for allowance:
The prior art made of record and considered pertinent to the applicant’s disclosure does not teach or suggest the claimed limitations. Grobis et al (US 10,355,049 B1 hereinafter “Grobis”) and Saenz et al (US 9,576,657 B1 hereinafter “Saenz”), taken individually or in combination, do not teach the claimed invention having the following limitations, in combination with the remaining claimed limitations:
Regarding Independent claim 17, there is no teaching, suggestion, or motivation for combination in the prior art to the step of applying, to a plurality of wordlines connected to transistors in the plurality of unit cells, voltages representative of input data to cause a current in the first local digit line to be representative of a sum of the input data multiplied by the weight data; connecting, via a select device stacked on top of the plurality of unit cells, the current in the first local digit line to a global digit line; and determining, via an analog to digit convert connected to the global digit line, the sum from measuring the current as a multiple of a predetermined amount of current, in combination with the other limitations in the claim.
Response to Arguments
Applicant’s arguments with respect to claim(s) 17 September 2026 have been considered but are moot because the new ground of rejection is made in view of Saenz et al (US 9,576,657 B1 hereinafter “Saenz”) and YOSHITOMI et al (US 2024/0266594 a1 hereinafter “Yoshitomi”).
In response to applicant’s argument against the references individually, one cannot show nonobviousness by attacking references individually where the rejections are based on combinations of references. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981); In re Merck & Co., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986).
Conclusion
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THA-O H BUI/Primary Examiner, Art Unit 2825 09/28/2026
