Prosecution Insights
Last updated: April 19, 2026
Application No. 18/788,328

SENSING CIRCUIT AND OPTICAL SENSOR

Non-Final OA §102§103
Filed
Jul 30, 2024
Examiner
TABA, MONICA TERESA
Art Unit
2878
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Rohm Co. Ltd.
OA Round
1 (Non-Final)
90%
Grant Probability
Favorable
1-2
OA Rounds
2y 2m
To Grant
95%
With Interview

Examiner Intelligence

Grants 90% — above average
90%
Career Allow Rate
171 granted / 191 resolved
+21.5% vs TC avg
Moderate +5% lift
Without
With
+5.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
30 currently pending
Career history
221
Total Applications
across all art units

Statute-Specific Performance

§101
0.8%
-39.2% vs TC avg
§103
54.8%
+14.8% vs TC avg
§102
27.1%
-12.9% vs TC avg
§112
13.0%
-27.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 191 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Drawings Figures 1-6 should be designated by a legend such as --Prior Art-- because only that which is old is illustrated. See MPEP § 608.02(g). Corrected drawings in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. The replacement sheet(s) should be labeled “Replacement Sheet” in the page header (as per 37 CFR 1.84(c)) so as not to obstruct any portion of the drawing figures. If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1 and 10 are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by Japanese Patent Publication No. 2004/144734 ("Isao"). Regarding claim 1, Isao discloses a sensing circuit comprising: an integrator (24, Fig. 12) configured to generate an analog output signal (qΣ, Fig. 12) by integrating an analog input signal (q, Figs. 12-13, paragraph [0091]); an analog/digital converter (25, Fig. 12) configured to convert the analog output signal into a digital output signal (qd, Figs. 12, 14, paragraphs [0096], [0098]); and a controller (26, Fig. 12) configured to discharge the analog output signal (paragraph [0099]) when, during an integration period of the integrator (24, Fig. 12, paragraphs [0093], [0100] –[0101], steps S1-S4, Fig. 15 are repeated within a certain period until there is a sufficient amount to take the average value, under the broadest reasonable interpretation, this period is the integration period), the digital output signal (qd, Figs. 12, 14) reaches a first threshold value (k, paragraphs [0096]-[0098]). Regarding claim 10, Isao discloses an optical sensor comprising: a light-sensing element (20 PMT, Fig. 12) configured to generate a light sense signal (output current q, Fig. 12, see paragraphs [0089]-[0090]); and the sensing circuit (Fig. 12) according to claim 1, configured to receive the light sense signal (q, Fig. 12) as the analog input signal (q is analog signal to be integrated by the analog integrator 24, Figs. 12-12, paragraph [0091]). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Isao in view of U.S. Patent Publication No. 2020/0375484 ("Lin"). Regarding claim 3, Isao discloses the sensing circuit according to claim 1, but does not disclose the specific details of the integrator. However, Lin discloses an integrator includes: an operational amplifier (IA, Fig. 3A) configured to have an inverting input terminal connected to an application terminal for the analog input signal (see Fig. 3A, paragraph [0056]), a non-inverting input terminal connected to an application terminal for a bias voltage (VREF, Fig. 3A), and an output terminal connected to an application terminal for the analog output signal (INT_VOUT, Fig. 3A); an integral capacitance (Cint, Fig. 3A) configured to be connected between the inverting input terminal and the output terminal of the operational amplifier (see Fig. 3A); and a discharge switch (RESET, Fig. 3A) configured to be connected in parallel with the integral capacitance (Cint, Fig. 3A). It would have been obvious to one of ordinary skill in the art before the effective filing date to arrange the integrator as disclosed by Lin in the device of Isao in order to be able to reset the integrator and avoid long-term saturation. Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Isao in view of U.S. Patent Publication No. 2021/0376850 ("Mudegowdar"). Regarding claim 9, Isao discloses the sensing circuit according to claim 1, but does not disclose that the analog/digital converter is of a successive-approximation-register type. However, Mudegowdar discloses analog/digital converter is of a successive-approximation-register type (see Fig. 3, paragraph [0018]). It would have been an obvious matter of design choice to one of ordinary skill in the art before the effective filing date to use a SAR-type analog/digital converter as disclosed by Mudegowdar in the device of Isao in order to provide a fast, low-power digitization with simple logic. Allowable Subject Matter Claims 2, and 4-8 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Regarding claim 2, the invention as claimed, specifically in combination with: the controller generates integral value data by adding up a signal value of the digital output signal immediately before discharging of the analog output signal and a signal value of the digital output signal immediately before an end of the integration period, is not taught or made obvious by the prior art of record. Regarding claims 4-8, the invention as claimed, specifically in combination with: the controller calculates a first average value of the digital output signal at a lapse of a predetermined time after turning off the discharge switch and calculates a second average value of the digital output signal immediately before discharging of the analog output signal or immediately before an end of the integration period, the controller taking a difference value obtained by subtracting the first average value from the second average value as a signal value of the digital output signal immediately before the discharging of the analog output signal or immediately before the end of the integration period, is not taught or made obvious by the prior art of record. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MONICA T. TABA whose telephone number is (571)272-1583. The examiner can normally be reached Monday - Friday 9 am - 6 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Georgia Epps can be reached at 571-272-2328. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MONICA T TABA/Examiner, Art Unit 2878
Read full office action

Prosecution Timeline

Jul 30, 2024
Application Filed
Feb 11, 2026
Non-Final Rejection — §102, §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
90%
Grant Probability
95%
With Interview (+5.3%)
2y 2m
Median Time to Grant
Low
PTA Risk
Based on 191 resolved cases by this examiner. Grant probability derived from career allow rate.

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