MICRO LED AND MICRO LED DISPLAY PANEL

Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Acknowledgment is made of applicant's claim for foreign priority based on an application filed in China on July 31, 2023. It is noted, however, that applicant has not filed a certified copy of the PCT/CN2023/110279 application as required by 37 CFR 1.55. Information Disclosure Statement The information disclosure statements (IDS) submitted on July 30, 2024, and May 19, 2025, were filed. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1-3, 6-7, and 11-13 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1 and 8-15 of copending Application No. 18/789,624 (reference application). The claims at issue are identical, but limitations within the claimed invention are scattered in various independent and dependent claims of the co-pending application. For example, independent claim 1’s limitations are spread between claim 1, 8-9, and 14 of the co-pending application. For other claims, see the table below. Claimed Invention 18/789,624 1. A micro LED comprising: a bonding layer; an N type semiconductor layer formed on the bonding layer; a light emitting layer formed on the N type semiconductor layer; a P type semiconductor layer formed on the light emitting layer; and a top conductive layer formed on the P type semiconductor layer; wherein the bonding layer comprises: a first metal bonding layer; a second metal bonding layer bonded with the N type semiconductor layer; and a transparent bonding layer formed between the first metal bonding layer and the second metal bonding layer; wherein the second metal bonding layer is semi-transparent. 1. A micro LED comprising: a bonding layer; an N type semiconductor layer formed on the bonding layer, a light emitting layer formed on the N type semiconductor layer; and a P type semiconductor layer formed on the light emitting layer… 8. The micro LED according to claim 1, wherein the bonding layer comprises: a first metal bonding layer; a second metal bonding layer bonded with the N type semiconductor layer; and a transparent bonding layer formed between the first metal bonding layer and the second metal bonding layer… 9. The micro LED according to claim 8, wherein the second metal bonding layer is semi-transparent. 14. The micro LED display panel according to claim 13, wherein respective top conductive layers of the plurality of micro LEDs are interconnected. While claims 1, 8, and 9 do not reference claim 14, it is obvious to add the top conductive layers of claim 14 to claims 1, 8, and 9. 2. A micro LED according to claim 1, wherein the second metal bonding layer is AuGe. 10. The micro LED according to claim 8, wherein material of the second metal bonding layer is AuGe. 3. A micro LED according to claim 1, wherein a thickness of the second metal bonding layer is less than the thickness of the transparent bonding layer. 11. The micro LED according to claim 8, wherein a thickness of the second metal bonding layer is less than a thickness of the transparent bonding layer. 6. The micro LED according to claim 1, wherein an inclined angle of a sidewall of the P type semiconductor layer, the light emitting layer, and the N type semiconductor layer is greater than 85 degrees. 12. The micro LED according to claim 1, wherein an inclined angle of a sidewall of the P type semiconductor layer, the light emitting layer, and the N type semiconductor layer is greater than 85 degrees. 7. The micro LED according to claim 1, wherein a thickness of the transparent bonding layer is one fourth of a wavelength of light emitted by the light emitting layer. 8. … wherein a thickness of the transparent bonding layer is one fourth of a wavelength of light emitted by the light emitting layer. 11. A micro LED display panel comprises: an integrated circuit (IC) backplane comprising a bottom pad array, the bottom pad array comprising a plurality of conductive bottom pads; and a micro LED array formed on the IC backplane, the micro LED array comprising a plurality of micro LEDs; wherein one micro LED of the plurality of micro LEDs is electrically connected with one bottom pad of the plurality of conductive bottom pads; and the micro LED comprises: a bonding layer; an N type semiconductor layer formed on the bonding layer; a light emitting layer formed on the N type semiconductor layer; a P type semiconductor layer formed on the light emitting layer; and a top conductive layer formed on the P type semiconductor layer; wherein the bonding layer comprises: a first metal bonding layer; a second metal bonding layer bonded with the N type semiconductor layer; and a transparent bonding layer formed between the first metal bonding layer and the second metal bonding layer; wherein the second metal bonding layer is semi-transparent. 13. A micro LED display panel comprising: an integrated circuit (IC) backplane comprising a bottom pad array, the bottom pad array comprising a plurality of conductive bottom pads; and a micro LED array formed on the IC backplane, the micro LED array comprising a plurality of micro LEDs; wherein one micro LED of the plurality of micro LEDs is electrically connected with one bottom pad of the plurality of conductive bottom pads; and the micro LED comprises: a bonding layer; an N type semiconductor layer formed on the bonding layer, a light emitting layer formed on the N type semiconductor layer; and a P type semiconductor layer formed on the light emitting layer... 8. The micro LED according to claim 1, wherein the bonding layer comprises: a first metal bonding layer; a second metal bonding layer bonded with the N type semiconductor layer; and a transparent bonding layer formed between the first metal bonding layer and the second metal bonding layer… While claim 8 doesn’t reference claim 13, it would be obvious to replace the bonding layer of claim 13 with the bonding layer of claim 8. 14. The micro LED display panel according to claim 13, wherein respective top conductive layers of the plurality of micro LEDs are interconnected. 12. The micro LED display panel according to claim 11, wherein respective top conductive layers of the plurality of micro LEDs are interconnected. 14. The micro LED display panel according to claim 13, wherein respective top conductive layers of the plurality of micro LEDs are interconnected. 13. The micro LED display panel according to claim 12, wherein the IC backplane further comprises a top connected pad, and the respective top conductive layers are connected with the top connected pad of the IC backplane. 15. The micro LED display panel according to claim 14, wherein the IC backplane further comprises a top connected pad, and the respectively top conductive layers are connected with the top connected pad of the IC backplane. Claims 1-3 and 6-13 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1 and 4-13 of copending Application No. 18/789,585 (reference application). The claims at issue are identical, but limitations within the claimed invention are scattered in various independent and dependent claims of the co-pending application. For example, independent claim 1’s limitations are spread between claim 1, 4, and 12 of the co-pending application. For other claims, see the table below. Claimed Invention 18/789,585 1. A micro LED comprising: a bonding layer; an N type semiconductor layer formed on the bonding layer; a light emitting layer formed on the N type semiconductor layer; a P type semiconductor layer formed on the light emitting layer; and a top conductive layer formed on the P type semiconductor layer; wherein the bonding layer comprises: a first metal bonding layer; a second metal bonding layer bonded with the N type semiconductor layer; and a transparent bonding layer formed between the first metal bonding layer and the second metal bonding layer; wherein the second metal bonding layer is semi-transparent. 1. A micro LED comprising: a bonding layer; an N type semiconductor layer formed on the bonding layer; a light emitting layer formed on the N type semiconductor layer; and a P type semiconductor layer formed on the light emitting layer; wherein the bonding layer comprises: a first metal bonding layer; a second metal bonding layer bonded with the N type semiconductor layer; and a transparent bonding layer formed between the first metal bonding layer and the second metal bonding layer… 4. The micro LED according to claim 1, wherein the second metal bonding layer is semi-transparent. 12. The micro LED display panel according to claim 11, wherein respective top conductive layers of the plurality of micro LEDs are interconnected. While claims 1 and 4 do not reference claim 12, it is obvious to add the top conductive layers of claim 12 to claims 1 and 4. 2. A micro LED according to claim 1, wherein the material of the second metal bonding layer is AuGe. 5. The micro LED according to claim 4, wherein material of the second metal bonding layer is AuGe. 3. A micro LED according to claim 1, wherein a thickness of the second metal bonding layer is less than the thickness of the transparent bonding layer. 6. The micro LED according to claim 4, wherein a thickness of the second metal bonding layer is less than a thickness of the transparent bonding layer. 6. The micro LED according to claim 1, wherein an inclined angle of a sidewall of the P type semiconductor layer, the light emitting layer, and the N type semiconductor layer is greater than 85 degrees. 7. The micro LED according to claim 1, wherein an inclined angle of a sidewall of the P type semiconductor layer, the light emitting layer, and the N type semiconductor layer is greater than 85 degrees. 7. The micro LED according to claim 1, wherein a thickness of the transparent bonding layer is one fourth of a wavelength of light emitted by the light emitting layer. 1. …wherein a thickness of the transparent bonding layer is one fourth of a wavelength of light emitted by the light emitting layer. 8. The micro LED according to claim 1, wherein the N type semiconductor layer further comprises: a doped N type contact layer formed on the bonding layer; and an N type cladding layer formed on the doped N type contact layer, wherein the N type cladding layer comprises a distributed Bragg reflection (DBR) structure. 8. The micro LED according to claim 1, wherein the N type semiconductor layer further comprises: a doped N type contact layer formed on the bonding layer; and an N type cladding layer formed on the doped N type contact layer, wherein the N type cladding layer comprises a distributed Bragg reflection (DBR) structure. 9. The micro LED according to claim 8, wherein the DBR structure comprises a plurality of first layers and a plurality of second layers, the plurality of first layers and the plurality of second layers being alternately layered. 9. The micro LED according to claim 8, wherein the DBR structure comprises a plurality of first layers and a plurality of second layers, the plurality of first layers and the plurality of second layers being alternately layered. 10. The micro LED according to claim 9, wherein materials of the plurality of first layers and the plurality of second layers are AlInP and AlGaInP, respectively, or AIGaAs and AlAs, respectively. 10. The micro LED according to claim 9, wherein materials of the plurality of first layers and the plurality of second layers are AlInP and AlGaInP, respectively, or AIGaAs and AlAs, respectively. 11. A micro LED display panel comprises: an integrated circuit (IC) backplane comprising a bottom pad array, the bottom pad array comprising a plurality of conductive bottom pads; and a micro LED array formed on the IC backplane, the micro LED array comprising a plurality of micro LEDs; wherein one micro LED of the plurality of micro LEDs is electrically connected with one bottom pad of the plurality of conductive bottom pads; and the micro LED comprises: a bonding layer; an N type semiconductor layer formed on the bonding layer; a light emitting layer formed on the N type semiconductor layer; a P type semiconductor layer formed on the light emitting layer; and a top conductive layer formed on the P type semiconductor layer; wherein the bonding layer comprises: a first metal bonding layer; a second metal bonding layer bonded with the N type semiconductor layer; and a transparent bonding layer formed between the first metal bonding layer and the second metal bonding layer; wherein the second metal bonding layer is semi-transparent. 11. A micro LED display panel comprises: an integrated circuit (IC) backplane comprising a bottom pad array, the bottom pad array comprising a plurality of conductive bottom pads; and a micro LED array formed on the IC backplane, the micro LED array comprising a plurality of micro LEDs; wherein one micro LED of the plurality of micro LEDs is electrically connected with one bottom pad of the plurality of conductive bottom pads; and the micro LED comprises: a bonding layer; an N type semiconductor layer formed on the bonding layer; a light emitting layer formed on the N type semiconductor layer; and a P type semiconductor layer formed on the light emitting layer; wherein the bonding layer comprises: a first metal bonding layer; a second metal bonding layer bonded with the N type semiconductor layer; and a transparent bonding layer formed between the first metal bonding layer and the second metal bonding layer… 4. The micro LED according to claim 1, wherein the second metal bonding layer is semi-transparent. While claim 4 doesn’t reference claim 11, it would be obvious to replace the second metal bonding layer of claim 11 with the second metal bonding layer of claim 4. 12. The micro LED display panel according to claim 11, wherein respective top conductive layers of the plurality of micro LEDs are interconnected. 12. The micro LED display panel according to claim 11, wherein respective top conductive layers of the plurality of micro LEDs are interconnected. 13. The micro LED display panel according to claim 12, wherein the IC backplane further comprises a top connected pad, and the respective top conductive layers are connected with the top connected pad of the IC backplane. 13. The micro LED display panel according to claim 12, wherein the IC backplane further comprises a top connected pad, and the respectively top conductive layers are connected with the top connected pad of the IC backplane. Claims 1-3 and 6-13 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1 and 4-13 of copending Application No. 18/789,603 (reference application). The claims at issue are identical, but limitations within the claimed invention are scattered in various independent and dependent claims of the co-pending application. For example, independent claim 1’s limitations are spread between claim 1, 4-5, and 10 of the co-pending application. For other claims, see the table below. Claimed Invention 18/789,603 1. A micro LED comprising: a bonding layer; an N type semiconductor layer formed on the bonding layer; a light emitting layer formed on the N type semiconductor layer; a P type semiconductor layer formed on the light emitting layer; and a top conductive layer formed on the P type semiconductor layer; wherein the bonding layer comprises: a first metal bonding layer; a second metal bonding layer bonded with the N type semiconductor layer; and a transparent bonding layer formed between the first metal bonding layer and the second metal bonding layer; wherein the second metal bonding layer is semi-transparent. 1. A micro LED comprising: a bonding layer; an N type semiconductor layer formed on the bonding layer…; a light emitting layer formed on the N type semiconductor layer; and a P type semiconductor layer formed on the light emitting layer… 4. The micro LED according to claim 1, wherein the bonding layer comprises: a first metal bonding layer; a second metal bonding layer bonded with the N type semiconductor layer; and a transparent bonding layer formed between the first metal bonding layer and the second metal bonding layer… 5. The micro LED according to claim 4, wherein the second metal bonding layer is semi-transparent. 10. The micro LED display panel according to claim 9, wherein respective top conductive layers of the plurality of micro LEDs are interconnected. While claims 1, 4 and 5 do not reference claim 10, it is obvious to add the top conductive layers of claim 10 to claims 1, 4, and 5. 2. A micro LED according to claim 1, wherein the material of the second metal bonding layer is AuGe. 6. The micro LED according to claim 5, wherein material of the second metal bonding layer is AuGe. 3. A micro LED according to claim 1, wherein a thickness of the second metal bonding layer is less than the thickness of the transparent bonding layer. 7. The micro LED according to claim 4, wherein a thickness of the second metal bonding layer is less than a thickness of the transparent bonding layer. 6. The micro LED according to claim 1, wherein an inclined angle of a sidewall of the P type semiconductor layer, the light emitting layer, and the N type semiconductor layer is greater than 85 degrees. 8. The micro LED according to claim 1, wherein an inclined angle of a sidewall of the P type semiconductor layer, the light emitting layer, and the N type semiconductor layer is greater than 85 degrees. 7. The micro LED according to claim 1, wherein a thickness of the transparent bonding layer is one fourth of a wavelength of light emitted by the light emitting layer. 4. …wherein a thickness of the transparent bonding layer is one fourth of a wavelength of light emitted by the light emitting layer. 11. A micro LED display panel comprises: an integrated circuit (IC) backplane comprising a bottom pad array, the bottom pad array comprising a plurality of conductive bottom pads; and a micro LED array formed on the IC backplane, the micro LED array comprising a plurality of micro LEDs; wherein one micro LED of the plurality of micro LEDs is electrically connected with one bottom pad of the plurality of conductive bottom pads; and the micro LED comprises: a bonding layer; an N type semiconductor layer formed on the bonding layer; a light emitting layer formed on the N type semiconductor layer; a P type semiconductor layer formed on the light emitting layer; and a top conductive layer formed on the P type semiconductor layer; wherein the bonding layer comprises: a first metal bonding layer; a second metal bonding layer bonded with the N type semiconductor layer; and a transparent bonding layer formed between the first metal bonding layer and the second metal bonding layer; wherein the second metal bonding layer is semi-transparent. 9. A micro LED display panel comprising: an integrated circuit (IC) backplane comprising a bottom pad array, the bottom pad array comprising a plurality of conductive bottom pads; and a micro LED array formed on the IC backplane, the micro LED array comprising a plurality of micro LEDs; wherein one micro LED of the plurality of micro LEDs is electrically connected with one bottom pad of the plurality of conductive bottom pads; wherein the micro LED comprises: a bonding layer; an N type semiconductor layer formed on the bonding layer…; a light emitting layer formed on the N type semiconductor layer; and a P type semiconductor layer formed on the light emitting layer… 4. The micro LED according to claim 1, wherein the bonding layer comprises: a first metal bonding layer; a second metal bonding layer bonded with the N type semiconductor layer; and a transparent bonding layer formed between the first metal bonding layer and the second metal bonding layer… 5. The micro LED according to claim 4, wherein the second metal bonding layer is semi-transparent. While claims 4 and 5 don’t reference claim 11, it would be obvious to replace the bonding layer of claim 11 with the bonding layer of claims 4 and 5. 12. The micro LED display panel according to claim 11, wherein respective top conductive layers of the plurality of micro LEDs are interconnected. 10. The micro LED display panel according to claim 9, wherein respective top conductive layers of the plurality of micro LEDs are interconnected. 13. The micro LED display panel according to claim 12, wherein the IC backplane further comprises a top connected pad, and the respective top conductive layers are connected with the top connected pad of the IC backplane. 11. The micro LED display panel according to claim 10, wherein the IC backplane further comprises a top connected pad, and the respectively top conductive layers are connected with the top connected pad of the IC backplane. This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented. Allowable Subject Matter Claims 4 and 5 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Zhu et al. (US 20250031488 A1), Li et al. (US 20240421178 A1), Li et al. (US 20240072202 A1), and Lin et al. (US 20210345456 A1) are all cited to teach aspects of the micro LED as well as the metal bonding layers. Gu et al. (US 20250048794 A1) and Gu et al. (US 20250048820 A1) are all cited to teach micro LEDs very similar to the claimed invention. Any inquiry concerning this communication or earlier communications from the examiner should be directed to MATTHEW SHEN whose telephone number is (571)272-0642. The examiner can normally be reached M-Th 0730-1730. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jacob Choi can be reached at (469) 295-9060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MATTHEW L SHEN/Examiner, Art Unit 2897 /JACOB Y CHOI/Supervisory Patent Examiner, Art Unit 2897