DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-10 are pending in this application. Claims 1 and 6 are amended.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) was submitted on 07/31/24. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Response to Amendment
The amendment to the drawing and addition of Figure 8 is sufficient to overcome the drawing objection of the previous office action, therefore the objection is withdrawn.
The amendments to claims 1 and 6 appear to be for clarity in rearranging the limitation to start with an action and end with a result. However, the amendment is not sufficient to overcome the prior art indicated in the previous office action.
Drawings
The drawings were received on 06/18/26. The drawings are acceptable.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-3, 5-8 and 10 are rejected under 35 U.S.C. 102(a)(1) and 102 (a)(2) as being anticipated by Choi (US 20140043865 A1).
Regarding claims 1 and 6, Choi discloses a method for controlling a resonant circuit (abstract), wherein the resonant circuit (fig 1, resonant converter system 100) comprises: a primary switching circuit (fig 1, Vin, Q1 and Q2), configured to receive an input voltage (fig 1, Vin); a resonant branch, comprising a capacitor and an inductor connected in series (fig 1, capacitor Cr and inductor Lr connected in series); a transformer, comprising a primary winding and a secondary winding (fig 1, transformer 108), wherein the resonant branch is connected between the primary switching circuit and the primary winding (fig 1, capacitor Cr and inductor Lr connected in series are connected between primary winding of transformer 108 and switches Q1 and Q2); and a secondary switching circuit (fig 1, SR1, SR2, SR control circuitry 110 and 112 on secondary side 104), connected to the secondary winding and configured to provide an output voltage to a load (fig 1, see connection to secondary winding of transformer 108 on secondary side 104 and output voltage VOUT), wherein the secondary switching circuit comprises a synchronous rectifier switch (fig 1, synchronous rectifier switches SR1 and SR2), and the synchronous rectifier switch comprises a body diode (fig 1, see body diodes biased in a source to drain direction of SR1 and SR2); a controller, configured to change a switching frequency of the resonant circuit by adjusting a conduction time of the body diode in different working periods (par [0016] SR control circuitry 110 and 112 are configured to generate gate control signals to control the conduction of SR2 and SR1, respectively, so that the body diode conduction time is minimized and so that negative current across the SR switches is reduced; minimizing the conduction time is considered “adjusting”; par [0020] “to minimize the period of time that the body diode is conducting”).
Regarding claims 2 and 7, Choi discloses the method according to claim 1 and 6, wherein the controller is configured to: adjust, in the different working periods, the conduction time of the body diode to cause the switching frequency of the resonant circuit to change comprises: adjusting, in the different working periods, the conduction time of the body diode to cause the switching frequency of the resonant circuit to periodically change (fig 3 and par [0021] describe nth and nth+1 conduction cycles and the control circuitry 110 and 112 of fig 2 react to the signals in conduction cycles to implement an adjustment of the conduction of the body diode iteratively; cyclic is considered periodic).
Regarding claims 3 and 8, Choi discloses the method according to claim 2 and 7, wherein a conduction control signal of the body diode is a periodically changing signal, and a period of the periodically changing signal is greater than a working period (as can be seen in fig 3 and described in pars [0017] – [0021], the gate controllers 110 and 112 are configured to iteratively add or subtract delay to or from the gate drive signals in order to control the conduction time of the SR switch and conduction time of the body diode utilizing SR conduction signal 209 and determine the time difference between the end of the clock signal and the end of the SR conduction signal 209; the nth cycle 320 and next conduction cycle 322 of the predictive gate control signal 213 (VPRD) period shown in fig 3 is greater than a single “working” or switching period).
Regarding claims 5 and 10, Choi discloses the method according to claim 1 and 6, wherein the resonant circuit is electrically connected to a pre-stage circuit, and an output of the pre-stage circuit is connected to an input of the resonant circuit (fig 1, oscillator and gate control circuitry 106 electrically connected to switches Q1 and Q2), and the controller is configured to: in a case where an input voltage of the pre-stage circuit is in a direct current form, or in a case where the input voltage of the pre-stage circuit is in an alternating current form and the load is a light load, adjusting, in the different working periods, the conduction time of the body diode to cause the switching frequency of the resonant circuit to change (par [0015] “system 100 generally operates as a DC/DC resonant converter circuit that receives an input DC voltage (VIN) and generates an output DC voltage (VOUT)”; the input is direct current; see par [0014] “predict gate drive signals” so that the body diode conduction time is minimized and a negative current across the SR switches is reduced or eliminated).
Allowable Subject Matter
Claims 4 and 9 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claims 4 and 9, Choi discloses the method according to claim 3 and 8 with a control signal being a square wave as shown in fig 3.
Choi fails to disclose wherein the conduction control signal of the body diode is a triangular wave, an exponential wave or a sine wave.
Choi has been found to be the closest prior art of record.
However, none of the prior art, taken singly or in combination, teach “wherein the conduction control signal of the body diode is a triangular wave, an exponential wave or a sine wave”.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Wong et al. (US 9608532 B2) - Body Diode Conduction Optimization In MOSFET Synchronous Rectifier
Fu et al. (US 20150124492 A1) - improving a power converter's efficiency through detecting the body diode conduction of the power converter.
Fei et al. (US 20160294297 A1) – improved efficiency by detecting the body diode conduction of a SR
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/LAUREN ASHLEY SHAW/Examiner, Art Unit 2838
/THIENVU V TRAN/ Supervisory Patent Examiner, Art Unit 2838
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