DETAILED ACTION
Claims 1-20 are pending.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-5 and 15-16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Machireddy (US 2024/0224205).
With respect to claim 1, Machireddy teaches a first Radio Unit (RU) is synchronized to a Primary Reference Time Clock (PRTC) via first reference timing information (e.g., a computing device (e.g., RU) is synchronized to PRTC, fig. 3, fig. 5a, fig. 6, sections [0009], [0013], [0034], [0036], [0056], [0070], [0071], and [0076]). Machireddy teaches a first Distributed Unit (DU) is synchronized to the PRTC via second reference timing information (e.g., a computing device (e.g., DU) is synchronized to PRTC, fig. 3, fig. 5a, fig. 6, sections [0009], [0013], [0034], [0036], [0056], [0070], [0071], and [0076]), and the first DU manages the first RU (e.g., communication parameters including a timestamp from DU to RU, fig. 3, fig. 5a, fig. 6, sections [0009], [0013], [0056], [0070], and [0076]). Machireddy teaches a second DU is synchronized to the PRTC via third reference timing information (e.g., a computing device (e.g., DU) is synchronized to PRTC, fig. 3, fig. 5a, fig. 6, sections [0009], [0013], [0034], [0036], [0056], [0070], [0071], and [0076]). Machireddy teaches a second RU connected to the second DU, wherein the second DU manages the second RU (e.g., communication parameters including a timestamp from DU to RU, fig. 3, fig. 5a, fig. 6, sections [0009], [0013], [0056], [0070], and [0076]). Machireddy teaches the second RU is synchronized to the PRTC via fourth reference timing information received from the second DU (e.g., a computing device (e.g., RU) is synchronized to PRTC, fig. 3, fig. 5a, fig. 6, sections [0009], [0013], [0034], [0036], [0056], [0070], [0071], and [0076]). Machireddy does not explicitly disclose a Cell Site Router (CSR) that provides reference timing for other components of the RAN, the CSR connected to RU and DU, and reference timing information from the CSR to RU and DU. However, Machireddy further teaches a Cell Site Router (CSR) that provides reference timing for other component of the RAN, DUs and RUs connected to the CSR, timing information from a Cell Site Router (CSR) to a RU and a DU, and the DU connected to the RU via the CSR (e.g., a cell-site router with a timing grandmaster provides synchronization information to DUs and RUs and communication between DU and RU via CSR, fig. 7, sections [0077]-[0079]) in order to perform distribution and processing associated with clock/timing synchronization. Therefore, based on Machireddy, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the teachings of Machireddy in order to perform distribution and processing associated with clock/timing synchronization.
With respect to claim 2, Machireddy teaches the first RU, the first DU, the second DU, and the second RU are synchronized using the Precision Time Protocol (PTP) (e.g., precision timing protocol (PTP) standard, sections [0071] and [0079]).
With respect to claim 3, Machireddy teaches the CSR provides the reference timing for the other components of the RAN at a physical layer (e.g., PHY layer in 5G network can include frequency and time synchronization, section [0067]).
With respect to claim 4, Machireddy teaches the reference timing is embedded in an electrical signal carrying user data, control data, or both, from the CSR to the first RU, the first DU, or both (e.g., communication parameter including timestamps and control data packets, fig. 7 and section [0009]).
With respect to claim 15, Machireddy teaches the CSR, the first RU, the second RU, the first DU, and the second DU are part of a 5G cellular network (fig. 5a and fig. 7).
With respect to claim 16, Machireddy teaches synchronizing components in Radio Access Network (RAN) (section [0070]). Machireddy teaches receiving, by a first Radio Unit (RU), first reference timing information (e.g., communication parameters including a timestamp to RU, fig. 3, fig. 5a, fig. 6, sections [0009], [0013], [0056], [0070], and [0076]). Machireddy teaches synchronizing, by the first RU, an internal clock of the first RU to a Primary Reference Time Clock (PRTC) using the first reference timing information (e.g., a computing device (e.g., RU) synchronizes its clock to PRTC, sections [0013], [0034], [0036], [0071], and [0076]). Machireddy teaches receiving, by a first Distributed Unit (DU), second reference timing information, wherein the first DU manages the first RU (e.g., DU receives communication parameters including a timestamp and the communication parameters from DU to RU, fig. 3, fig. 5a, fig. 6, sections [0009], [0013], [0056], [0070], and [0076]). Machireddy teaches synchronizing, by the first DU, an internal clock of the first DU to the PRTC using the second reference timing information (e.g., a computing device (e.g., DU) synchronizes its clock to PRTC, sections [0013], [0034], [0036], and [0071]). Machireddy teaches receiving, by a second DU, third reference timing information, wherein the second DU manages a second RU directly (e.g., DU receives communication parameters including a timestamp and the communication parameters from DU to RU, fig. 3, fig. 5a, fig. 6, sections [0009], [0013], [0056], [0070], and [0076]). Machireddy teaches synchronizing, by the second DU, an internal clock of the second DU to the PRTC using the third reference timing information (e.g., a computing device (e.g., DU) synchronizes its clock to PRTC, sections [0013], [0034], [0036], and [0071]). Machireddy teaches transmitting, by the second DU, fourth reference timing information to the second RU (e.g., communication parameters including a timestamp from DU to RU, fig. 3, fig. 5a, fig. 6, sections [0009], [0013], [0056], [0070], and [0076]). Machireddy teaches synchronizing, by the second RU, an internal clock of the second RU to the PRTC using the fourth reference timing information (e.g., a computing device (e.g., RU) synchronizes its clock to PRTC, sections [0013], [0034], [0036], [0071], and [0076]). Machireddy does not explicitly disclose timing information from a Cell Site Router (CSR) to a RU and a DU, and the DU manages the RU via the CSR. However, Machireddy further teaches timing information from a Cell Site Router (CSR) to a RU and a DU, and the DU connected to the RU via the CSR (e.g., a cell-site router with a timing grandmaster provides synchronization information to DUs and RUs and communication between DU and RU via CSR, fig. 7, sections [0077]-[0079]) in order to perform distribution and processing associated with clock/timing synchronization. Therefore, based on Machireddy, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the teachings of Machireddy in order to perform distribution and processing associated with clock/timing synchronization.
Claim(s) 5-8, 13 and 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Machireddy (US 2024/0224205) in view of Parulkar et al. (US 2017/0034797).
With respect to claim 5, Machireddy teaches clock frequencies of the first RU, the first DU, and the second DU are synchronized to a clock frequency of the PRTC, and a clock frequency of the second RU is synchronized to the clock frequency of the second DU using the fourth reference timing information (e.g., synchronization parameters including a phase, a frequency, a timing offset and any combination, sections [0007], [0010], [0034], [0070], and [0071]). Machireddy does not explicitly disclose clock frequencies of the CSR. However, Parulkar teaches clock frequencies of the CSR (e.g., cell-site routers having clocks, fig. 2 and sections [0021] and [0025]) in order to provide enhanced clock synchronization. Therefore, based on Machireddy in view of Parulkar, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the teaching of Parulkar to the system of Machireddy in order to provide enhanced clock synchronization.
With respect to claim 6, Machireddy teaches clock signals produced by the first RU, the first DU, and the second DU are phase synchronized with a clock signal of the PRTC and a clock signal produced by the second RU is phase synchronized with the clock signal of the second DU using the fourth reference timing information (e.g., synchronization parameters including a phase, a frequency, a timing offset and any combination, sections [0007], [0010], [0034], [0070], and [0071]). Machireddy does not explicitly disclose clock signals produced by the CSR. However, Parulkar teaches clock signals produced by the CSR (e.g., cell-site routers having clocks, fig. 2 and sections [0021] and [0025]) in order to provide enhanced clock synchronization. Therefore, based on Machireddy in view of Parulkar, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the teaching of Parulkar to the system of Machireddy in order to provide enhanced clock synchronization.
With respect to claim 7, Machireddy teaches clocks of the first RU, the first DU, and the second DU are synchronized in time with the PRTC; and a clock of the second RU is synchronized in time with the clock of the second DU using the fourth reference timing information (e.g., synchronization parameters including a phase, a frequency, a timing offset and any combination, sections [0007], [0010], [0034], [0070], and [0071]). Machireddy does not explicitly disclose a clock of the CSR. However, Parulkar teaches a clock of the CSR (e.g., cell-site routers having clocks, fig. 2 and sections [0021] and [0025]) in order to provide enhanced clock synchronization. Therefore, based on Machireddy in view of Parulkar, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the teaching of Parulkar to the system of Machireddy in order to provide enhanced clock synchronization.
With respect to claim 8, Machireddy teaches the CSR with the PRTC (e.g., the CSR with a timing grandmaster, figs. 6-7, sections [0071], [0072], and [0079]). Machireddy does not explicitly disclose a clock of the CSR. However, Parulkar teaches a clock of the CSR (e.g., cell-site routers having clocks, fig. 2 and sections [0021] and [0025]) in order to provide enhanced clock synchronization. Therefore, based on Machireddy in view of Parulkar, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the teaching of Parulkar to the system of Machireddy in order to provide enhanced clock synchronization.
With respect to claim 13, Machireddy discloses the claimed subject matter as discussed above except a Global Navigation Satellite System (GNSS). However, Parulkar teaches a GNSS receiver connected to the CSR, wherein the reference timing is generated by a clock of the CSR and the clock of the CSR is set using GNSS signals from the GNSS receiver (fig. 2 and sections [0021] and [0025]) in order to provide enhanced clock synchronization. Therefore, based on Machireddy in view of Parulkar, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the teaching of Parulkar to the system of Machireddy in order to provide enhanced clock synchronization.
With respect to claim 17, Machireddy teaches the first reference timing information, the second reference timing information, and the third reference timing information are from the CSR (fig. 7). Machireddy does not explicitly disclose timing information are generated by an internal clock of the CSR, receiving, by the CSR, Global Navigation Satellite System (GNSS) signals from a GNSS receiver; and setting, by the CSR, the internal clock of the CSR using the GNSS signals. However, Parulkar teaches an internal clock of the CSR and receiving, by the CSR, Global Navigation Satellite System (GNSS) signals from a GNSS receiver and setting, by the CSR, the internal clock of the CSR using the GNSS signals (fig. 2 and sections [0021] and [0025]) in order to provide enhanced clock synchronization. Therefore, based on Machireddy in view of Parulkar, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the teaching of Parulkar to the system of Machireddy in order to provide enhanced clock synchronization.
Claim(s) 9-12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Machireddy (US 2024/0224205) in view of Singh et al. (US 2025/0393001).
With respect to claim 9, Machireddy discloses the claimed subject matter as discussed above except the following. However, Singh teaches the first DU uses Frequency Division Duplexing (FDD) and the second DU uses Time Division Duplexing (TDD), or vice versa (e.g., synchronization among DUs for TDD and/or FDD features, sections [0002]. [0046], and [0080]) in order to ensure communication for seamless operation. Therefore, based on Machireddy in view of Singh, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the teaching of Singh to the system of Machireddy in order to ensure communication for seamless operation.
With respect to claim 10, Machireddy discloses the claimed subject matter as discussed above except the following. However, Singh teaches both the first DU and the second DU use Frequency Division Duplexing (FDD), or both the first DU and the second DU use Time Division Duplexing (TDD) (e.g., synchronization among DUs for TDD and/or FDD features, sections [0002]. [0046], and [0080]) in order to ensure communication for seamless operation. Therefore, based on Machireddy in view of Singh, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the teaching of Singh to the system of Machireddy in order to ensure communication for seamless operation.
With respect to claim 11, Machireddy discloses the claimed subject matter as discussed above except the following. However, Singh teaches the first RU uses frequency division duplexing (FDD) and the second RU uses Time Division Duplexing (TDD) ) (e.g., synchronization among RUs for TDD and/or FDD features, sections [0002]. [0046], and [0080]) in order to ensure communication for seamless operation. Therefore, based on Machireddy in view of Singh, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the teaching of Singh to the system of Machireddy in order to ensure communication for seamless operation.
With respect to claim 12, Machireddy discloses the claimed subject matter as discussed above except the following. However, Singh teaches the first RU, the second RU, or both are part of at least one of: a femtocell, a picocell, or a microcell (e.g., a pico cell, a femto cell, or another type of cell, section [0034]) in order to provide communication coverage for a particular geographic area. Therefore, based on Machireddy in view of Singh, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the teaching of Singh to the system of Machireddy in order to provide communication coverage for a particular geographic area.
Claim(s) 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Machireddy (US 2024/0224205) in view of Kong et al. (US 2023/0292175).
With respect to claim 14, Machireddy teaches a third RU managed by the second DU and the third RU is synchronized to the PRTC via fifth reference timing information (e.g., a computing device (e.g., RU) synchronizes its clock to PRTC, fig. 5a, sections [0013], [0034], [0036], [0071], and [0076]). Machireddy does not explicitly disclose the following. However, Kong teaches a third RU in communication with the second RU and the second RU provides fifth reference timing information to the third RU (e.g., communication between RUs, fig. 5, sections [0045]-[0046]) in order to provide alternative way for deployment with multiple RUs. Therefore, based on Machireddy in view of Kong, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the teaching of Kong to the system of Machireddy in order to provide alternative way for deployment with multiple RUs.
Claim(s) 18-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Machireddy (US 2024/0224205) in view of Song et al. (WO 2024/232539).
With respect to claim 18, Machireddy teaches synchronizing components in Radio Access Network (RAN) (section [0070]). Machireddy teaches receiving, by a first Radio Unit (RU), first reference timing information (e.g., communication parameters including a timestamp to RU, fig. 3, fig. 5a, fig. 6, sections [0009], [0013], [0056], [0070], and [0076]). Machireddy teaches synchronizing, by the first RU, an internal clock of the first RU to a Primary Reference Time Clock (PRTC) using the first reference timing information (e.g., a computing device (e.g., RU) synchronizes its clock to PRTC, sections [0013], [0034], [0036], [0071], and [0076]). Machireddy teaches receiving, by a first Distributed Unit (DU), second reference timing information, wherein the first DU manages the first RU (e.g., DU receives communication parameters including a timestamp and the communication parameters from DU to RU, fig. 3, fig. 5a, fig. 6, sections [0009], [0013], [0056], [0070], and [0076]). Machireddy teaches synchronizing, by the first DU, an internal clock of the first DU to the PRTC using the second reference timing information (e.g., a computing device (e.g., DU) synchronizes its clock to PRTC, sections [0013], [0034], [0036], and [0071]). Machireddy teaches transmitting third reference timing information to a second DU, wherein the second DU manages a second RU directly (e.g., DU receives communication parameters including a timestamp and the communication parameters from DU to RU, fig. 3, fig. 5a, fig. 6, sections [0009], [0013], [0056], [0070], and [0076]). Machireddy teaches synchronizing, by the second DU, an internal clock of the second DU to the PRTC using the third reference timing information (e.g., a computing device (e.g., DU) synchronizes its clock to PRTC, sections [0013], [0034], [0036], and [0071]). Machireddy teaches transmitting, by the second DU, fourth reference timing information to the second RU (e.g., communication parameters including a timestamp from DU to RU, fig. 3, fig. 5a, fig. 6, sections [0009], [0013], [0056], [0070], and [0076]). Machireddy teaches synchronizing, by the second RU, an internal clock of the second RU to the PRTC using the fourth reference timing information (e.g., a computing device (e.g., RU) synchronizes its clock to PRTC, sections [0013], [0034], [0036], [0071], and [0076]). Machireddy does not explicitly disclose timing information from a Cell Site Router (CSR) to a RU and a DU, and the DU manages the RU via the CSR. However, Machireddy further teaches timing information from a Cell Site Router (CSR) to a RU and a DU, and the DU connected to the RU via the CSR (e.g., a cell-site router with a timing grandmaster provides synchronization information to DUs and RUs and communication between DU and RU via CSR, fig. 7, sections [0077]-[0079]) in order to perform distribution and processing associated with clock/timing synchronization. Therefore, based on Machireddy, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the teachings of Machireddy in order to perform distribution and processing associated with clock/timing synchronization. Machireddy does not explicitly disclose transmitting, by the first DU, third reference timing information to a second DU. However, Song teaches transmitting, by the first DU, third reference timing information to a second DU (e.g., synchronization between DUs with precision time protocol (PTP), page 10, paragraph 8, and page 13, paragraph 3) in order to avoid communication delays. Therefore, based on Machireddy in view of Song, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the teaching of Song to the system of Machireddy in order to avoid communication delays.
With respect to claim 19, Machireddy teaches the first RU, the first DU, the second DU, and the second RU are synchronized using the Precision Time Protocol (PTP) (e.g., precision timing protocol (PTP) standard, sections [0071] and [0079]).
Claim(s) 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Machireddy (US 2024/0224205) in view of Song et al. (WO 2024/232539), and further in view of Kong et al. (US 2023/0292175).
With respect to claim 20, Machireddy teaches a third RU managed by the second DU and synchronizing, by the third RU, an internal clock of the third RU to the PRTC using fifth reference timing information (e.g., a computing device (e.g., RU) synchronizes its clock to PRTC, fig. 5a, sections [0013], [0034], [0036], [0071], and [0076]). Machireddy and Song do not explicitly disclose the following. However, Kong teaches the second RU is in communication with a third RU and transmitting, by the second RU, fifth reference timing information to the third RU (e.g., communication between RUs, fig. 5, sections [0045]-[0046]) in order to avoid communication delay. Therefore, based on Machireddy in view of Song, and further in view of Kong, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the teaching of Kong to the system of Machireddy in view of Song in order to avoid communication delays.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOON H HWANG whose telephone number is (571)272-4036. The examiner can normally be reached Monday-Friday, 9:00 am - 5:00 pm.
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/JOON H HWANG/Supervisory Patent Examiner, Art Unit 2447
06/03/2026
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