DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d).
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 07/31/2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Status of Claims
Claims 1-11 are pending in this application.
Oath/Declaration
The receipt of Oath/Declaration is acknowledged.
Drawings
6. The receipt of Drawings is acknowledged.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-11 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Winzer (US PG. Pub. 20220244465 A1).
Referring to Claim 1, Winzer teaches a circuit board (See Winzer, Fig. 8, Printed Circuit Board), comprising:
a first mounting region configured so that a first electronic part is mounted or mountable to the first mounting region (See Winzer, Fig. 26C, Sect. [0440] lines 11-12, the optical/electrical communication interface 692d is mounted on the first side of the circuit board 693c);
a second mounting region configured so that a second electronic part is mounted or mountable to the second mounting region (See Winzer, Fig. 26A, Sect. [0426] lines 13-16, the optical/electrical communication interfaces 692e and 692f are mounted on a second side of the circuit board 693c, in which the second side faces the exterior of the enclosure 694c.);
a through via penetrating through the circuit board (See Winzer, Fig. 129, Sect. [0778] lines 2-6, a substrate 12310 that is attached to a printed circuit board 12906, which has an opening to allow the data processing chip 12312 to protrude or partially protrude through the opening and be attached to the substrate 12310.), wherein the first mounting region includes a first part with an outer edge of the first mounting region and a second part (See Winzer, Fig. 89, Sect. [0657], a first optical fiber connector 1662 and a second optical fiber connector 1664 are designed such that either the first optical fiber connector 1662 or the second optical fiber connector 1664 can be connected to a given communication transponder that is compatible with the optical fiber interconnection cable 1660. The diagram shows the fiber port mapping when viewed from the outer edge of the optical fiber connector into the optical fiber connector (i.e., toward the optical fibers in the interconnection cable 1660),
wherein the second mounting region includes a third part with an outer edge of the second mounting region and a fourth part,
wherein, as viewed from a direction perpendicular to a surface on which the first mounting region is provided, the first part and the outer edge of the first mounting region overlap the second mounting region (See Winzer, Sect. [0400] lines 1-12, FIG. 22 is a diagram of a top view of an example data processing system 560 that includes a housing 562 having side panels 564 and 566, and a rear panel 568. The system 560 includes a vertically mounted printed circuit board 570 that can also function as the front panel. The surface of the printed circuit board 570 is substantially perpendicular to the bottom panel of the housing 562. The term “substantially perpendicular” is meant to take into account of manufacturing and assembly tolerances, so that if a first surface is substantially perpendicular to a second surface, the first surface is at an angle in a range from 85° to 95° relative to the second surface.), and the second part of the first mounting region is positioned outside of the second mounting region (See Winzer, Sect. [0400] lines 12-18, On the printed circuit board 570 are mounted a data processing chip 572 and an integrated communication device 574. In some examples, the data processing chip 572 and the integrated communication device 574 are mounted on a substrate (e.g., a ceramic substrate), and the substrate is attached (e.g., electrically coupled) to the printed circuit board 570.),
wherein, as viewed from the direction, the third part and the outer edge of the second mounting region overlap the first mounting region (See Winzer, Sect. [0835], the printed circuit board 13604 and the front grid structure 13606 and/or the rear grid structure 13608 can be modified to accommodate memory modules 16206 that are attached to the printed circuit board 13604. For example, a portion of the surface area of the printed circuit board 13604 can support the memory modules 16206, and another portion of the surface area of the printed circuit board 13604 can overlap the front/rear grid structure. In some examples, the front/rear grid structure has openings that allow the memory modules 16206 on the printed circuit board 13604 to protrude through the openings.), and the fourth part of the second mounting region is positioned outside of the first mounting region (See Winzer, Sect. [0836] lines 1-14, in FIGS. 6 and 23, an optical fiber cable is optically coupled to the top side of the photonic integrated circuit, and the bottom side of the photonic integrated circuit is mounted on a substrate. One or more electronic integrate circuits, such as a serializer/deserialize module, is/are mounted on or partially on the photonic integrated circuit adjacent to or near the optical fiber cable or the optical connector that connects to the optical fiber cable. In the examples shown in FIGS. 7 and 32, the photonic integrated circuit and the electronic integrated circuit(s) are mounted on opposite sides of the substrate, in which the electronic integrated circuit(s) is/are mounted adjacent to or near the optical fiber cable or the optical connector that connects to the optical fiber cable), and
wherein the through via is formed in a region where the first mounting region and the second mounting region overlap (See Winzer, Figs. 136-153, Sect. [0835] lines 6-10, a portion of the surface area of the printed circuit board 13604 can support the memory modules 16206, and another portion of the surface area of the printed circuit board 13604 can overlap the front/rear grid structure.).
Referring to Claim 2, Winzer teaches the circuit board according to claim 1 (See Winzer, Fig. 8, Printed Circuit Board), wherein a first connection land to which the first electronic part is adhered is provided in the first mounting region (See Wizner, Fig. 11, Sect. [0345] lines 7-14, The integrated optical communication device 374 includes a first optical connector 356 that allows optical signals transmitted in optical fibers to be coupled to the integrated optical communication device 374, in which a portion of the optical fibers connected to the first optical connector 356 are positioned at a region facing the bottom side of the package substrate 230.), and
wherein a second connection land to which the second electronic part is adhered is provided in the first mounting region (See Winzer, Sect. [0312] lines 4-7, The connector part 213 is configured to receive a second optical connector part 223 of the fiber-optic connector assembly 220, optically coupled to the connector part 213 through the surfaces 213_1 and 223_2.).
Referring to Claim 3, Winzer teaches the circuit board according to claim 1 (See Winzer, Fig. 8, Printed Circuit Board), further comprising:
a first through via penetrating through the circuit board which is provided in the second part of the first mounting region (See Wizner, Sect. [0798] lines 10-14, The electrical components mounted on the front surface of the substrate 13602 protrude through or partially through the opening 13618 in the printed circuit board 13604. and protrude through or partially through the opening 13620 in the front lattice structure 13606.), the first through via being positioned outside of the second mounting region as viewed from the direction (See Wizner, Sect. [0798] lines 1-10, Electrical components can be mounted on the front side of the substrate 13602 in a first region occupying approximately the same footprint as the data processing chip 12312, which is on the rear side of the substrate 13600. The electrical components support the data processing chip 12312 and can include, e.g., one or more capacitors, one or more filters, and/or one or more power converters. The front lattice structure 13606 defines a larger opening 13620 in the central region that occupies a slightly larger footprint than the first region.);
a second through via penetrating through the circuit board which is provided in the fourth part of the second mounting region, the second through via being positioned outside of the first mounting region as viewed from the direction (See Wizner, Sect. [0800], The data processing chip 12312 protrudes through or partially through the opening 13622 and is thermally coupled to the heat dissipating device 13610. The rear lattice structure 13608 defines several openings 13624 that generally correspond to the openings 13614 in the front lattice structure 13606. Electronic components 13702 (FIG. 137) can be mounted on the rear side of the substrate 13602 to support the CPO modules 12316 that are coupled to the front side of the substrate 13612. The electronic components 13702 can protrude through or partially through the openings 13624 in the rear lattice structure 13608).
Referring to Claim 4, Winzer teaches the circuit board according to claim 2 (See Wizner, Fig. 8, Printed Circuit Board), wherein the first electronic part comprises a first heat dissipation surface, and the first heat dissipation surface is to be adhered to the first connection land (See Winzer, Fig. 96, Heat Dissipation Module 1846, Sect. [0586] lines 1-10, The heat dissipating module 1846 includes heat sink fins or pins having heat dissipating surfaces configured to optimize heat dissipation. The heating dissipating module 1846 includes a vapor chamber thermally coupled to heat sink fins or pins. The rackmount server 1820 can include other components, such as power supply units, rear outlet fans, one or more additional horizontally oriented circuit boards, one or more additional data processors mounted on the horizontally oriented circuit boards, and one or more additional air louvers).
Referring to Claim 5, Winzer teaches the circuit board according to claim 4 (See Wizner, Fig. 8, Printed Circuit Board), wherein the first connection land and the first heat dissipation surface are adhered by soldering (See Winzer, Sect. [0324] lines 1-5, the package substrate 230 can include connectors on the bottom side that connects the package substrate 230 to another circuit board, such as a motherboard. The connection can use, e.g., fixed (e.g., by use of soldering).
Referring to Claim 6, Winzer teaches the circuit board according to claim 1 (See
Wizner, Fig. 8, Printed Circuit Board),
wherein the first mounting region is provided at a first surface of the circuit board (See Winzer, Fig. 28A, Sect. [0455] lines 7-12, The data processing chip 722 is mounted on a first side of a circuit board 730 that functions as a front panel of an enclosure 732 of the system 720. In some examples, the data processing chip 722 is mounted on a substrate (e.g., a ceramic substrate), and the substrate is attached to the circuit board 730.), and
wherein the second mounting region is provided at a second surface of the circuit board that is different from the first surface (See Winzer, Fig. 28A, Sect. [0455] lines 12-15, The optical/electrical communication interface 724 is mounted on a second side of the circuit board 730, in which the second side faces the exterior of the enclosure 732.).
Referring to Claim 7, Winzer teaches the circuit board according to claim 1 (See Wizner, Fig. 8, Printed Circuit Board), wherein the first mounting region and the second mounting region are provided on a same surface of the circuit (See Wizner, Sect. [0091], The circuit board or substrate can include a first side and a second side, the first structure can be attached to the first side of the circuit board or substrate, a second structure can be attached to the second side of the circuit board or substrate, and the first structure can be mechanically and thermally attached to the second structure.).
Referring to Claim 8, Winzer teaches the circuit board according to claim 1 (See Wizner, Fig. 8, Printed Circuit Board), wherein the through via is configured to dissipate heat of the first electronic part or the second electronic part (See Wizner, Fig. 96, Sect. [0586] lines 1-8, A heat dissipating module 1846, e.g., a heat sink, is thermally coupled to the data processor 1844 and which includes heat sink fins or pins having heat dissipating surfaces configured to optimize heat dissipation to dissipate heat generated by the data processor 1828 during operation).
Referring to Claim 9, Winzer teaches the circuit board according to claim 1
(See Winzer, Fig. 8, Printed Circuit Board),
wherein each of the first electronic part and the second electronic part is a semiconductor device (See Winzer, Sect. [0304] lines 6-9, A representative hybrid circuit can include (i) one or more packaged or non-packaged dies, with some or all of the dies including optical, optoelectronic, and/or semiconductor device),
wherein a first land for lead to which a lead of the first electronic part is connected is provided in the first mounting region (See Winzer, Sect. [0849], the semiconductor die on a lower mold resin that defines an opening in an interior region. A lead frame or electrical connectors are attached to the lower mold resin.), and
wherein a second land for lead to which a lead of the second electronic part is connected is provided in the second mounting region (See Winzer, Sect. [0850], Wire bond electrical contacts on the semiconductor die to the lead frame or electrical connectors attached to the lower mold resin.).
Referring to Claim 10, Winzer teaches the circuit board according to claim 1 (See Wizner, Fig. 8, Printed Circuit Board), wherein an area of the first mounting region is different from an area of the second mounting region board (See Winzer, Fig. 77, Sect. [0569] lines 12-15, The printed circuit board 1230 includes a first side facing the front direction relative to the housing 1222 and a second side facing the rear direction relative to the housing 1222.).
Referring to Claim 11, Wizner teaches an image forming apparatus comprising:
the circuit board according to claim 1 (See Wizner, Fig. 8, Printed Circuit Board); and
a constituent part (See Winzer, Fig. 24, The optical/electrical communication interface 644) to be controlled by either one of the first electronic part or the second electronic part (See Winzer, Sect. [0416] lines 1-4, The optical/electrical communication interface 644 is electrically coupled to the data processing chip 640 by electrical connectors or traces 646 on or in the circuit board 642.).
Cited Art
10. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure Wizner et al. (US PAT. No. 11,895,798 B2) discloses A system includes a housing and a first circuit board positioned inside the housing. The housing has top, bottom, left side, right side, front, and rear panels. The first circuit board has a length, a width, and a thickness, and the first circuit board has a first surface defined by the length and the width. The first surface of the first circuit board is substantially parallel to the front panel or at a second angle relative to the front panel in which the second angle is less than 60°. The system includes a first data processing module and a first optical interconnect module both electrically coupled to the first circuit board. The optical interconnect module is configured to receive first optical signals from a first optical link, convert the first optical signals to first electrical signals, and transmit the first electrical signals to the first data processing module.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DARRYL V DOTTIN whose telephone number is (571)270-5471. The examiner can normally be reached M-F 9am-5pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Abderrahim Merouan can be reached on 571-270-5254. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/DARRYL V DOTTIN/Primary Examiner, Art Unit 2683
/DARRYL V DOTTIN/Primary Examiner, Art Unit 2683