Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
The instant detailed action is in response to Applicant's submission filed on 17 March 2026.
Claim Interpretation
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: processing device in claim 1 support for which was taken to correspond to FIG 2: 135 and [0043] of the Specification.
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
REJECTIONS BASED ON PRIOR ART
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 1-5,7-12,14-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Strasser (US PG PUB No. 2011/0157992) in view of Mun (US PG PUB No. 2013/0013854).
As per claim [1,8,15], a system (see Strasser FIG 1: 100) comprising:
a memory device (see Strasser FIG 1: 102) and a processing device (see Strasser FIG 1: 102), operatively coupled with the memory device, to perform operations comprising:
receiving a unit of data to be written to the memory device (see Strasser FIG 5A: 502);
splitting the unit of data into a plurality of segments (see Strasser [0162]: “For example, the bank-0 write queue 412a may receive a command to write a page of data packets to bank-0 214a. The bank-0 controller 4.18a may receive the write command at an appropriate time and may generate one or more write Subcommands for each data packet stored in the write buffer 320 to be written to the page in bank-0 214a.”);
modulating each segment of the unit of data by a modulation operation using a modulation mask derived from a corresponding seed value chosen from a set of seed values (see Strasser [0115]: “The bias module 318 biases a packet by changing a bias of the packet to more closely match a bias of the storage cells of the solid state storage media 110.”); and
wherein modulating each segment of unit of data results in a desired distribution of logical programming levels over a plurality of memory cells of the unit of data (see Strasser [0010]: “ The binary pattern, in another embodiment, satisfies a predefined voltage differential threshold between the one or more other storage cells and the plurality of storage cells”); and
[Strasser discloses desired data distribution to improve performance (see [0127]), and further discloses the biasing produces predefined voltage differential threshold.]
generating a modulated unit of data comprising a plurality of modulated segments and a plurality of corresponding seed identifiers (see Strasser [0114]: “For example, upon flipping, whitening, compressing, relocating, and/or otherwise biasing Source data, separate blocks of Source data may still exhibit patterns that cause inter-cell interference, and the bias module 318 may bias one or more of the separate blocks of source data toward a pattern that minimizes inter-cell interference, or the like.”),
[Strasser discloses a bias module within a storage controller for performing various modulation operations using seed values prior to storage and further discloses the data packet may be aggregated or split in the process.]
However, Strasser does not expressly disclose but in the same field of endeavor Mun discloses
wherein each seed identifier is represented by an index that identifies (see Mun [0071]: “may select one of a plurality of seed tables by using at least one bit of a page address of a page to be currently programmed or at least one bit of a wordline address corresponding to the page”), in a linear array of seed values (see Mun FIG 8: ST21 and [0067]), a seed value that has been used for modulating a respective segment of the unit of data (see Mun [0094]).
It would have been obvious before the effective filing date of the invention to modify Strasser to implement a seed table for selecting a seed values as taught by Mun.
The suggestion/motivation for doing so would have been for the benefit of an improved randomizer and de-randomizer (see Mun [0010]).
Therefore it would have been obvious before the effective filing date of the invention to implement a seed table as taught by Mun for the benefit of improved randomizer and de-randomizer to arrive at the invention as specified in the claims above.
As per claim [2,9,16], the system of claim 1,
wherein each modulated segment is concatenated with the corresponding seed identifier (see Strasser [0209]: ““In one embodiment, for example, the solid-state storage controller 104 may store a seed value in a beginning portion of each logical erase block that the Solid-state storage controller 104 erases, in the first sixty-four bits, one hundred and twenty-eight bits, or the like.”).
As per claim [3,10,17], the system of claim 1,
wherein generating a modulated unit of data further comprises: concatenating the plurality of modulated segments (see Strasser [0142]: “For example, data from a portion of a first data packet may be combined with data from a portion of a second data packet. If a data segment is larger than a data requested by the requesting device 155, the alignment module 326 may discard the unwanted data.”).
[Data is combined during a read.]
As per claim [4,11,18], the system of claim 1,
wherein the operations further comprise: storing, on the memory device, each modulated segment followed by an identifier of the corresponding seed value (see Strasser [0209]: ““In one embodiment, for example, the solid-state storage controller 104 may store a seed value in a beginning portion of each logical erase block that the Solid-state storage controller 104 erases, in the first sixty-four bits, one hundred and twenty-eight bits, or the like.”).
As per claim [5,12,19], the system of claim 1,
wherein modulating each segment of the unit of data further comprises: applying a predefined mathematical transformation to the segment of the unit of data and a chosen modulation mask of a plurality of modulation masks, wherein each modulation mask of the plurality of modulation masks is derived from a corresponding seed value of a plurality of seed values (see Strasser [0197]: “In one embodiment, the whitening module 512 pseudo-randomizes each data packet that will be stored on the Solid-state storage media 110 using a single seed value for the LFSR. Alternatively or in addition, in another embodiment, the whitening module 512 pseudo-randomizes each data packet that will be stored in a particular logical erase block of the solid-state storage media 110 using a single seed value for the LFSR.”)
As per claim [7,14,20] the system of claim 1, wherein the operations further comprise:
reading the modulated unit of data (see Strasser [233]);
splitting the modulated unit of data into the plurality of modulated segments (see Strasser [0234]);
demodulating each modulated segment by a reverse modulation operation using the corresponding seed value (see Strasser [0220]: “The inverse bias module 332, in one embodiment, uses one or more known values or stored indicators to reverse this process and rearrange the data packet in its original Source order.”); and
generating the unit of data comprising a plurality of demodulated segments (see Strasser [0234]).
RESPONSE TO ARGUMENT
1st ARGUMENT:
However, the Office action fails to provide any explanation of the alleged relevance of the instant teachings to the instant claims. The Applicant is left to guess that the Office action intended to analogize Strasser's "data distribution" with the claimed distribution of logical programming levels over a plurality of memory cells of the unit of data. However, as can be derived from the above-quoted passage of Strasser, the "data distribution" in the context of "garbage collection," at taught ty Strasser, refers to storing "modified data in a different location", and thus has no perceivable relevance to the claimed distribution of logical programming levels over a plurality of memory cells of the unit of data.
Examiner maintains the claim language ‘results in a desired distribution of logical programming levels’ is sufficiently broad to encompass resultant distribution of logical programming levels which are produced by biasing as taught by Strasser.
As per [0018], a random data pattern encoded by a Gray code would result in a uniform distribution of the memory cell charges levels, and a non-uniform distribution of memory cell charge levels would result in better endurance. According to the Specification, modulation data would therefore result in a distribution of logical programing levels. The claim does not specify what the desired distribution of logical programming levels and Specification discloses modulating segment of data produces resultant distributions that may be desired for different reasons.
DIRECTION OF FUTURE CORRESPONDENCES
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KALPIT PARIKH whose telephone number is (571)270-1173. The examiner can normally be reached MON THROUGH FRI 9:30 TO 6:00.
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/KALPIT PARIKH/
Primary Examiner, Art Unit 2137
KALPIT . PARIKH
Primary Examiner
Art Unit 2137