DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 07/31/2024 is in compliance with the provisions on 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Specification
The disclosure is objected to because of the following informalities:
In Paragraph 0100, change “the horizontal axis indicates the mount of light” to “the horizontal axis indicates the amount of light “
Paragraph 0109 recites: “By setting the FD expansion transistor FDext to OFF, an image with less noise can be obtained than when the FD expansion transistor FDext is set to ON. On the other hand, since the amount of accumulated charges is reduced, the underexposed image, which has the image signals amplified by the column circuit 204, cannot indicate the subject with higher luminance than in the case described in FIG. 4.”
Examiner notes Figure 4 and its corresponding paragraphs does not appear to describe a “case”.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-13 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites the limitation "the same settings" in line 13. There is insufficient antecedent basis for this limitation in the claim.
Claims 2-12 are rejected as being dependent on claim 1.
Claim 13 recites the limitation "the same settings" in line 13. There is insufficient antecedent basis for this limitation in the claim.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-3, 5 and 13 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Sugawa et al. (US 2020/0043971 A1).
Regarding claim 1, Sugawa et al. (hereafter referred as Sugawa) teaches an image capturing apparatus (Sugawa, Figs. 1-2 and 13) comprising:
a pixel portion in which a plurality of pixels are arranged in a matrix (Sugawa, Fig. 13, Pixel array 1301, Paragraph 1301), each of the pixels including a photoelectric conversion portion (Sugawa, Fig. 2, photodiode 201, Paragraph 0156), a charge-voltage conversion portion configured to convert a charge of a signal transferred from the photoelectric conversion portion into a voltage (Sugawa, Fig. 2, source-follower switching means (SF) 208, Paragraph 0156 and 163), and an expansion portion configured to expand a capacitance of the charge-voltage conversion portion (Sugawa, Fig. 2, capacitor CLOFIC, Paragraph 0156-0159);
a switching circuit configured to switch connection between the expansion portion and the charge-voltage conversion portion (Sugawa, Fig. 2, switching means (S) 205, Paragraph 0157); and
a read-out circuit configured to amplify signals of the same pixel with a plurality of types of amplification ratios and read out the amplified signals (Sugawa, Fig. 1, readout unit 102, Paragraphs 0128-0129 and 0131, Row readout unit 102HG is considered to be a high amplification ratio (high gain), row readout unit 102LG is considered to be a low amplification ratio (low gain), row readout unit 102N is considered to have an amplification ratio of 1 (no gain).),
wherein when the read-out circuit amplifies signals of the same pixel with a plurality of types of amplification ratios and reads out the amplified signals (Sugawa, Fig. 10, Time T3, Paragraph 0137 and 0310), the switching circuit configures the same settings of switching the connection between the expansion portion and the charge-voltage conversion portion, for reading out operations with the plurality of amplification ratios (Sugawa, Fig. 10, S(205) is set to off (low) when reading both amplified signals of the pixel.).
Claim 13 is rejected for the same reasons as claim 1.
Regarding claim 2, Sugawa teaches the image capturing apparatus according to claim 1 (see claim 1 analysis),
wherein when the read-out circuit amplifies signals of the same pixel with a single amplification ratio and reads out the amplified signals (Sugawa, Fig. 10, Time T4, Paragraph 0317, The pixel is only read with row readout unit 102N (amplification ratio of 1) at time T4.), the switching circuit switches the connection between the expansion portion and the charge-voltage conversion portion according to the amplification ratio (Sugawa, Fig. 10, S(205) is switched to on (high) according to reading with row readout unit 102N and therefore in accordance with the amplification ratio.).
Regarding claim 3, Sugawa teaches the image capturing apparatus according to claim 2 (see claim 2 analysis),
wherein when the read-out circuit amplifies signals of the same pixel with a plurality of types of amplification ratios and reads out the amplified signals, the switching circuit configures different settings of switching the connection between the expansion portion and the charge-voltage conversion portion from settings when the read-out circuit amplifies signals of the same pixel with the single amplification ratio and reads out the amplified signals (Sugawa, Fig. 10, Times T3 and T4, S(205) is off when reading the same pixel with a plurality of types of amplification ratios. S(205) is on when reading the same pixel with the single amplification ratio.).
Regarding claim 5, Sugawa teaches the image capturing apparatus according to claim 1 (see claim 1 analysis),
wherein when the read-out circuit amplifies signals of the same pixel with a plurality of types of amplification ratios and reads out the amplified signals, the switching circuit configures settings so that the expansion portion and the charge-voltage conversion portion are not connected to each other (Sugawa, Fig. 10, Time T3, S(205) is off when reading the same pixel with a plurality of types of amplification ratios.).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-6 and 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shimizu (US 2015/0189210 A1) in view of Rhodes et al. (US 2004/0251394 A1).
Regarding claim 1, Shimizu teaches an image capturing apparatus (Shimizu, Fig. 1 or 6) comprising:
a pixel portion in which a plurality of pixels are arranged in a matrix, each of the pixels including a photoelectric conversion portion (Shimizu, pixel unit 10, Paragraph 0033); and
a read-out circuit configured to amplify signals of the same pixel with a plurality of types of amplification ratios and read out the amplified signals (Shimizu, Figs. 1 or 6, column amplifier units 104a/b, Fig. 6, column A/D conversion units 601a, Paragraphs 0034 and 0052-0053, Fig. 4, Paragraphs 0043, A pixel is output to both column amplifier circuits 202a and 202b and the column amplifier circuits 202a and 202b use different amplification ratios (gains).)
wherein when the read-out circuit amplifies signals of the same pixel with a plurality of types of amplification ratios and reads out the amplified signals, the signals of the same pixel are output to column amplifier circuits at the same time, for reading out operations with the plurality of amplification ratios (Shimizu, Fig. 4, Paragraphs 0041-0044, A pixel signal from a same pixel is output to both column amplifier circuits 202a and 202b using different gains.).
However, Shimizu does not teach a charge-voltage conversion portion configured to convert a charge of a signal transferred from the photoelectric conversion portion into a voltage, and an expansion portion configured to expand a capacitance of the charge-voltage conversion portion; and a switching circuit configured to switch connection between the expansion portion and the charge-voltage conversion portion; the switching circuit configures the same settings of switching the connection between the expansion portion and the charge-voltage conversion portion, for reading out operations with the plurality of amplification ratios.
In reference to Rhodes et al. (hereafter referred as Rhodes), Rhodes teaches a charge-voltage conversion portion configured to convert a charge of a signal transferred from a photoelectric conversion portion into a voltage (Rhodes, Fig. 1, source follower transistor 18, Paragraph 0034),
an expansion portion configured to expand a capacitance of the charge-voltage conversion portion (Rhodes, Fig. 1, capacitor 32, Paragraph 0031-0032); and
a switching circuit configured to switch connection between the expansion portion and the charge-voltage conversion portion (Rhodes, Fig. 1, dual conversion gain transistor 30, Paragraph 0031-0032).
These arts are analogous since they are both related to imaging devices. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to modify the invention of Shimizu with the pixel structure including an expansion portion and switching circuit as seen in Rhodes to allow the pixel to change capacitance in accordance with the amount of light and prevent pixel saturation (Rhodes, Paragraph 0049-0051). Further, the limitation “the switching circuit configures the same settings of switching the connection between the expansion portion and the charge-voltage conversion portion, for reading out operations with the plurality of amplification ratios” would be met since the same pixel signal from a same pixel is output to both column amplifier circuits and the pixel signal input to the column amplifier circuits would be output while the switching circuit is either on or off.
Claim 13 is rejected for the same reasons as claim 1.
Regarding claim 2, the combination of Shimizu and Rhodes teaches the image capturing apparatus according to claim 1 (see claim 1 analysis), wherein when the read-out circuit amplifies signals of the same pixel with a single amplification ratio and reads out the amplified signals (Shimizu, Fig. 3, Paragraphs 0039-0040, A pixel is read out by only one column amplifier circuit and only one amplification ratio (gain).), the switching circuit switches the connection between the expansion portion and the charge-voltage conversion portion according to the amplification ratio (Shimizu, Fig. 3C, Rhodes, Figs. 9-10, The switching circuit being either on or off may be considered to be in accordance with the amplification ratio.).
Regarding claim 3, the combination of Shimizu and Rhodes teaches the image capturing apparatus according to claim 2 (see claim 2 analysis), wherein when the read-out circuit amplifies signals of the same pixel with a plurality of types of amplification ratios and reads out the amplified signals (Shimizu, Fig. 4, Paragraphs 0043), the switching circuit configures different settings of switching the connection between the expansion portion and the charge-voltage conversion portion from settings when the read-out circuit amplifies signals of the same pixel with the single amplification ratio and reads out the amplified signals (Shimizu, Fig. 3, Paragraphs 0039-0040, Rhodes, Figs. 9-10, The dual conversion gain transistor may be either on or off in either of the readout methods of Shimizu.).
Regarding claim 4, the combination of Shimizu and Rhodes teaches the image capturing apparatus according to claim 1 (see claim 1 analysis), wherein when the read-out circuit amplifies signals of the same pixel with a plurality of types of amplification ratios and reads out the amplified signals (Shimizu, Fig. 4, Paragraph 0043), the switching circuit configures settings so that the expansion portion and the charge-voltage conversion portion are connected to each other (Shimizu, Fig. 4, Rhodes, Fig. 10, Performing the wide dynamic range mode while reading the pixel with the dual conversion gain transistor in the on state provides for the limitation.).
Regarding claim 5, the combination of Shimizu and Rhodes teaches the image capturing apparatus according to claim 1 (see claim 1 analysis), wherein when the read-out circuit amplifies signals of the same pixel with a plurality of types of amplification ratios and reads out the amplified signals (Shimizu, Fig. 4, Paragraph 0043), the switching circuit configures settings so that the expansion portion and the charge-voltage conversion portion are not connected to each other (Shimizu, Fig. 4, Rhodes, Fig. 9, Performing the wide dynamic range mode while reading the pixel with the dual conversion gain transistor in the off state provides for the limitation.).
Regarding claim 6, the combination of Shimizu and Rhodes teaches the image capturing apparatus according to claim 1 (see claim 1 analysis), wherein when the read-out circuit amplifies signals of the same pixel with a plurality of types of amplification ratios and reads out the amplified signals (Shimizu, Fig. 4), the switching circuit changes the settings of switching the connection between the expansion portion and the charge-voltage conversion portion according to a luminance of an image to be captured (Rhodes, Figs. 9-10, Paragraph 0049-0051, The dual conversion gain transistor is switched according to low light or bright light conditions.).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to WESLEY JASON CHIU whose telephone number is (571)270-1312. The examiner can normally be reached Mon-Fri: 8am-4pm.
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/WESLEY J CHIU/ Examiner, Art Unit 2639
/TWYLER L HASKINS/ Supervisory Patent Examiner, Art Unit 2639