DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
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2. Claim 1 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 is of U.S. Patent No. 12,057, 828 in view of Padmanabhan et al. (US 2016/0322485 and Padmanabhan hereinafter) further in view of Othman et al. (US 2020/0343167 and Othman hereinafter) further
Regarding claim 1, PAT’ 828 teaches as shown in the table below.
Instant application 18/790431 (APP’ 431)
U.S. Patent 12,057, 828 (PAT’ 828)
1. A molded package, comprising: a mold compound; a first semiconductor die embedded in the mold compound and including a normally-on bidirectional switch device having a first normally-on gate, a second normally-on gate, a first source, and a second source; a second semiconductor die embedded in the mold compound and including a first normally-off switch device having a normally-off gate, a source, and a drain; a third semiconductor die embedded in the mold compound and including a second normally-off switch device having a normally-off gate, a source, and a drain, wherein the drain of the first normally-off switch device is electrically connected to the first source of the normally-on bidirectional switch device and the drain of the second normally-off switch device is electrically connected to the second source of the normally-on bidirectional switch device in a cascode configuration to form a bidirectional power switch;
a first externally accessible source terminal electrically connected to the source of the first normally-off switch device; a second externally accessible source terminal electrically connected to the source of the second normally-off switch device; a third externally accessible source terminal electrically connected to the first source of the normally-on bidirectional switch device; and a fourth externally accessible source terminal electrically connected to the second source of the normally-on bidirectional switch device.
1. A bidirectional power switch, comprising: a normally-on bidirectional switch device having a first normally-on gate, a second normally-on gate, a first source, and a second source; a first normally-off switch device having a normally-off gate, a source, and a drain; a second normally-off switch device having a normally-off gate, a source, and a drain, wherein the drain of the first normally-off switch device is electrically connected to the first source of the normally-on bidirectional switch device and the drain of the second normally-off switch device is electrically connected to the second source of the normally-on bidirectional switch device in a cascode configuration;
a first source terminal electrically connected to the source of the first normally-off switch device; a second source terminal electrically connected to the source of the second normally-off switch device; a third source terminal electrically connected to the first source of the normally-on bidirectional switch device; a fourth source terminal electrically connected to the second source of the normally-on bidirectional switch device; a first gate driver connected between the first source terminal and the third source terminal; and a second gate driver connected between the second source terminal and the fourth source terminal, wherein the bidirectional power switch is configured as a normally-on bidirectional switch.
Regarding claim 1, as shown in the table above PAT’ 828 fails to disclose a molded package, comprising: a mold compound; a first, second and third semiconductor die embedded in the mold compound; a third and fourth externally accessible source terminals.
However, Padmanabhan discloses package electronic device 400 see fig. 4, comprising die 430 including bidirectional HEMT 330, die 440 including switch transistor 340, and die 420 including switch transistor 320. Padmanabhan further discloses electrically connecting the drains of the respective switch transistors to opposite source/drain sides of bidirectional HEMT 330. See Padmanabhan, fig. 4 and paragraphs [0043] and [0049]. Padmanabhan Claim 13 also recites that the bidirectional HEMT and the first and second transistors are parts of different dies. It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to implement PAT’ 828 normally-on bidirectional switch device, first normally-off switch device, and second normally-off switch device on respective semiconductor dies as taught by Padmanabhan. The modification would have used Padmanabhan’s known multi-die packaging arrangement to implement PAT’ 828 three-device bidirectional circuit, with each device continuing to perform the same switching function and with the drains of the normally-off devices remaining connected to the respective source nodes of the normally on bidirectional device.
Padmanabhan further discloses externally accessible package leads electrically connected to the sources of its two switch transistors. Specifically, source bond pad 444 of switch die 440 is electrically connected through conductor 464 to package leas 254, and source bond pad 422 of switch die 420 is electrically connected through conductor 462 to package lead 252. See Padmanabhan, fig. 4 and paragraph [0044]. Package leads 254 and 252 therefore correspond to the first and second externally accessible source terminals when Padmanabhan’s switch dies implement PAT’ 828 normally-off switch devices. PAT’ 828 does not disclose separate externally accessible package terminals electrically connected to internal source node of normally-on bidirectional switch device. Padmanabhan discloses a bidirectional HEMT having separate Kelvin connection terminals on both sides of the HEMT. Specifically, one side of HEMT 10 is electrically connected to Kelvin terminal 13, and the opposite side is electrically connected to Kelvin terminal 15. In the packaged embodiment, Kelvin package leads 253 and 255 are electrically connected through respective Kelvin bond pads to the two sides of the bidirectional HEMT. See Padmanabhan, figs. 1-2 and paragraph [0033-0036]. It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to implement PAT’ 828 internal source nodes and with separate externally accessible Kelvin type package leads as taught by Padmanabhan. Padmanabhan discloses that the separate Kelvin connections provide more accurate voltage measurement at the two sides of the bidirectional HEMT by avoiding measurement error resulting from high current through the main power connections. The modification would provide separate external access to existing internal nodes. PAT’ 828 in view of Padmanabhan does not explicitly disclose the three semiconductor dies embedded in a mold compound.
However, Othman discloses [fig. 1A-1C] a molded package [100], comprising: a mold compound [102] and semiconductor dies 106 embedded in molded compound 102. Othman further discloses that more than one semiconductor die attached to the same package leads and that a molded package include more than one set of package leads with one or more semiconductor dies attached to each set [see figs. 1A-1C and paragraph 0027-0028]. It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to modify the invention of PAT’ 828 and Padmanabhan by incorporating three semiconductor dies implementing three switch devices in Othman’s molded compound to provide a compact molded semiconductor package.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3, 5, and 10-14 are rejected under 35 U.S.C. 103 as being unpatentable over Fornage et al. (US 2012/0287688 and Fornage hereinafter) in view of Padmanabhan et al. (US 2016/0322485 and Padmanabhan hereinafter) further in view of Othman et al. (US 2020/0343167 and Othman hereinafter).
Regarding claim 1, Fornage discloses a package, comprising: a normally-on bidirectional switch device [106, fig. 1, par. 0017-0020] having a first normally-on gate [106-G1], a second normally-on gate [106-G2], a first source [106S1], and a second source [106-S2]; a first normally-off switch device [102] having a normally-off gate [control gate 1, par. 0017], a source [102-S], and a drain [102-D]; a second normally-off switch device [104] having a normally-off gate [control gate 2, par. 0017], a source [104-S], and a drain [104-D], wherein the drain of the first normally-off switch device is electrically connected to the first source of the normally-on bidirectional switch device and the drain of the second normally-off switch device is electrically connected to the second source of the normally-on bidirectional switch device in a cascode configuration [par. 0017] to form a bidirectional power switch [100]; a first externally accessible source terminal [102-S terminal] electrically connected to the source of the first normally-off switch device; a second externally accessible source terminal [104-S terminal] electrically connected to the source of the second normally-off switch device; a third source terminal [106-S1] electrically connected to the first source of the normally-on bidirectional switch device; and a fourth externally accessible source terminal [106-S2 terminal] electrically connected to the second source of the normally-on bidirectional switch device. Fornage does not explicitly discloses switch devices 102, 104 and 106 are disposed on respective first, second and third semiconductor dies within a common package and a molded package, comprising: a mold compound; a first, second and third semiconductor die embedded in the mold compound and a third and fourth externally external accessible source terminals.
However, Padmanabhan discloses package electronic device 400 see fig. 4, comprising die 430 including bidirectional HEMT 330, die 440 including switch transistor 340, and die 420 including switch transistor 320. Padmanabhan further discloses electrically connecting the drains of the respective switch transistors to opposite source/drain sides of bidirectional HEMT 330. See Padmanabhan, fig. 4 and paragraphs [0043] and [0049]. Padmanabhan Claim 13 also expressly recites that the bidirectional HEMT and the first and second transistors are parts of different dies. It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to implement Fornage’s normally-on bidirectional switch device 106, first normally-off switch device 102, and second normally-off switch device 104 on respective semiconductor dies as taught by Padmanabhan. The modification would have used Padmanabhan’s known multi-die packaging arrangement to implement Fornage’s three-device bidirectional circuit, with each device continuing to perform the same switching function and with the drains of the normally-off devices remaining connected to the respective source nodes of the normally on bidirectional device.
Padmanabhan further discloses externally accessible package leads electrically connected to the sources of its two switch transistors. Specifically, source bond pad 444 of switch die 440 is electrically connected through conductor 464 to package leas 254, and source bond pad 422 of switch die 420 is electrically connected through conductor 462 to package lead 252. See Padmanabhan, fig. 4 and paragraph [0044]. Package leads 254 and 252 therefore correspond to the first and second externally accessible source terminals when Padmanabhan’s switch dies implement Fornage’s normally-off switch devices 102 and 104. Fornage does not expressly disclose separate externally accessible package terminals electrically connected to internal source node 106-S1 and 106-S2 of normally-on bidirectional switch device 106. Padmanabhan discloses a bidirectional HEMT having separate Kelvin connection terminals on both sides of the HEMT. Specifically, one side of HEMT 10 is electrically connected to Kelvin terminal 13, and the opposite side is electrically connected to Kelvin terminal 15. In the packaged embodiment, Kelvin package leads 253 and 255 are electrically connected through respective Kelvin bond pads to the two sides of the bidirectional HEMT. See Padmanabhan, figs. 1-2 and paragraph [0033-0036]. It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to implement Fornage’s internal source nodes 106-S1 and 106-S2 with separate externally accessible Kelvin type package leads as taught by Padmanabhan. Padmanabhan discloses that the separate Kelvin connections provide more accurate voltage measurement at the two sides of the bidirectional HEMT by avoiding measurement error resulting from high current through the main power connections. The modification would provide separate external access to existing internal odes 106-S and 106-S2. Fornage in view of Padmanabhan does not explicitly disclose the three semiconductor dies embedded in a mold compound.
However, Othman discloses [fig. 1A-1C] a molded package [100], comprising: a mold compound [102] and semiconductor dies 106 embedded in molded compound 102. Othman further discloses that more than one semiconductor die attached to the same package leads and that a molded package include more than one set of package leads with one or more semiconductor dies attached to each set [see figs. 1A-1C and paragraph 0027-0028]. It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to modify the invention of Fornage and Padmanabhan by incorporating three semiconductor dies implementing three switch devices in Othman’s molded compound to provide a compact molded semiconductor package.
Regarding claim 3, Fornage in view of Padmanabhan further in view of Othman discloses wherein the bidirectional power switch is configurable as a normally-on bidirectional switch [par. 0017-0020].
Regarding claim 5. Fornage in view of Padmanabhan further in view of Othman discloses wherein the first semiconductor die comprises GaN [430, fig. 4; par. 40], the second semiconductor die comprises GaN or Si [420, fig. 4], and the third semiconductor die comprises GaN or Si [440, fig. 4].
Regarding claim 10. Fornage in view of Padmanabhan further in view of Othman discloses, [par. 40] wherein the normally-on bidirectional switch device is a GaN HEMT (high-electron mobility transistor), wherein the first normally-off switch device is a Si power MOSFET (metal-oxide-semiconductor field-effect transistor), and wherein the second normally-off switch device is a Si power MOSFET [par. 91].
Regarding claim 11, Fornage in view of Padmanabhan further in view of Othman discloses further comprising: a first externally accessible gate terminal [gate 316] electrically connected to the normally-off gate of the first normally-off switch device; and a second externally accessible gate terminal [gate 317] electrically connected to the normally-off gate of the second normally-off switch device.
Regarding claim 12, Fornage in view of Padmanabhan further in view of Othman discloses further comprising: a third externally accessible gate terminal [gate 330] electrically connected to the first normally-on gate of the normally-on bidirectional switch device; and a fourth externally accessible gate terminal [gate 330] electrically connected to the second normally-on gate of the normally-on bidirectional switch device.
Regarding claim 13, Fornage in view of Padmanabhan further in view of Othman discloses [see fig. 1] wherein the molded package is devoid of externally accessible gate terminals for the first and second normally-on gates of the normally-on bidirectional switch device.
Regarding claim 14, Fornage in view of Padmanabhan further in view of Othman discloses further comprising: an externally accessible metal lead [104, fig. 1B] or pad electrically connected to a substrate of the first semiconductor die.
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Fornage et al. in view of Padmanabhan et al. and Othman et al. further in view of Machida et al. (US 2009/0167411 and Machida hereinafter).
Regarding claim 2, Fornage in view of Padmanabhan further in view of Othman discloses all the features with respect to claim 1 as indicated above. Fornage in view of Padmanabhan further in view of Othman does not explicitly discloses wherein the bidirectional power switch is configurable as a normally-off bidirectional switch.
However, Machida discloses [fig. 3] bidirectional power switch is configurable as a normally-off bidirectional switch [abstract]. It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to modify the invention of Fornage in view of Padmanabhan further in view of Othman as taught in Machida for the purpose of provide a switching device that operates normally off solely by use of semiconductor materials that have already been developed and are reliable as such [par. 0008].
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Fornage et al. in view of Padmanabhan et al. and Othman et al. further in view of Gupta et al. (US 2022/0157981 and Gupta hereinafter).
Regarding claim 4, Fornage in view of Padmanabhan further in view of Othman discloses all the features with respect to claim 1 as indicated above. Fornage in view of Padmanabhan further in view of Othman does not explicitly discloses wherein the bidirectional power switch is configurable as a hybrid bidirectional switch.
However, Gupta disclose [fig. 8A] a bidirectional power switch [800] is configurable as a hybrid bidirectional switch [par. 0096]. It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to modify the invention of Fornage in view of Padmanabhan further in view of Othman by hybrid bidirectional switch as taught in Gupta in order to improve the size, efficiency and output characteristics of the devices in order to accelerate market adaptation [par. 0005]
Claims 6-9 are rejected under 35 U.S.C. 103 as being unpatentable over Fornage et al. in view of Padmanabhan et al. and Othman et al. further in view of Machida et al. further in view of Soldano et al. (US 7164589 and Soldano hereinafter).
Regarding claim 6, Fornage in view of Padmanabhan further in view of Othman discloses all the features with respect to claim 1 as indicated above. Fornage in view of Padmanabhan further in view of Othman does not explicitly discloses a first diode having an anode electrically connected to the first normally-on gate of the normally-on bidirectional switch device and a cathode electrically connected to the source of first normally-off switch device; and a second diode having an anode electrically connected to the second normally-on gate of the normally-on bidirectional switch device and a cathode electrically connected to the source of second normally-off switch device.
However, Machida discloses comprising: a first diode [18] having an anode electrically connected to the normally-on gate [22] of the normally-on bidirectional switch device [13] and a cathode electrically connected to the source of first normally-off switch device [11]; and a second diode [19] having an anode electrically connected to the normally-on gate [22] of the normally-on bidirectional switch device and a cathode electrically connected to the source of second normally-off switch device [12]. It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to modify the invention of Fornage in view of Padmanabhan further in view of Othman by incorporating a first diode and a second diode as taught in Machida in order to determine the gate potential of the bidirectional semiconductor switch [par. 0047]. Fornage in view of Padmanabhan and Othman further in view of Machida does not explicitly disclose the first diode connected to first normally-on gate and the second diode connected to the second normally-on gate of the normally-on bidirectional switch device.
However, Soldano discloses [see fig. 3] a bidirectional switches [10] with a first diode [D3] connected to first normally-on gate [G1] and a second diode [D2] connected to a second normally-on gate [G2] of the normally-on bidirectional switch device. It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to modify the invention of Fornage in view of Padmanabhan further in view of and Othman further in view of Machida by incorporating the diodes as taught in Soldano in order to improve normally ON bi-directional switches.
Regarding claim 7, Fornage in view of Padmanabhan and Othman and Machida further in view of Soldano wherein the first diode and the second diode are integrated in the first semiconductor die [para. 102-103, 117, 120; ref. Machida].
Regarding claim 8, Fornage in view of Padmanabhan and Othman and Machida further in view of Soldano wherein the first semiconductor die is a GaN die [420, fig. 4, para. 40], the second semiconductor die is a first Si semiconductor die [440, fig. 4], and the second semiconductor die is a second Si semiconductor die, and wherein the GaN semiconductor die.
Regarding claim 9, Fornage in view of Padmanabhan and Othman and Machida further in view of Soldano, wherein the normally-on bidirectional switch device has a breakdown voltage of 600V or higher [par. 71], and wherein both the first diode and the second diode have a breakdown voltage of 20V or less [par. 75-79, ref. Machida].
Response to Arguments
Applicant's arguments filed on 05/18/2026 (Notice of Appeal) regarding the prior rejection under (Fornage and Padmanabhan and Othman), with respect to claim 1 have been fully considered. In light of these arguments, the Examiner has reevaluated the discloser of Fornage and Padmanabhan and Othman. Although the previous rational is withdrawn, the Examiner notes that Fornage and Padmanabhan and Othman however teaches or suggests the features relevant to the claimed invention. Accordingly, claim 1 is now rejected under Fornage in view of Padmanabhan further in view of Othman based on the revised reasoning. The rejection has therefore been modified as set forth above.
Conclusion
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/METASEBIA T RETEBO/ Primary Examiner, Art Unit 2836
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