Prosecution Insights
Last updated: April 18, 2026
Application No. 18/790,518

POWER ADAPTER DEVICE WITH INPUT POWER DETECTION

Non-Final OA §102
Filed
Jul 31, 2024
Examiner
DE LEON DOMENECH, RAFAEL O
Art Unit
2838
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
DELL PRODUCTS, L.P.
OA Round
1 (Non-Final)
88%
Grant Probability
Favorable
1-2
OA Rounds
2y 2m
To Grant
99%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allow Rate
418 granted / 477 resolved
+19.6% vs TC avg
Moderate +11% lift
Without
With
+11.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
17 currently pending
Career history
494
Total Applications
across all art units

Statute-Specific Performance

§101
0.7%
-39.3% vs TC avg
§103
40.4%
+0.4% vs TC avg
§102
39.6%
-0.4% vs TC avg
§112
12.0%
-28.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 477 resolved cases

Office Action

§102
DETAILED ACTION This Office action is in response to the application filed on July 31, 2024. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Inventorship This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Information Disclosure Statement The information disclosure statement (IDS) submitted on July 31, 2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Drawings The drawings were filed on July 31, 2024. These drawings are accepted by the Examiner. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-4 and 9-12 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by YU et al. (U.S. Pub. No. 2021/0249961 A1). In re claim 1, YU discloses (Figs. 1-4) a power adapter device (100) comprising: a rectifier bridge (108) including input terminals to receive an alternating current (AC) input voltage (104) for the power adapter device, and output terminals; a transformer (P1, S1, S2) including a primary side (P1) coupled to one of the output terminals of the rectifier bridge, and a secondary side (S1, S2) including a secondary side coil (S1) and a sub-coil (S2); a power delivery integrated circuit (PD IC) (130) coupled to the sub-coil of the transformer, the PD IC to: determine a direct current (DC) voltage across the sub-coil of the transformer (Para. 0033-0037); based on the DC voltage, determine a voltage level of the AC input voltage (Para. 0033-0037); and store the determined voltage level of the AC input voltage (Para. 0042-0044). In re claim 2, YU discloses (Figs. 1-4) wherein the PD IC further to determine an optimization level of the power adapter device based on the determined voltage level of the AC input voltage (Para. 0022-0024 and 0037-0040). In re claim 3, YU discloses (Figs. 1-4) wherein the PD IC further to determine a kilowatt per hour consumption of the power adapter device based on the determined voltage level of the AC input voltage (Para. 0022-0024 and 0037-0040). In re claim 4, YU discloses (Figs. 1-4) wherein the PD IC further to: receive a request for data stored in the PD IC; and in response to the reception of the request, provide the voltage level of the AC input voltage (Para. 0022-0024 and 0037-0040). In re claim 9, YU discloses (Figs. 1-4) a method comprising: receiving an alternating current (AC) input voltage (104) for a power adapter device (100) at a rectifier bridge (108) of the power adapter device; determining, by a power delivery integrated circuit (PD IC) (130) of the power adapter device, a direct current (DC) voltage across a sub-coil in a secondary side of a transformer (Para. 0033-0037); based on the DC voltage, determining a voltage level of the AC input voltage (Para. 0033-0037); and storing, by the PD IC, the determined voltage level of the AC input voltage (Para. 0042-0044). In re claim 10, YU discloses (Figs. 1-4) determining an optimization level of the power adapter device based on the determined voltage level of the AC input voltage (Para. 0022-0024 and 0037-0040). In re claim 11, YU discloses (Figs. 1-4) determining a kilowatt per hour consumption of the power adapter device based on the determined voltage level of the AC input voltage (Para. 0022-0024 and 0037-0040). In re claim 12, YU discloses (Figs. 1-4) receiving a request for data stored in the PD IC; and in response to the reception of the request, providing the voltage level of the AC input voltage (Para. 0022-0024 and 0037-0040). Allowable Subject Matter Claims 5-8 and 13-16 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Regarding to claim 5, the prior art of record fails to disclose or suggest “wherein prior to the determination of the DC voltage, the PD IC to disable a power factor correction of the power adapter device” in combination with other limitations of the claim. Claim 6 depends directly from claim 5 and is, therefore, also objected at least for the same reasons set above. Regarding to claim 7, the prior art of record fails to disclose or suggest “wherein prior to the determination of the DC voltage, the PD IC to disable a DC voltage output of the power adapter device” in combination with other limitations of the claim. Claim 8 depends directly from claim 7 and is, therefore, also objected at least for the same reasons set above. Regarding to claim 13, the prior art of record fails to disclose or suggest “wherein prior to the determination of the DC voltage, the method further comprises: disabling a power factor correction of the power adapter device” in combination with other limitations of the claim. Claim 14 depends directly from claim 13 and is, therefore, also objected at least for the same reasons set above. Regarding to claim 15, the prior art of record fails to disclose or suggest “wherein prior to the determination of the DC voltage, the method further comprises: disabling a power factor correction of the power adapter device” in combination with other limitations of the claim. Claim 16 depends directly from claim 15 and is, therefore, also a objected at least for the same reasons set above. Claims 17-20 are allowed. The following is a statement of reasons for the indication of allowable subject matter: Regarding to claim 17, the prior art of record fails to disclose or suggest “in response to the detection of the AC input voltage, disable a power factor correction of the power adapter device and direct current (DC) voltage output of the power adapter device” in combination with other limitations of the claim. Claims 18-20 depend directly or indirectly from claim 17 and are, therefore, also indicated as allowable at least for the same reasons set above. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to RAFAEL O. DE LEÓN DOMENECH whose telephone number is (571)270-0517. The examiner can normally be reached 8:00 a.m. -5:00 p.m.. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Hammond Crystal can be reached at (571) 270-1682. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /RAFAEL O DE LEON DOMENECH/Primary Examiner, Art Unit 2838
Read full office action

Prosecution Timeline

Jul 31, 2024
Application Filed
Mar 21, 2026
Non-Final Rejection — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
88%
Grant Probability
99%
With Interview (+11.3%)
2y 2m
Median Time to Grant
Low
PTA Risk
Based on 477 resolved cases by this examiner. Grant probability derived from career allow rate.

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