Prosecution Insights
Last updated: April 19, 2026
Application No. 18/790,544

METHODS, APPARATUS, AND ARTICLES OF MANUFACTURE TO COMMUNICATE MULTIPLE SIGNALS OVER AN ISOLATION CHANNEL

Non-Final OA §103
Filed
Jul 31, 2024
Examiner
TADESE, BERHANU
Art Unit
2632
Tech Center
2600 — Communications
Assignee
Texas Instruments Incorporated
OA Round
1 (Non-Final)
89%
Grant Probability
Favorable
1-2
OA Rounds
2y 2m
To Grant
95%
With Interview

Examiner Intelligence

Grants 89% — above average
89%
Career Allow Rate
413 granted / 466 resolved
+26.6% vs TC avg
Moderate +6% lift
Without
With
+6.3%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 2m
Avg Prosecution
8 currently pending
Career history
474
Total Applications
across all art units

Statute-Specific Performance

§101
4.0%
-36.0% vs TC avg
§103
66.2%
+26.2% vs TC avg
§102
5.8%
-34.2% vs TC avg
§112
15.6%
-24.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 466 resolved cases

Office Action

§103
DETAILED ACTION This Office Action is in response to the application as originally filed 07/31/2024. The detail office action to the pending claims 1-20 is as shown below. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to the Information Disclosure Statement The information disclosure statement filed 07/31//2024 has been acknowledged and considered by the Examiner. Initialed copy of the PTO-1449 is included in this correspondence. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1-5, 11, 12, 17, 20 are rejected under 35 U.S.C. 103 as being unpatentable over US11025242 to Bang et al. (“Bang”) in view of US11881857 to Song et al. (“Song”) (The remarks and/or references placed in the parentheses apply to the prior art) RE claim 1, Bang discloses an apparatus (100) comprising: a first die (118) having a first terminal (e.g. any one of node 328, 330, 332,334, 336, 338); a second die (120) having a second terminal (e.g. any one of node 352, 354, 356, 357); an isolation channel (122) coupled between the first terminal of the first die and the second terminal of the second die (e.g. Figs. 1, 3, 4 illustrate the isolation barrier (channel) is coupled between the first terminal of the first die and the second terminal of the second die); and control circuitry (102) disposed on the first die (e.g. Figs. 1, 3, 4 illustrate the computing system (microcontroller) is coupled to (disposed on) the first die), the control circuitry to cause transmission of a control data signal over the isolation channel during a first portion of a communication period (e.g. Bang, col. 4, lines 4-7, col. 6, lines 47-53, col. 10, lines 53-66, & col. 22, lines 30-50: the microcontroller may take actions to control the power switching device by transmitting control signals across the isolation barrier. For example, the computing system may control, monitor, and/or manage operations to regulate flow of current from the voltage supply node to the high voltage reference nodes); cause transmission of a power signal over the isolation channel and at least one of cause transmission of a control data signal over the isolation channel (e.g. Bang, col. 4, lines 4-7, col. 6, lines 47-53, col. 10, lines 53-66, & col. 22, lines 30-50: the microcontroller may take actions to control the power switching device by transmitting control signals across the isolation barrier. For example, the computing system may control, monitor, and/or manage operations to regulate flow of current from the voltage supply node to the high voltage reference nodes) or detect a feedback data signal over the isolation channel (e.g. Bang, col. 10, lines 64-66, col. 22, lines 30-50: For example, the computing system may monitor, sense (detect) one or more signals indicative of the operating conditions received from the isolated gate driver and generate one or more control signals in response to the output of one or more pins (nodes)). While the controller (computing system) may monitor, detect one or more signals indicative of the operating conditions received from the isolated gate driver and generates one or more control signals in response to the output of one or more nodes, as discussed above, and while it is well within the level of a person of ordinary skill in the art to comprehend that a feedback data refers to a signal that is received and allow the receiver to inform the transmitter about its channel conditions and/or signal qualities to optimize performance, the subject matter of claim 1 differs from Bang in that Bang does not expressly recite the term “feedback data” as recited by the claim. However, Song teaches or fairly suggests, in the same technical field, detect a feedback data signal over the isolation channel (see for example, col. 6, lines 53-65, col. 8, lines 10-15 of Song). Hence the prior art includes each element/feature as claimed, although not necessarily in a single prior art reference, with the only difference between the claimed invention and the prior art being the lack of actual combination of the elements in a single prior art reference. Thus, it would have been obvious at the time the invention was made to one of ordinary skill in the art to modify the feature/element disclosed by Bang with the knowledge generally available to one of ordinary skill in the art given the broadest reasonable interpretation in light of the Specification or with Song’s teaching such that feedback signals can be communicated between the gate driver and the controller in a pin-to-pin communication (see for example, col. 6, lines 53-65). Therefore one of ordinary skill in the art, such as an individual working in a field relates generally to gate drivers, and, more particularly, to methods and apparatus to transmit signals in isolated gate drivers could have combined the features/elements as claimed by known methods, and that in combination, each feature/method merely performs the same function as it does separately, with each feature/method retaining its advantageous function, yielding predictable result/s. It is for at least the aforementioned reasons that the Examiner has reached a conclusion of obviousness with respect to claim 1. RE claim 2, Bang discloses the apparatus of claim 1, wherein the isolation channel includes a transformer (e.g. Col. 7, lines 5-10 of Bang). RE claim 3, Bang discloses the apparatus of claim 1, wherein the isolation channel includes a bidirectional communication channel (e.g. Fig. 1, col. 6, lines 47-53: the first encoder 128 encodes one or more signals from the computing system 102, modulates, and transmits the signals across the isolation barrier 122 to the second decoder 134; and col. 7, lines 55-60: second encoder 136 encodes signals form sensor 108, modulates the signals and transmits the signals across the isolation barrier to the decode 130. Hence, the isolation barrier operates as a bidirectional communication channel). RE claim 4, Bang discloses the apparatus of claim 1, wherein the feedback data signal is indicative of at least one of a first status of a power supply voltage of the second die or a second status associated with operation of a power switch to be controlled based on the control data signal (e.g. Bang, col. 10, lines 64-66, col. 22, lines 30-50: For example, the computing system may monitor and sense (detect) signals received from the isolated gate driver and generates control signals in response, wherein the signals are indicative of the operating conditions of the switching operations of the switch (e.g. switch 106 of the second die) that regulate the flow of current from voltage supply node 312 to the high voltage reference node 314.) RE claim 5, Bang discloses the apparatus of claim 1, wherein the control circuitry is to: cause transmission of the control data signal over the isolation channel (e.g. Bang, col. 6, lines 47-53, col. 10, lines 64-66, col. 22, lines 30-50: For example, the computing system may monitor and sense (detect) signals received from the isolated gate driver; generates control signals in response; and transmits the signals across the isolation barrier); and cause transmission of the power signal over the isolation channel (e.g. Bang, col. 4, lines 4-7, col. 6, lines 47-53, col. 10, lines 53-66, & col. 22, lines 30-50: the microcontroller may take actions to control the power switching device by transmitting control signals across the isolation barrier. For example, the computing system may control and/or manage operations to regulate flow of current from the voltage supply node to the high voltage reference nodes). RE claim 11 Bang discloses a system (e.g. Figs. 1, 3, 4) comprising: a processor integrated circuit (IC) (102, 302) having an output terminal and an input terminal (e.g. any one of node 328, 330, 332, 334, 336, 338, 430, 432, 434, 436, 438, 440, 442, 444); a gate driver IC (104, 304, 404) having an isolation channel (122, 322, 424), a first output terminal on a first side of the isolation channel (e.g. Figs 1, 3, 4 illustrate first output terminal is on a first side of the isolation barrier), a second output terminal on a second side of the isolation channel (e.g. Figs 1, 3, 4 illustrate second output terminal that is on a second side of the isolation barrier), and an input terminal on the first side of the isolation channel (e.g. Figs 1, 3, 4 illustrate first input terminal that is on a first side of the isolation barrier), the first output terminal of the gate driver IC coupled to the input terminal of the processor IC (e.g. Figs 1, 3, 4 illustrate first output terminal of the gate driver IC coupled to the input terminal of the processor IC), the input terminal of the gate driver IC coupled to the output terminal of the processor IC (e.g. Figs 1, 3, 4 illustrate first input terminal of the gate driver IC coupled to the output terminal of the processor IC); and a power switch (106, 306, 406) having a control terminal coupled to the second output terminal of the gate driver IC (e.g. Figs 1, 3, 4 illustrate the power switch having a control terminal coupled to the second output terminal of the gate driver IC) , the gate driver IC to: at least one of (a) cause transmission of a control data signal for the power switch over the isolation channel (e.g. Bang, col. 4, lines 4-7, col. 6, lines 47-53, col. 10, lines 53-66, & col. 22, lines 30-50: the microcontroller may take actions to control the power switching device by transmitting control signals across the isolation barrier) or (b) provide a feedback data signal received from the second side of the isolation channel to the processor IC (e.g. Bang, col. 10, lines 64-66, col. 22, lines 30-50: For example, the computing system (microcontroller) may monitor, sense (detect) one or more signals indicative of the operating conditions received from the isolated gate driver and generate one or more control signals in response to the output of one or more pins (nodes)), the feedback data signal indicative of a status associated with the power switch (e.g. Bang, col. 10, lines 64-66, col. 22, lines 30-50: the one or more detected signals are indicative of the operating conditions received from the isolated gate driver); and cause transmission of a power signal for driving the power switch over the isolation channel (e.g. Bang, col. 4, lines 4-7, col. 6, lines 47-53, col. 10, lines 53-66, & col. 22, lines 30-50: the microcontroller may take actions to control the power switching device by transmitting control signals across the isolation barrier. For example, the computing system may control, monitor, and/or manage operations to regulate flow of current from the voltage supply node to the high voltage reference nodes). While the controller (computing system) may monitor, detect one or more signals indicative of the operating conditions received from the isolated gate driver and generates one or more control signals in response to the output of one or more nodes, as discussed above, and while it is well within the level of a person of ordinary skill in the art to comprehend that a feedback data refers to a signal that is received and allow the receiver to inform the transmitter about its channel conditions and/or signal qualities to optimize performance, the subject matter of claim 11 differs from Bang in that Bang does not expressly recite the term “feedback data” as recited by the claim. However, Song teaches or fairly suggests, in the same technical field, detect a feedback data signal over the isolation channel (see for example, col. 6, lines 53-65, col. 8, lines 10-15 of Song). Hence the prior art includes each element/feature as claimed, although not necessarily in a single prior art reference, with the only difference between the claimed invention and the prior art being the lack of actual combination of the elements in a single prior art reference. Thus, it would have been obvious at the time the invention was made to one of ordinary skill in the art to modify the feature/element disclosed by Bang with the knowledge generally available to one of ordinary skill in the art given the broadest reasonable interpretation in light of the Specification or with Song’s teaching such that feedback signals can be communicated between the gate driver and the controller in a pin-to-pin communication (see for example, col. 6, lines 53-65). Therefore one of ordinary skill in the art, such as an individual working in a field relates generally to gate drivers, and, more particularly, to methods and apparatus to transmit signals in isolated gate drivers could have combined the features/elements as claimed by known methods, and that in combination, each feature/method merely performs the same function as it does separately, with each feature/method retaining its advantageous function, yielding predictable result/s. It is for at least the aforementioned reasons that the Examiner has reached a conclusion of obviousness with respect to claim 11. RE claim 12, Bang discloses the system of claim 11, wherein the gate driver IC is to: cause transmission of the control data signal for the power switch over the isolation channel (e.g. Bang, col. 6, lines 47-53, col. 10, lines 64-66, col. 22, lines 30-50: For example, the computing system (microcontroller) may monitor and sense (detect) signals received from the isolated gate driver; generates control signals in response; and transmits the signals across the isolation barrier); and subsequently, cause transmission of the power signal for driving the power switch over the isolation channel (e.g. Bang, col. 4, lines 4-7, col. 6, lines 47-53, col. 10, lines 53-66, & col. 22, lines 30-50: the microcontroller may take actions to control the power switching device by transmitting control signals across the isolation barrier. For example, the computing system may control and/or manage operations to regulate flow of current from the voltage supply node to the high voltage reference nodes). RE claim 17, Bang discloses an apparatus (100) comprising: a first die (118) having a first terminal (e.g. any one of node 328, 330, 332,334, 336, 338); a second die (120) having a second terminal (e.g. any one of node 352, 354, 356, 357); an isolation channel (122) coupled between the first terminal of the first die and the second terminal of the second die (e.g. Figs. 1, 3, 4 illustrate the isolation barrier (channel) is coupled between the first terminal of the first die and the second terminal of the second die); and control circuitry (102) disposed on the first die (e.g. Figs. 1, 3, 4 illustrate the computing system (microcontroller) is coupled to (disposed on) the first die), cause transmission of a control data signal over the isolation channel during a first portion of a communication period (e.g. Bang, col. 4, lines 4-7, col. 6, lines 47-53, col. 10, lines 53-66, & col. 22, lines 30-50: the microcontroller may take actions to control the power switching device by transmitting control signals across the isolation barrier, at first); detect a feedback data signal during a second portion of the communication period (e.g. Bang, col. 10, lines 64-66, col. 22, lines 30-50: For example, the computing system may monitor, sense (detect) one or more signals indicative of the operating conditions received from the isolated gate driver); and cause transmission of a power signal over the isolation channel during a third portion of the communication period (e.g. Bang, col. 4, lines 4-7, col. 6, lines 47-53, col. 10, lines 53-66, & col. 22, lines 30-50: the microcontroller may take actions to control the power switching device by transmitting control signals in response to the output of one or more pins (nodes) of the switching device. For example, the computing system may manage operations to regulate flow of current from the voltage supply node to the high voltage reference nodes). While the controller (computing system) may monitor, detect one or more signals indicative of the operating conditions received from the isolated gate driver and generates one or more control signals in response to the output of one or more nodes, as discussed above, and while it is well within the level of a person of ordinary skill in the art to comprehend that a feedback data refers to a signal that is received and allow the receiver to inform the transmitter about its channel conditions and/or signal qualities to optimize performance, the subject matter of claim 17 differs from Bang in that Bang does not expressly recite the term “feedback data” as recited by the claim. However, Song teaches or fairly suggests, in the same technical field, detect a feedback data signal over the isolation channel (see for example, col. 6, lines 53-65, col. 8, lines 10-15 of Song). Hence the prior art includes each element/feature as claimed, although not necessarily in a single prior art reference, with the only difference between the claimed invention and the prior art being the lack of actual combination of the elements in a single prior art reference. Thus, it would have been obvious at the time the invention was made to one of ordinary skill in the art to modify the feature/element disclosed by Bang with the knowledge generally available to one of ordinary skill in the art given the broadest reasonable interpretation in light of the Specification or with Song’s teaching such that feedback signals can be communicated between the gate driver and the controller in a pin-to-pin communication (see for example, col. 6, lines 53-65). Therefore one of ordinary skill in the art, such as an individual working in a field relates generally to gate drivers, and, more particularly, to methods and apparatus to transmit signals in isolated gate drivers could have combined the features/elements as claimed by known methods, and that in combination, each feature/method merely performs the same function as it does separately, with each feature/method retaining its advantageous function, yielding predictable result/s. It is for at least the aforementioned reasons that the Examiner has reached a conclusion of obviousness with respect to claim 17. RE claim 20, Bang discloses the apparatus of claim 17, wherein the feedback data signal is indicative of at least one of a first status of a power supply voltage of the second die or a second status associated with operation of a power switch to be controlled based on the control data signal (e.g. Bang, col. 10, lines 64-66, col. 22, lines 30-50: For example, the computing system may monitor and sense (detect) signals received from the isolated gate driver and generates control signals in response, wherein the signals are indicative of the operating conditions of the switching operations of the switch (e.g. switch 106 of the second die) that regulate the flow of current from voltage supply node 312 to the high voltage reference node 314.) Objected but Allowable Subject Matter Claims 6-10, 13-16, 18-19 are objected to as being dependent upon rejected base claims, but would be allowable if rewritten in independent form including all of the limitations of their respective base claims and any intervening claims. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure are (See the attached Notice of References Cited (PTO-892)). These prior arts are considered pertinent because they generally relate to gate drivers, and, more particularly, to methods and apparatus to transmit signals in isolated gate drivers. Any inquiry concerning this communication or earlier communications from the examiner should be directed to BERHANU TADESE whose telephone number is (571)272-2478. The examiner can normally be reached Monday - Friday (9 - 5 PM EST). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http//www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Chieh M. Fan can be reached on 571.272.3042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit https//patentcenter.uspto.gov. Visit https//www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https//www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /BERHANU TADESE/Primary Examiner, Art Unit 2632
Read full office action

Prosecution Timeline

Jul 31, 2024
Application Filed
Feb 21, 2026
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
89%
Grant Probability
95%
With Interview (+6.3%)
2y 2m
Median Time to Grant
Low
PTA Risk
Based on 466 resolved cases by this examiner. Grant probability derived from career allow rate.

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