Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claim 12 has been amended to overcome the objection to the claim. The objection to the claim is withdrawn.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-4 and 15-16 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 20210320245 A1 (Kalitsov, et al., hereinafter Kalitsov) in view of US 9,812,499 (Satoh, et al., hereinafter Satoh).
Regarding claim 1, Kalitsov teaches a magnetoresistive memory cell, (Kalitsov, FIG. 1-2; Kalitsov, “an array of magnetoresistive or magnetoelectric memory cells…”) comprising: a magnetic polarizer layer (Kalitsov, [0003]: “the polarizer layer, also known as a reference layer.”; [0004]: “plurality of reference layers”; [0043]: “The magnetic tunnel junction 140 includes a reference layer 132 (which may also be referred to as a “pinned” layer) having a fixed vertical magnetization, a nonmagnetic tunnel barrier layer 134, and the free layer 136 (which may also be referred to as a “storage” layer) having a magnetization direction that can be programmed.”) having a hard magnetization along a hard magnetization direction; (Kalitsov, [0139]: “In one embodiment, the reference layer 132 may be provided as a component within a synthetic antiferromagnetic structure (SAF structure) 120. The SAF structure 120 can include a hard (i.e., fixed) ferromagnetic layer 112 with fixed magnetization along a vertical direction,”) a first magnetic tunnel junction (Kalitsov, “magnetic tunnel junction 140”) located on a first side of the magnetic polarizer layer and comprising a first reference layer having a first side facing the magnetic polarizer layer, (Kalitsov, FIG. 1) a first free layer facing a second side of the first reference layer, (Kalitsov, “the free layer 136.”) and a first tunnel barrier layer located between the first free layer and the first reference layer; (Kalitsov, FIG. 14-18, including FIG. 15; Kalitsov, [0022]: “tunnel barrier layer”) and a second magnetic tunnel junction (Kalitsov, “a magnetic tunnel junction 240”) located on a second side of the magnetic polarizer layer and comprising a second reference layer having a second side facing the magnetic polarizer layer, (Kalitsov, FIG. 1, 16; Kalitsov, [0211]: “The magnetic tunnel junction 240 can comprise, in order, a first reference layer 132, a first nonmagnetic tunnel barrier layer 134, a free layer 136, a second nonmagnetic tunnel barrier layer 234, and a second reference layer 232.”) a second free layer facing a first side of the second reference layer, (Kalitsov, [0211]: “The magnetic tunnel junction 240 can comprise, in order, a first reference layer 132, a first nonmagnetic tunnel barrier layer 134, a free layer 136, a second nonmagnetic tunnel barrier layer 234, and a second reference layer 232.”) and a second tunnel barrier layer located between the second free layer and the second reference layer. (Kalitsov, [0211]: “Generally, the eighth exemplary structure (as illustrated in FIG. 16 or as derived from any of the previously described exemplary structures) may include a memory device including: a first electrode 32, a second electrode 92, and a magnetic tunnel junction 240”; also Kalitsov, [0212]: “In some embodiments, the free layer 136 contacts the first nonmagnetic tunnel barrier 134 layer and the second nonmagnetic tunnel barrier layer 234. In some embodiments, the first nonmagnetic tunnel barrier layer 134 contacts the first reference layer 132, and the second nonmagnetic tunnel barrier layer 234 contacts the second reference layer 232.”).
Kalitsov does not appear to teach and a selector element.
Satoh cures the deficiencies of Kalitsov. Satoh teaches a selector element (Satoh, FIG. 1-9; Satoh, (2): “A resistance-based memory device normally comprises an array of memory cells, each of which includes a memory element and a selector element coupled in series between two electrodes. The selector element functions like a switch to direct current or voltage through the selected memory element coupled thereto. The selector element may be a three terminal device, such as transistor, or a two-terminal device, such as diode or Ovonic threshold switch.”; Satoh, (20): “An embodiment of the present invention as applied to a bi-directional two-terminal selector element that minimizes read disturbance will now be described with reference to FIG. 3, which illustrates an I-V response curve 80 for the selector element without an external load coupled thereto. In contrast to the I-V response curve 50 of FIG. 2 for the conventional selector device with a single threshold voltage, the present selector element has two threshold voltages, V.sub.th1 and V.sub.th2. The I-V response curve 80 of FIG. 3 shows the magnitude of electric current passing through the two-terminal selector element as the voltage applied thereto varies….”)
Kalitsov and Satoh are both directed to memory devices incorporating a selector element with at least one threshold. One of ordinary skill in the art would be motivated to combine the memory cell of Kalitsov with the selector element of Satoh with the motivation of only allowing conduction when a voltage difference is greater than a voltage magnitude with the motivation of improving functionality of the memory device.
Regarding claim 2, Kalitsov/Satoh teaches the magnetoresistive memory cell of Claim 1, wherein: the first reference layer faces the first side of the magnetic polarizer layer, is antiferromagnetically coupled to the magnetic polarizer layer, and has a first fixed magnetization direction that is antiparallel to the hard magnetization direction; (Kalitsov, [0047]: “In one embodiment, the reference layer 132 may be provided as a component within a synthetic antiferromagnetic structure (SAF structure) 120. The SAF structure 120 can include a hard (i.e., fixed) ferromagnetic layer 112 with fixed magnetization along a vertical direction, an antiferromagnetic coupling layer 114, and the reference layer 132 which remains adjacent to the nonmagnetic tunnel barrier layer 134. “) and the second reference layer faces the second side of the magnetic polarizer layer, antiferromagnetically coupled to the magnetic polarizer layer, and has a second fixed magnetization direction that is antiparallel to the hard magnetization direction. (Kalitsov, including FIG. 16-19; “second reference layer 232; Kalitsov, [0005]: “In one embodiment, the plurality of reference layers comprise a first reference layer and a second reference layer, and the at least one free layer is located between the first reference layer and the second reference layer.”; [0208]: “ second reference layer 232 between the free layer 136 and a material layer that directly overlies, and contacts, a top surface of the free layer 136. In this case, the second nonmagnetic tunnel barrier layer 234 contacts a top surface of the free layer 136, and the second reference layer 232 contacts a top surface of the second nonmagnetic tunnel barrier layer 234. In one embodiment, the second reference layer 132 may be provided as a component within a second synthetic antiferromagnetic structure (SAF structure)….”)
Regarding claim 3, Kalitsov/Satoh teaches the magnetoresistive memory cell of Claim 2, wherein: the first magnetic tunnel junction has a first parallel state resistance when a magnetization direction of the first free layer is parallel to the first fixed magnetization direction; and the second magnetic tunnel junction has a second parallel state resistance when a magnetization direction of the second free layer is parallel to the second fixed magnetization direction. (Kalitsov, including [0003]: “A resistance differential of a magnetic tunnel junction between different magnetization states of the free layer can be employed to store data within the magnetoresistive random access memory (MRAM) cell depending if the magnetization of the free layer is parallel or antiparallel to the magnetization of the polarizer layer, also known as a reference layer.”)
Regarding claim 4, Kalitsov/Satoh teaches the magnetoresistive memory cell of Claim 3, wherein the first free layer and the second free layer both comprise a positive spin polarization material. (Instant specification defines “positive spin polarization material” as “[0106]: (e.g., a ferromagnetic material such as CoFeB having a positive spin polarization)” (Kalitsov, [0048]: “The free layer 136 includes a ferromagnetic material such as CoFeB, CoFe, Co, Ni, NiFe, or a combination thereof. If a CoFeB alloy is included in the free layer 136, then the atomic concentration of boron atoms within the CoFeB alloy may be in a range from 10% to 30% (such as 20%),”); Kalitsov, [0024]: “Each of the first free layer 136 and the second free layer 236 may have any material composition that may be employed for the free layer 136 in previously described embodiments. “)
Regarding claim 15, Kalitsov/Satoh teaches the magnetoresistive memory cell of Claim 1, wherein the magnetic polarizer layer comprises a hard magnet layer. (Kalitsov, [0047]: “In one embodiment, the reference layer 132 may be provided as a component within a synthetic antiferromagnetic structure (SAF structure) 120. The SAF structure 120 can include a hard (i.e., fixed) ferromagnetic layer 112 with fixed magnetization along a vertical direction,”) and the selector element comprises an ovonic threshold switch material. (Satoh, (2): “The selector element may be a three terminal device, such as transistor, or a two-terminal device, such as diode or Ovonic threshold switch.”)
Regarding claim 16, Kalitsov/Satoh teaches the magnetoresistive memory cell of Claim 1, wherein: the first reference layer underlies the magnetic polarizer layer; the first free layer underlies the first reference layer; the second reference layer overlies the magnetic polarizer layer; and the second free layer overlies the second reference layer. (Kalitsov, FIG. 1, 16; [0030]: “As used herein, a “layer” refers to a material portion including a region having a thickness. A layer may extend over the entirety of an underlying or overlying structure, or may have an extent less than the extent of an underlying or overlying structure. Further, a layer may be a region of a homogeneous or inhomogeneous continuous structure that has a thickness less than the thickness of the continuous structure.”)
Allowable Subject Matter
Claims 5-12, 14, and 17-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 21-23 allowed.
The following is an examiner’s statement of reasons for allowance: The prior art of record does not appear to teach a magnetoresistive memory device, comprising: a magnetoresistive memory cell, comprising: a magnetic polarizer layer having a hard magnetization along a hard magnetization direction; a first magnetic tunnel junction located on a first side of the magnetic polarizer layer and comprising a first reference layer having a first side facing the magnetic polarizer layer, a first free layer facing a second side of the first reference layer, and a first tunnel barrier layer located between the first free layer and the first reference layer; and a second magnetic tunnel junction located on a second side of the magnetic polarizer layer and comprising a second reference layer having a second side facing the magnetic polarizer layer, a second free layer facing a first side of the second reference layer, and a second tunnel barrier layer located between the second free layer and the second reference layer, wherein: the first reference layer faces the first side of the magnetic polarizer layer, is antiferromagnetically coupled to the magnetic polarizer layer, and has a first fixed magnetization direction that is antiparallel to the hard magnetization direction; the second reference layer faces the second side of the magnetic polarizer layer, antiferromagnetically coupled to the magnetic polarizer layer, and has a second fixed magnetization direction that is antiparallel to the hard magnetization direction; the first magnetic tunnel junction has a first parallel state resistance when a magnetization direction of the first free layer is parallel to the first fixed magnetization direction; the second magnetic tunnel junction has a second parallel state resistance when a magnetization direction of the second free layer is parallel to the second fixed magnetization direction; and the first free layer and the second free layer both comprise a positive spin polarization material; and a programming circuit configured to program magnetization directions of the first free layer and the second free layer into two magnetic configurations comprising: a first, relatively low resistance magnetic configuration in which the first magnetic tunnel junction is in a first parallel state and the second magnetic tunnel junction is in a second parallel state; and a second, relatively high resistance magnetic configuration in which the first magnetic tunnel junction is in a first antiparallel state and the second magnetic tunnel junction is in a second antiparallel state, wherein the relatively high resistance is higher than the relatively low resistance; and/or
a magnetoresistive memory cell, comprising: a magnetic polarizer layer having a hard magnetization along a hard magnetization direction; a first magnetic tunnel junction located on a first side of the magnetic polarizer layer and comprising a first reference layer having a first side facing the magnetic polarizer layer, a first free layer facing a second side of the first reference layer, and a first tunnel barrier layer located between the first free layer and the first reference layer; and a second magnetic tunnel junction located on a second side of the magnetic polarizer layer and comprising a second reference layer having a second side facing the magnetic polarizer layer, a second free layer facing a first side of the second reference layer, and a second tunnel barrier layer located between the second free layer and the second reference layer, wherein: the first reference layer faces the first side of the magnetic polarizer layer, is antiferromagnetically coupled to the magnetic polarizer layer, and has a first fixed magnetization direction that is antiparallel to the hard magnetization direction; the second reference layer faces the second side of the magnetic polarizer layer, antiferromagnetically coupled to the magnetic polarizer layer, and has a second fixed magnetization direction that is antiparallel to the hard magnetization direction; the first magnetic tunnel junction has a first parallel state resistance when a magnetization direction of the first free layer is parallel to the first fixed magnetization direction; the second magnetic tunnel junction has a second parallel state resistance when a magnetization direction of the second free layer is parallel to the second fixed magnetization direction; and the first free layer comprises a positive spin polarization material and the second free layer comprises a negative spin polarization material; and/or
a method comprising programming a magnetoresistive memory cell into two different memory states, wherein: the magnetoresistive memory cell comprises: a magnetic polarizer layer having a hard magnetization along a hard magnetization direction; a first magnetic tunnel junction located on a first side of the magnetic polarizer layer and comprising a first reference layer having a first side facing the magnetic polarizer layer, a first free layer facing a second side of the first reference layer, and a first tunnel barrier layer located between the first free layer and the first reference layer; and a second magnetic tunnel junction located on a second side of the magnetic polarizer layer and comprising a second reference layer having a second side facing the magnetic polarizer layer, a second free layer facing a first side of the second reference layer, and a second tunnel barrier layer located between the second free layer and the second reference layer, wherein: the first reference layer faces the first side of the magnetic polarizer layer, is antiferromagnetically coupled to the magnetic polarizer layer, and has a first fixed magnetization direction that is antiparallel to the hard magnetization direction; the second reference layer faces the second side of the magnetic polarizer layer, antiferromagnetically coupled to the magnetic polarizer layer, and has a second fixed magnetization direction that is antiparallel to the hard magnetization direction; the first magnetic tunnel junction has a first parallel state resistance when a magnetization direction of the first free layer is parallel to the first fixed magnetization direction; the second magnetic tunnel junction has a second parallel state resistance when a magnetization direction of the second free layer is parallel to the second fixed magnetization direction; and the first free layer and the second free layer both comprise a positive spin polarization material; and the two different memory states comprise: a first, relatively low resistance memory state in which the first magnetic tunnel junction is in a first parallel state and the second magnetic tunnel junction is in a second parallel state; and a second, relatively high resistance memory state in which the first magnetic tunnel junction is in a first antiparallel state and the second magnetic tunnel junction is in a second antiparallel state.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DANIEL J KING whose telephone number is (703)756-1232. The examiner can normally be reached M-F 9am-5pm.
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/DANIEL JOHN KING/Examiner, Art Unit 2827 /AMIR ZARABIAN/Supervisory Patent Examiner, Art Unit 2827
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