Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Election/Restrictions
Claims 11-13 withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on December 7, 2025.
Drawings
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(4) because reference character “1400” has been used to designate both a voltage generation circuit (Fig. 1, 15) and a delay distribution method (Fig. 14).
The drawings are objected to under 37 CFR 1.83(a) because they fail to show the second clock signal CLKA is to be generated by analog delay duration TANA, but it appears that Fig. 2A shows a combination of CLKA and CLKB as described in the specification paragraph 0047. Any structural detail that is essential for a proper understanding of the disclosed invention should be shown in the drawing. MPEP § 608.02(d).
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because they do not include the following reference sign(s) mentioned in the description: TFIX (paragraph 0034); T1, T2, TANA, TDIG (paragraph 0035). These examples are not the entire list. Applicant is required to review the specification to correct any additional errors.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Specification
The disclosure is objected to because of the following informalities: regarding the adjusted second clock signal (CLKB), in paragraph 0035 CLKB is called out as adjusted clock signal.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1 and 16 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for
applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 (lines 4-8) recites "delay the m-th delay signal by a first reference duration, an analog delay duration, and a second reference duration to correspondingly generate a first clock signal, a second clock signal, and a third clock signal, adjust the digital delay duration according to the first clock signal, the second clock signal, and the third clock signal". It appears the first clock signal (CLKA') is generated from the first delay reference duration/circuit (1220), the third clock signal (CLKA'') is generated from the second delay reference duration/circuit (1230), but it is unclear how the second clock signal (CLKA) is generated from the analog delay duration/circuit (1240), as Fig. 2A shows CLKA as an input to the reset circuit (1252).
Claim 1 (lines 20-21) recites "to readjust the adjusted analog delay duration until a twice-adjusted second clock signal output from the delay distribution circuit". It is unclear where the twice-adjusted second clock signal is shown in the drawings and how this output is formed.
Claims 2-15 inherit the defects of the independent claim 1.
Claim 16 (lines 7-11) recites "delaying the m-th delay signal by a first reference duration, an analog delay duration, and a second reference duration to correspondingly generate a first clock signal, a second clock signal, and a third clock signal, and adjusting the digital delay duration according to the first clock signal, the second clock signal, and the third clock signal". It appears the first clock signal (CLKA') is generated from the first delay reference duration/circuit (1220), the third clock signal (CLKA'') is generated from the second delay reference duration/circuit (1230), but it is unclear how the second clock signal (CLKA) is generated from the analog delay duration/circuit (1240), as Fig. 2A shows CLKA as an input to the reset circuit (1252).
Claim 16 (lines 23-25) recites "to readjust the adjusted analog delay duration until a twice-adjusted second clock signal output from the delay distribution circuit". It is unclear where the twice-adjusted second clock signal is shown in the drawings and how this output is formed.
Claims 17-21 inherit the defects of the independent claim 16.
Allowable Subject Matter
Claims 1 and 16 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action.
Claims 2-10, 14-15, and 17-21 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Fiscus (US 6628154 B2) and Vlasenko et al. (US 20040125905 A1); the prior art discloses a standard delay-locked loop including a delay line, a phase detector, a voltage generation circuit.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Amit Bhatia whose telephone number is (571)272-4410. The examiner can normally be reached Monday-Friday 8:30am-4:30pm EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lincoln Donovan can be reached at (571) 272-1988. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Amit R Bhatia/Examiner, Art Unit 2842 /LINCOLN D DONOVAN/Supervisory Patent Examiner, Art Unit 2842