Prosecution Insights
Last updated: April 19, 2026
Application No. 18/791,405

SYSTEMS, METHODS, AND APPARATUS FOR UPSTREAM PORT DUPLICATION ON VIRTUAL SWITCHES

Non-Final OA §103§112
Filed
Jul 31, 2024
Examiner
SHIN, CHRISTOPHER B
Art Unit
2181
Tech Center
2100 — Computer Architecture & Software
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
90%
Grant Probability
Favorable
1-2
OA Rounds
2y 2m
To Grant
95%
With Interview

Examiner Intelligence

Grants 90% — above average
90%
Career Allow Rate
589 granted / 656 resolved
+34.8% vs TC avg
Minimal +5% lift
Without
With
+4.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
17 currently pending
Career history
673
Total Applications
across all art units

Statute-Specific Performance

§101
4.0%
-36.0% vs TC avg
§103
48.1%
+8.1% vs TC avg
§102
9.2%
-30.8% vs TC avg
§112
23.4%
-16.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 656 resolved cases

Office Action

§103 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claims 1-20 have been presented and pending in the application. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 4, 12-15 & 17 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. In Claim 4; In line 2, the phrase “device from the at least one memory device” lacks proper and clear antecedent basis. In Claim 12; In lines 2 & 7, it is unclear as to whether & how the respective “device” is functionally & structurally interconnected to each other. In lines 3 & 5, it is unclear as to whether & how the respective “memory device” is functionally & structurally interconnected to each other. In Claim 13; In line 1, the “device” lacks proper and clear antecedent basis (i.e., more than one devices have been presented earlier). In Claim 14; In line 4, the “memory device” lacks proper and clear antecedent basis (i.e., more than one memory devices have been presented earlier). In line 5, the “device” lacks proper and clear antecedent basis (i.e., more than one devices have been presented earlier). In Claim 15; In line 2, the “device” lacks proper and clear antecedent basis (i.e., more than one devices have been presented earlier). In line 7, the “memory device” lacks proper and clear antecedent basis (i.e., more than one memory devices have been presented earlier). In Claim 17; In lines 2-3, it is unclear and unstated as to whether and how the respective “a first device and a second device” (i.e., claim 16, line 5 & claim 17, lines 2-3) are functionally & structurally interconnected to each other. In line 4, the “first device” lacks proper and clear antecedent basis (i.e., more than one first devices have been presented earlier). In line 6, the “second device” lacks proper and clear antecedent basis (i.e., more than one first devices have been presented earlier). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over HONG (US 2024/0338330 A1). The examiner relies on the entire teachings of the HONG reference, the examiner advises the applicant to carefully consider the entire teachings of the HONG to better understand the examiner’s position & the interpretations applied to the claimed invention. As for the independent claims 1, 12 & 16, the HONG reference teaches functionally equivalent limitations of the claimed invention, when the examiner applies Broadest Reasonable Interpretation, as follows: Claims 1, 12 & 16 HONG Ref. Teachings 1.An apparatus comprising: a switch comprising: Figs 1-4 with accompanying description, (120/300) a first interface configured to communicate with at least one memory device; and Figs 1-4 with accompanying description, any one or more connections between (120/300) & (104/110) a second interface configured to communicate with a first physical connector and a second physical connector; Figs 1-4 with accompanying description, any one or more connections between (120/300) & (104/110) wherein the switch is configured to communicate with a device using the first physical connector using a memory access protocol. Figs 1-4 with accompanying description, any one or more connections between (120/300 & 108/104/110) using CXL protocols; the first & second devices are taught by a plurality of (104)s and/or (110)s 12. A system comprising: a device; Figs 2 & 4 with accompanying description, (100) a memory device, and Figs 1-4 with accompanying description, (110A-F) a switch device comprising a virtual switch, the virtual switch comprising: Figs 1-4 with accompanying description, (300/120/122) a first interface configured to communicate with at least one memory device; and Figs 2 & 4 with accompanying description, any one or more connections between (120 & 110) a second interface configured to communicate with a first physical connector and a second physical connector; Figs 2 & 4 with accompanying description, any one or more connections between (120 & 110) wherein the switch device is configured to communicate with a device using the first physical connector using a memory access protocol. Figs 2 & 4 with accompanying description, any one or more connections between (120 & 110) using CXL protocols 16. A method comprising: receiving, at a virtual switch using a first interface, data from a memory device using a memory access protocol; and Fig 1-4 with accompanying description, any connections between 104s & 110s via 120 using CXL protocol; the examiner notes that the claimed data can be originated and destined between any one or more of 104s & 110s; see also par 81, “user data” & “secondary data” read & write operations of fig 3 transferring, from the virtual switch using a second interface, at least a portion of the data to a first device and a second device using the memory access protocol. Fig 1-4 with accompanying description, any connections between 108s/104s & 110s via 120/300 using CXL protocol; the examiner notes that the claimed data can be originated and destined between any one or more of 104s & 110s & the claimed interfaces can be any connections between the 104s, 110s & 120/300; see also par 81, “user data” & “secondary data” read & write operations of fig 3 As can be seen from the above detailed teachings of the claims 1, 12 & 16, the HONG reference does not expressly/identically labels the HONG’s reference teachings of the “hosts (104A…104#)” as the claimed “memory device”; however, such difference in expression or label is an obvious variation from the functional equivalence teachings of the “hosts” (i.e., in paragraph 66, HONG teaches the “plurality of hosts (e.g., 104A, 104B) may be understood as a computing device such as personal computers and workstations. For a first host (Host 1, 104A) may include a host processor, a host memory, and a storage device…in the host memory an internal memory volatile memory, or permanently store the data in the storage device as needed”). Consequently, one of ordinary skill in the art commonly understand and knows that the term “hosts”, at least, perform/teach the functionally equivalent limitations of the claimed “memory device” (i.e., a source of data). Therefore, it would have been obvious before the effective filing date of the claimed invention to one having ordinary skill in the art to come up with the claimed invention from the functionally equivalent teachings of the HONG reference for the detailed teachings and the obvious reasons discussed above. Similarly, as in claims 1 & 12, the HONG reference does not expressly/identically labels “physical connector” for proving the claimed function/operation of “communicate with a device”; however, such not expressly labeled physically connector function is clearly performed/taught by the functionally equivalent teachings of the HONG reference (i.e., see the Figs 1-4 with accompanying description, any one or more connections between (120/300 & 108/104/110) using CXL protocols performs the claimed “communication” between connected devices inherently/obviously teaches the claimed “connector”; the first & second devices are taught by a plurality of (104)s and/or (110)s). Consequently, it would have been obvious before the effective filing date of the claimed invention to one having ordinary skill in the art to come up with the claimed invention from the functionally equivalent teachings of the HONG reference for the detailed teachings and the obvious reasons discussed above. As for the further limiting dependent claims 2-11, 13-15 & 17-20, the HONG reference teaches the claimed limitations as follows: Claims 2-11, 13-15 & 17-20 HONG Ref. Teachings 2.The apparatus of claim 1, wherein the device is a first device; and wherein the second interface is configured to communicate with a second device using the second physical connector using the memory access protocol. Figs 1-4 with accompanying description, any one or more connections between (120/300 & 108/104/110) using CXL protocols; the first & second devices are taught by a plurality of (104)s and/or (110)s 3.The apparatus of claim 1, wherein the first physical connector is configured to connect to a connector on the device. Figs 1-4 with accompanying description, any one or more connections between (120/300) & (108/104/110) 4. The apparatus of claim 1, wherein the first physical connector is configured to send data to the device from the at least one memory device. Fig 1-4 with accompanying description, any connections between 108s/104s & 110s via 120/300 using CXL protocol; the examiner notes that the claimed data can be originated and destined between any one or more of 104s & 110s & the claimed interfaces can be any connections between the 104s, 110s & 120/300; see also par 81, “user data” & “secondary data” read & write operations of fig 3 5. The apparatus of claim 1, wherein the device is a first device; and wherein the second physical connector is configured to send data to a second device from the at least one memory device. Fig 1-4 with accompanying description, any connections between 108s/104s & 110s via 120/300 using CXL protocol; the examiner notes that the claimed data can be originated and destined between any one or more of 104s & 110s & the claimed interfaces can be any connections between the 104s, 110s & 120/300; see also par 81, “user data” & “secondary data” read & write operations of fig 3 6. The apparatus of claim 1, wherein the switch is a first switch; wherein the apparatus further comprises a second switch; and wherein the second switch comprises: a third interface configured to communicate with the at least one memory device; and a fourth interface configured to communicate with a third physical connector and a fourth physical connector, wherein the second switch is configured to communicate with the device using the third physical connector using the memory access protocol. Fig 1-4 with accompanying description, any connections between 108s/104s & 110s via 120/300 using CXL protocol; the examiner notes that the claimed data can be originated and destined between any one or more of 104s & 110s & the claimed interfaces can be any connections between the 104s, 110s & 120/300; see also par 81, “user data” & “secondary data” read & write operations of fig 3 7. The apparatus of claim 6, wherein the device is a first device; and wherein the apparatus is further configured to connect to a second device using the second physical connector on the first switch and the fourth physical connector on the second switch. Fig 1-4 with accompanying description, any connections between 108s/104s & 110s via 120/300 using CXL protocol; the examiner notes that the claimed data can be originated and destined between any one or more of 104s & 110s & the claimed interfaces can be any connections between the 104s, 110s & 120/300; see also par 81, “user data” & “secondary data” read & write operations of fig 3 8. The apparatus of claim 6, wherein the second physical connector is configured to connect to a connector on a second device. Fig 1-4 with accompanying description, any connections between 108s/104s & 110s via 120/300 using CXL protocol; the examiner nots that the claimed data can be originated and destined between any one or more of 104s & 110s & the claimed interfaces can be any connections between the 104s, 110s & 120/300; see also par 81, “user data” & “secondary data” read & write operations of fig 3 9. The apparatus of claim 6, wherein the fourth physical connector is configured to connect to a connector on a second device. Fig 1-4 with accompanying description, any connections between 108s/104s & 110s via 120/300 using CXL protocol; the examiner nots that the claimed data can be originated and destined between any one or more of 104s & 110s & the claimed interfaces can be any connections between the 104s, 110s & 120/300; see also par 81, “user data” & “secondary data” read & write operations of fig 3 10. The apparatus of claim 1, further comprising a second switch; wherein the device is a first device; wherein the second switch comprises: a third interface configured to communicate with the at least one memory device; and a fourth interface configured to communicate with a third physical connector and a fourth physical connector; wherein the third physical connector is configured to communicate with the first device; and wherein the second physical connector and fourth physical connector are configured to communicate with a second device using the memory access protocol. Fig 1-4 with accompanying description, any connections between 108s/104s & 110s via 120/300 using CXL protocol; the examiner notes that the claimed data can be originated and destined between any one or more of 104s & 110s & the claimed interfaces can be any connections between the 104s, 110s & 120/300; see also par 81, “user data” & “secondary data” read & write operations of fig 3 11. The apparatus of claim 1, wherein a same data from the at least one memory device is sent to the first physical connector and the second physical connector. Fig 1-4 with accompanying description, any connections between 108s/104s & 110s via 120/300 using CXL protocol; the examiner notes that the claimed data can be originated and destined between any one or more of 104s & 110s & the claimed interfaces can be any connections between the 104s, 110s & 120/300; see also par 81, “user data” & “secondary data” read & write operations of fig 3 13. The system of claim 12, wherein the device is a first device; and wherein the system further comprises: a second device, wherein the second device is connected to the virtual switch using the first interface using the memory access protocol. Figs 2 & 4 with accompanying description, any one or more connections between (120 & 110) using CXL protocols; the first & second devices are taught by a plurality of (110)s 14. The system of claim 12, wherein the virtual switch is a first virtual switch; and wherein the switch device further comprises: a second virtual switch comprising a third interface and fourth interface; wherein the second virtual switch is connected to the memory device using the third interface using the memory access protocol, and wherein the second virtual switch is connected to the device using the fourth interface using the memory access protocol. Figs 2 & 4 with accompanying description, any one or more connections between (120 & 110) using CXL protocols; the first & second virtual switches are taught by plurality of (120)s & the first & second devices are taught by a plurality of (110)s 15. The system of claim 12, wherein the device is a first device; wherein the virtual switch is a first virtual switch; wherein the system comprises a second device; and wherein the switch device further comprises: a second virtual switch comprising a third interface and fourth interface; wherein the second virtual switch is connected to the memory device using the third interface using the memory access protocol; wherein the second virtual switch is connected to the first device using the fourth interface using the memory access protocol, and wherein the second device is connected to the first virtual switch using the first interface and is connected to the second virtual switch using the fourth interface using the memory access protocol. Fig 1-4 with accompanying description, any connections between 108s/104s & 110s via 120/300 using CXL protocol; the examiner notes that the claimed data can be originated and destined between any one or more of 104s & 110s & the claimed interfaces can be any connections between the 104s, 110s & 120/300; see also par 81, “user data” & “secondary data” read & write operations of fig 3 17. A method of claim 16, wherein the second interface comprises a first connector and a second connector; and wherein the transferring at least a portion of the data to a first device and a second device using the memory access protocol comprises; transferring, using the first connector, the at least a portion of the data to the first device using the memory access protocol; and transferring, using the second connector, the at least a portion of the data to the second device using the memory access protocol. Fig 1-4 with accompanying description, any connections between 108s/104s & 110s via 120/300 using CXL protocol; the examiner notes that the claimed data can be originated and destined between any one or more of 104s & 110s & the claimed interfaces can be any connections between the 104s, 110 & 120; see also par 81, “user data” & “secondary data” read & write operations of fig 3 18. The method of claim 16, wherein the at least a portion of the data is a first portion of data; and wherein the method further comprises: transferring, from the second interface, at least a second portion of the data to a second host device. Fig 1-4 with accompanying description, any connections between 108s/104s & 110s via 120/300 using CXL protocol; the examiner nots that the claimed data can be originated and destined between any one or more of 104s & 110s & the claimed interfaces can be any connections between the 104s, 110s & 120/300; see also par 81, “user data” & “secondary data” read & write operations of fig 3 19. The method of claim 16, wherein the virtual switch is a first virtual switch; wherein the data is first data; and wherein the method further comprises: receiving, at a second virtual switch using a third interface, second data from the memory device using the memory access protocol; and transferring, from the second virtual switch using a fourth interface, at least a portion of the second data to the first device and the second device. Fig 1-4 with accompanying description, any connections between 108s/104s & 110s via 120/300 using CXL protocol; the examiner notes that the claimed data can be originated and destined between any one or more of 104s & 110s & the claimed interfaces can be any connections between the 104s, 110s & 120/300; see also par 81, “user data” & “secondary data” read & write operations of fig 3 20. The method of claim 19, wherein the at least a portion of the first data is a first portion; wherein the at least a portion of the second data is a second portion; and wherein the method further comprises interleaving the first portion and the second portion. Par 46, “each device is coupled to one or more centralized switches that transfer data between devices…mesh fabric, where each device connects to every other device on a network, allowing multiple paths for data to travel in the network; examiner notes that the multiple paths data transmission teaches the claimed interleaving limitation; in addition, the interleaving operations are well-known, e.g., par 67, “high speed operations , such as calculations or operations related to…(AI),…(ML)…” The further limiting claims 2-11, 13-15 & 17-20 further add functional limitations relating to further added specific functions of communicating data (i.e., more detailed data communications between connected devices); however, such added details are obvious variations of possible operations of the functional read and/or write operations between the connected devices/units (e.g., Hosts 104s & Devices 110s) that are also well-known types of data communications. In other words, one having ordinary skill in the art can easily come up with or perform any specific combinations of the read and/or write data operations in the HONG’s system (i.e., figures 1-4 with accompanying description) to perform the functionally equivalent operations/functions of the claimed invention. Therefore, it would have been obvious before the effective filing date of the claimed invention to one having ordinary skill in the art to come up with the claimed invention from the functionally equivalent teachings of the HONG reference for the detailed teachings and the obvious reasons discussed above. Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHRISTOPHER B SHIN whose telephone number is (571)272-4159. The examiner can normally be reached 8:00-4:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, IDRISS N ALROBAYE can be reached at 571-270-1023. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CHRISTOPHER B SHIN/ Primary Examiner, Art Unit 2181
Read full office action

Prosecution Timeline

Jul 31, 2024
Application Filed
Jan 16, 2026
Non-Final Rejection — §103, §112
Apr 14, 2026
Applicant Interview (Telephonic)
Apr 14, 2026
Examiner Interview Summary

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
90%
Grant Probability
95%
With Interview (+4.9%)
2y 2m
Median Time to Grant
Low
PTA Risk
Based on 656 resolved cases by this examiner. Grant probability derived from career allow rate.

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