DETAILED ACTION
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
2. This communication is in response to the communication filed on 08/01/2024.
3. Acknowledgement is made of Continuing Data: This application is a CON of 17/309,465 filed 05/28/2021, now PAT 12056483; which is a 371 of PCT/US2019/068973 filed 12/30/2019; which has a PRO 62/928,748 filed 10/31/2019.
4. Claims filed 08/01/2024 have been acknowledged. Claims 1-20 are pending in the application.
Information Disclosure Statement
5. The information disclosure statement (IDS) submitted are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Double Patenting
6. The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the "right to exclude" granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory obviousness-type double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Omum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321 (c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the conflicting application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement.
Effective January 1, 1994, a registered attorney or agent of record may sign a terminal disclaimer. A terminal disclaimer signed by the assignee must fully comply with 37 CFR 3.73(b).
The USPTO internet Web site contains terminal disclaimer forms which may be used. Please visit http://www.uspto.gov/forms/. The filing date of the application will determine what form should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to: http://www.uspto.gov/patents/process/file/efs/guidance/eTD-info-I.jsp.
7. Claim(s) 1-20 of the instant application are rejected on the ground of non-statutory obviousness type double patenting as being unpatentable over claims 1-17 of U.S. Patent No. 12,056,483. Although the claims at issue are not identical, they are not patentably distinct from each other because they are substantially similar in scope and they use the same limitations. This is a non-provisional non-statutory obviousness type double patenting rejection.
Instant Application 18/791,568
Patent No. 12,056,483
1. A method comprising: obtaining, by one or more processors of a user computing device, and from a server computing device, a single segment of a plurality of segments, the plurality of segments representative of a patch identifying how to update a first virtualized asset representative of an unpatched application to obtain a single second virtualized asset representative of a patched application and including portions of the second virtualized asset used to update the single first virtualized asset; virtualizing, by the one or more processors, a first plurality of assets that form the unpatched application installed at the user computing device to obtain the single first virtual asset; and applying, by the one or more processors, the single segment to the single first virtual asset to construct at least a portion of a single second virtual asset, the single second virtual asset including a second plurality of assets that form a patched application.
1. A method comprising: executing, by one or more processors, a virtualization algorithm that presents one or more of a first multi-tiered memory and a first storage file hierarchy having first folders and first subfolders in which an unpatched application, including a first plurality of assets, is stored as a single first virtual asset; executing, by the one or more processors, the virtualization algorithm that presents one or more of a second multi-tiered memory and a second storage file hierarchy having second folders and second subfolders in which a patched application, including a second plurality of assets is stored as a single second virtual asset; executing, by the one or more processors, a patching algorithm with respect to the single first virtual asset and the single second virtual asset to produce differences between the single first virtual asset and the single second virtual asset as a patch identifying how to update the single first virtual asset to obtain the single second virtual asset and including portions of the single second virtual asset used to update the single first virtual asset; segmenting, by the one or more processors, the patch into a plurality of segments, wherein segmenting the patch into a plurality of segments comprises: obtaining device information describing an available memory size of a user computing device; selecting, based on the available memory size, a size for each of the plurality of segments; and segmenting, based on the size, the patch into the plurality of segments; generating metadata indicating when to delete portions of the single first virtual asset; and outputting, by the one or more processors, and to the user computing device, the metadata and a single segment from the plurality of segments for individual application by the user computing device to the unpatched application.
Same interpretation for the other set of claims (medium and device).
The examiner recognizes that the instant application discloses a broader version for a memory efficient software patching for updating applications on computing devices. The related US Patent No. 12,056,483 performs a similar method and anticipates the Instant Application claims, with the inclusion of hierarchy of subfolders and memory size; these elements are not included on the instant application. However, one of ordinary skill in the art would recognize that they are functionally similar and not patentably distinct from each other; the claims as presented can be instrumented individually, or in combination without limitations, or without departing from the spirit and scope of the inventions as specified in Applicant’s Specifications. Thus, one of ordinary skill in the art would recognize that the limitations and their differences are obvious variations of the invention defined in the claim of instant application: 18/791,568. Consequently, claims 1-20 are non-provisionally rejected on the ground of non-statutory obviousness double patenting as being unpatentable over claims stated in the rejection above.
Claim Rejections – 35 USC § 103
8. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
9. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
10. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
11. Claims 1-3,6,9,12-17,20 are rejected under the first inventor to file provisions of the AIA , 35 U.S.C. 103 as being unpatentable over the combination of Brar et al. (Patent No. US 9,483,256 B2; hereinafter referred to as Brar), in view of Olderdissen et al. (Patent No. US 10,055,219 B1; hereinafter referred to as Olderdissen).
As per claim 1, Brar discloses a method comprising:
obtaining, by one or more processors of a user computing device, and from a server computing device, a single segment of a plurality of segments, the plurality of segments representative of a patch identifying how to update a first virtualized asset (See Fig. 4, also column 3, lines 60-65, column 4, lines 1-5; column 8, line 25 – from a server, segmented, and including data on how to update).
Although Brar divides a patch into segments and utilizing mapping data for the patching process; Brar does not explicitly states - representative of an unpatched application to obtain a single second virtualized asset representative of a patched application and including portions of the second virtualized asset used to update the single first virtualized asset; virtualizing, by the one or more processors, a first plurality of assets that form the unpatched application installed at the user computing device to obtain the single first virtual asset; and applying, by the one or more processors, the single segment to the single first virtual asset to construct at least a portion of a single second virtual asset, the single second virtual asset including a second plurality of assets that form a patched application.
Olderdissen discloses - representative of an unpatched application to obtain a single second virtualized asset representative of a patched application and including portions of the second virtualized asset used to update the single first virtualized asset (See column 6, lines 52-67, and Figs. 2A-3 – different types, and utilizing second asset portions to patch the different types);
virtualizing, by the one or more processors, a first plurality of assets that form the unpatched application installed at the user computing device to obtain the single first virtual asset (See Figs. 2C1-2C2 and 4 – including the portions of the second asset); and
applying, by the one or more processors, the single segment to the single first virtual asset to construct at least a portion of a single second virtual asset, the single second virtual asset including a second plurality of assets that form a patched application (See column 7, lines 41-55 – applying patch which includes plurality of assets).
Brar and Olderdissen are directed to software program development, which are analogous prior art.
It would have been obvious to one ordinary skill in the art before the effective filing date of the claimed invention (first inventor to file provisions of the AIA ) to incorporate and combine Brar’s vistualized application image patching; and further combine it with Olderdissen’s dynamic server specific patching deployment; thus, patches are retrieved to be applied to requested segments based on specific commands, enabling to form in-memory patched segments, without storing the patched segments to memory, while proactively balancing security, stability, and operational efficiency (See Brar’s and Olderdissen’s abstracts and backgrounds).
As per claim 2, Brar and Olderdissen disclose the method of claim 1 (See claim 1 rejection above, under the first inventor to file provisions of the AIA , 35 USC § 103), wherein the single segment includes one or more of a delete command, a copy command, and a write command indicating how to update the first virtual asset to obtain the single second virtual asset (See Olderdissen’s column 7, line 20, Column 8, lines 18-20, lines 30-40 – command line interface, read, delete, etc).
As per claim 3, Brar and Olderdissen disclose the method of claim 1 (See claim 1 rejection above, under the first inventor to file provisions of the AIA , 35 USC § 103), further comprising: obtaining metadata indicating when to delete portions of the single first virtual asset; and deleting, based on the metadata, portions of the single first virtual asset (See Olderdissen’s column 8, lines 18-23 – deleting based on metadata).
As per claim 6, Brar and Olderdissen disclose the method of claim 3 (See claim 3 rejection above, under the first inventor to file provisions of the AIA , 35 USC § 103), wherein the portions of the single first virtual asset include an asset of the first plurality of assets (See Olderdissen’s Figs. 2A-2C2).
As per claim 9, Brar and Olderdissen disclose the method of claim 1 (See claim 1 rejection above, under the first inventor to file provisions of the AIA , 35 USC § 103), further comprising deleting, after applying the single segment to the single first virtual asset, the single segment before receiving a successive single segment of the plurality of segments (See Olderdissen’s column 8, line 8, Figs. 2C1-2C2 – deleted after patching structure).
As per claim 12, Brar and Olderdissen disclose the method of claim 1 (See claim 1 rejection above, under the first inventor to file provisions of the AIA , 35 USC § 103), wherein a size of at least two of the plurality of segments is the same (See Olderdissen’s column 7, line 51 – same size).
As per claim 13, Brar and Olderdissen disclose the method of claim 1 (See claim 1 rejection above, under the first inventor to file provisions of the AIA , 35 USC § 103), wherein a size of each segment from the plurality of segments is pre-defined (See Olderdissen’s Figs. 2C1 and 4 – pre-defined).
As per claim 14, Brar and Olderdissen disclose the method of claims 1 (See claim 1 rejection above, under the first inventor to file provisions of the AIA , 35 USC § 103), wherein the first plurality of assets and the second plurality of assets each comprise one or more of images, animations, textures, audio data, and video data (See Brar’s and Olderdisse’s summary – images).
Claims 15-17 are essentially the same as claims 1-3 except that they are set forth the claimed invention as a computing device, and they are rejected with the same reasoning as applied hereinabove.
Claim 20 is essentially the same as claim 1 except that it is set forth the claimed invention as a non-transitory computer-readable storage medium, and it is rejected with the same reasoning as applied hereinabove.
12. Claims 7-8,11 are rejected under the first inventor to file provisions of the AIA , 35 U.S.C. 103 as being unpatentable over the combination of Brar et al. (Patent No. US 9,483,256 B2; hereinafter referred to as Brar), in view of Olderdissen et al. (Patent No. US 10,055,219 B1; hereinafter referred to as Olderdissen), and in further view of of Teraoka et al. (Patent No. US 10,725,772 B2; hereinafter referred to as Teraoka).
As per claim 7, Brar and Olderdissen disclose the method of claim 1 (See claim 1 rejection above, under the first inventor to file provisions of the AIA , 35 USC § 103).
However, neither Brar nor Olderdissen explicitly state - wherein the patch includes a compressed patch, and wherein the method comprises decompressing the single segment to write one of the portions of the second virtual asset directly to the patched application.
Teraoka discloses - wherein the patch includes a compressed patch, and wherein the method comprises decompressing the single segment to write one of the portions of the second virtual asset directly to the patched application (See abstract – compressing/decompressing method.
Brar and Olderdissen are directed to software program development, which are analogous prior art.
It would have been obvious to one ordinary skill in the art before the effective filing date of the claimed invention (first inventor to file provisions of the AIA ) to incorporate and combine Brar’s vistualized application image patching; and combine it with Olderdissen’s dynamic server specific patching deployment; and further combine it with Teraoka’s sequential processing of segmented patches with compressed data thus, patches are retrieved to be applied to requested segments based on specific commands, enabling to form in-memory patched segments, without storing the patched segments to memory, while proactively balancing security, stability, operational efficiency, and reducing data amount (See Brar’s, Olderdissen’s and Teraoka’s abstracts and backgrounds).
As per claim 8, Brar and Olderdissen disclose the method of claim 1 (See claim 1 rejection above, under the first inventor to file provisions of the AIA , 35 USC § 103), further comprising outputting, to the server computing device, a confirmation that a previously sent segment from the plurality of segments has been installed, wherein obtaining the single segment comprises receiving, responsive to outputting the confirmation, the single segment (See Teraoka’s column 13, line 48 – completion notification).
As per claim 11, Brar and Olderdissen disclose the method of claim 1 (See claim 1 rejection above, under the first inventor to file provisions of the AIA , 35 USC § 103), further comprising: obtaining device information describing an available memory size of the user computing device; and outputting, to the server computing device, the device information to enable the server computing device to determine a size of each segment from the plurality of segments (See Teraoka’s column 14, lines 59-61 – available memory).
Allowable Subject Matter
13. Claims 4-5,10,18-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The prior art of record fails to disclose the limitations: “… wherein the metadata includes a read index indicating after which cumulative memory read, during application of the plurality of segments, to delete a portion of the single first virtual asset, wherein the method further comprises: maintaining a read counter that reflects a number of reads of the single first virtual asset during application of the plurality of segments; and deleting, when the read counter equals the read index, the portion of the single first virtual asset… determining that a portion of the portions of the single second virtual asset is not fully provided in the single segment; caching, responsive to the determination that the portion is not fully provided in the single segment, the single segment; requesting, from the server computing device, a successive segment of the plurality of segments; receiving, responsive to the request for the successive segment, the successive segment; and applying the single segment and the successive segment to the single first virtual asset to construct at least the portion of the single second virtual asset”, as specified by the claims.
14. Please see M.P.E.P. 2111 Claim Interpretation; Broadest Reasonable Interpretation [R-9]; 2111.01 Plain Meaning [R-9]: III. “Plain Meaning” Refers to the ordinary and customary meaning given to the term by those of ordinary skill in the art”
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. Claims must be given the broadest reasonable interpretation during examination, and limitations appearing in the specification but not recited in the claim are not read into the claims (See M.P.E.P. 2111 [R-I]).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to FRANCISCO JAVIER APONTE whose telephone number is (571)270-7164. The examiner can normally be reached M-F: 8-4.
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/FRANCISCO J APONTE/Primary Examiner, Art Unit 2151
08/06/2026.
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