CTNF 18/791,602 CTNF 89226 DETAILED ACTION This action is in response to the Application filed on 08/01/2024. Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Information Disclosure Statement The information disclosure statement(s) (IDS) submitted on 08/01/2024 is/are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement(s) is/are being considered by the examiner. Specification 06-31 AIA The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification. 06-11 AIA The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. Claim Rejections - 35 USC § 102 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 07-12-aia AIA (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. 07-15-aia AIA Claim(s) 1 and 5 is/are rejected under 35 U.S.C. 102 (a)(1) and 102(a)(2) as being anticipated by US Patent No. 10,469,073; (hereinafter Ozalevli) . Regarding claim 1, Ozalevli [e.g. Figs. 1 and 3; col. 7, lines 9 – 12 recite “ Referring now to FIG. 3, a schematic diagram of an illustrative circuit 300 is shown. In at least one example, the circuit 300 is suitable for implementation as the signal reconstruction circuit 130 of the system 100 ”] discloses a system comprising: a switching voltage regulator [e.g. Fig. 1; 110]; a current regulator coupled to the switching voltage regulator, wherein the current regulator includes: a first current source [e.g. Fig. 3; 355] ; a current mirror [e.g. Fig. 3; 317] coupled to the first current source; a second current source [e.g. Fig. 3; 350] coupled to the current mirror; a capacitor [e.g. Fig. 3; 340] including a first terminal [e.g. Fig. 3; upper terminal] and a second terminal [e.g. Fig. 3; lower terminal] , wherein the first terminal is coupled to the first current source and the current mirror [e.g. via 320] ; and a comparator [e.g. Fig. 3; 325] including a first input [e.g. inverting terminal] coupled to the first terminal of the capacitor, a second input [e.g. non-inverting terminal] , and an output [e.g. Fig. 3; to modulator 140] ; and a controller [e.g. Fig. 1; modulator 140] coupled to the switching voltage regulator and the output of the comparator [e.g. as shown in Figs. 1 and 3]. Regarding claim 5, Ozalevli [e.g. Figs. 1 and 3] discloses wherein: the current mirror includes a first terminal [e.g. lower terminal of 310] coupled to the first current source [e.g. 355 via 310] and a second terminal [e.g. lower terminal of 315] coupled to the second current source [e.g. 350 via 315]; and the current mirror is configured to mirror the second current from the first terminal of the current mirror to the first terminal of the current mirror [e.g. col. 8, lines 30 – 33 recite “ the PMOS 310 and the PMOS 315 are collectively referred to as a current mirror 317 configured to approximately mirror (e.g., replicate) a current present at node 380 to node 386 ”] . Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-23-aia AIA The factual inquiries set forth in Graham v. John Deere Co. , 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. 07-21-aia AIA Claim (s) 2 and 3 rejected under 35 U.S.C. 103 as being unpatentable over Ozalevli . Regarding claim 2, Ozalevli [e.g. Figs. 1 and 3] discloses wherein: the first current source generates a first current [e.g. current at 355]. Ozalevli, Fig. 3 fails to disclose the first current source includes a first transconductance amplifier. However, it is well known in the art of a use of transconductance amplifier as current source. Ozalevli [e.g. Fig. 4] teaches the use of a first transconductance amplifier as current source [e.g. col. 11, lines 50 – 54 recite “ each of the current source 470 and the current source 478 comprises a transconductance amplifier (e.g., a high linearity transconductance amplifier) configured to generate Ibias such that Ibias is present at an output of the transconductance amplifier ”]. It would have been obvious to one having ordinary skill in the art at the time of the effective filing date to modify Ozalevli, Fig. 3 by the first current source includes a first transconductance amplifier as taught by Ozalevli, Fig. 4A-B in order of being able to provide current source with high precision, as it is well known in the art. Regarding claim 3, Ozalevli [e.g. Figs. 1 and 3] discloses wherein: the second current source generates a second current [e.g. current at 350]. Ozalevli, Fig. 3 fails to disclose the second current source includes a second transconductance amplifier. However, it is well known in the art of a use of transconductance amplifier as current source. Ozalevli [e.g. Fig. 4] teaches the use of a second transconductance amplifier as current source [e.g. col. 11, lines 50 – 54 recite “ each of the current source 470 and the current source 478 comprises a transconductance amplifier (e.g., a high linearity transconductance amplifier) configured to generate Ibias such that Ibias is present at an output of the transconductance amplifier ”]. It would have been obvious to one having ordinary skill in the art at the time of the effective filing date to modify Ozalevli, Fig. 3 by the first second source includes a second transconductance amplifier as taught by Ozalevli, Fig. 4A-B in order of being able to provide current source with high precision, as it is well known in the art. Examiner's Note Examiner has cited particular columns and line numbers in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner. In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention . Allowable Subject Matter 12-151-07 AIA 07-97 12-51-07 Claim s 10 – 20 are allowed. 12-151-08 AIA 07-43 12-51-08 Claim 4 and 6 – 10 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. 13-03-01 AIA The following is a statement of reasons for the indication of allowable subject matter: The primary reason for the indication of the allowability of claim 4 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “wherein: the second current is based on a third current and a maximum average amplitude of an input current.” The primary reason for the indication of the allowability of claim 6 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “wherein: an amplitude of a sample current is based on the first current minus the second current”. The primary reason for the indication of the allowability of claim 7 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “further comprising: a first switch including a first terminal coupled to the first terminal of the capacitor, and a second terminal coupled to the first input of the comparator; and a second switch including a first terminal coupled to the first input of the comparator, and a second terminal coupled to the second input of the comparator and the second terminal of the capacitor”. The primary reason for the indication of the allowability of claim 10 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “a current mirror including a first terminal coupled to the output of the first transconductance amplifier and a second terminal coupled to the output of the second transconductance amplifier; a first capacitor including a first terminal coupled to the first terminal of the current mirror; and a comparator coupled to the first capacitor. The primary reason for the indication of the allowability of claim 19 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “a current mirror including a first terminal coupled to the output of the first transconductance amplifier and a second terminal coupled to the output of the second transconductance amplifier; a first capacitor including a first terminal coupled to the first terminal of the current mirror; and a comparator coupled to the first capacitor; and a controller coupled to the switching voltage regulator and the output of the comparator . Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Alex Torres-Rivera whose telephone number is (571)272-5261. The examiner can normally be reached M-F 9:00-5:30 ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, MONICA LEWIS can be reached at (571) 272-1838. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ALEX TORRES-RIVERA/Primary Examiner, Art Unit 2838 Application/Control Number: 18/791,602 Page 2 Art Unit: 2838 Application/Control Number: 18/791,602 Page 3 Art Unit: 2838 Application/Control Number: 18/791,602 Page 4 Art Unit: 2838 Application/Control Number: 18/791,602 Page 5 Art Unit: 2838 Application/Control Number: 18/791,602 Page 6 Art Unit: 2838 Application/Control Number: 18/791,602 Page 7 Art Unit: 2838 Application/Control Number: 18/791,602 Page 8 Art Unit: 2838
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