DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-10 have been considered but are moot in view of the new ground(s) of rejection.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 2 and 4-10 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yang (Pub. No. 2019/0005606).
Regarding claims 1 and 7, Yang teaches a multimedia data processing device (100, Fig. 1; [0020]) (with corresponding method), comprising:
a plurality of multimedia processing circuits, processing multimedia data to generate output data (multiple GPUs 104; peripherals 122, [0026]) ; and
a processor, configured for, in a kernel space (118, along with 136, Fig. 2):
configuring a data transmission relationship among the processing circuits in response to a command of an application executed in a user space ([0005]; [0006]; [0019]; [0020]), and
allocating a first space of a memory to a first circuit among the multimedia processing circuits ([0005]; [0019]; [0020]),
wherein, the first circuit generates first data based on the multimedia data and stores the first data to the first space, the processor transmits, in the kernel space and according to the data transmission relationship, first address information of the first space in the memory to a second circuit among the multimedia processing circuits, and the second circuit obtains the first data from the first space according to the first address information and processes the first data to generate the output data ([0031]-[0036]; [0040]-[0046]; [0051]-[0053])).
Regarding claim 2, Yang teaches wherein the processor further allocates a second space of the memory to the second circuit, and the second
circuit generates second data based on the first data and stores the second data to the second space ([0031]-[0036]; [0040]-[0046]; [0051]-[0053]).
Regarding claim 4, 5 and 8, Yang teaches wherein the processor transmits, in the kernel space and according to the data transmission relationship, second address information of the second space in the memory to a last circuit among
the multimedia processing circuits, and the last circuit obtains the second data from the second space according to the second address information and processes the second data to generate the output data ([0031]-[0036]; [0040]-[0046]; [0051]-[0053]).
For claim 5: where the buffer is a direct memory access (DMA) buffer ([0027]; [0032]; [0033]; [0036]; [0037]).
Regarding claim 6 and 9, Yang teaches wherein the processor executes the application to transmit address information of the DMA buffer to a multimedia playback device by a direct rendering manager, for the multimedia playback device to obtain the output data ([0031]-[0036]; [0040]-[0046]; [0051]-[0053]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yang (Pub. No. 2019/0005606) in view of Auld et al. (hereinafter ‘Auld’, Patent No. 6,411,333).
Regarding claim 3, Yang teaches all the limitations of the claim it depends on. On the other hand, Yang does not explicitly teach wherein the first circuit is a video input circuit, the second circuit is an image signal processor (ISP), and a last circuit among the multimedia data processing circuits is a scaler.
However, in an analogous art, Auld teaches a system for processing image data stored in a memory. The system receives video content at receiving components (122, 124, Fig. 1) into an integrated graphics and video processor unit (110, Fig. 1). Graphics and video processor includes display processor (180, Fig. 1). Element 180 includes different circuits connected to the video receiving inputs; including memory interface (220), filtering and format conversion unit 210, graphic processor 215, and video interface 230. Filtering and format conversion unit is composed with video scaling filters. Memory buffer 260 stores temporary data in buffers for scaled video , graphics, etc. (col. 3 line 37 to col. 5 line 32).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Rangarajan’s invention with Yang’s feature of having image (graphics) signal processor and a scaler circuit connected to a buffer and to the receiving components for the benefit of being able to modify the video to different format/sizes of displays.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to OMAR S PARRA whose telephone number is (571)270-1449. The examiner can normally be reached M-F: Mostly 10-6PM.
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/OMAR S PARRA/Primary Examiner, Art Unit 2421
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