Prosecution Insights
Last updated: July 17, 2026
Application No. 18/791,886

Controller for Phase Change Switch Device, System and Methods

Non-Final OA §102§103
Filed
Aug 01, 2024
Priority
Aug 02, 2023 — EU 23189123.5
Examiner
POINT, RUFUS C
Art Unit
Tech Center
Assignee
Infineon Technologies AG
OA Round
1 (Non-Final)
74%
Grant Probability
Favorable
1-2
OA Rounds
10m
Est. Remaining
92%
With Interview

Examiner Intelligence

Grants 74% — above average
74%
Career Allowance Rate
538 granted / 725 resolved
+14.2% vs TC avg
Strong +18% interview lift
Without
With
+18.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
28 currently pending
Career history
746
Total Applications
across all art units

Statute-Specific Performance

§101
1.3%
-38.7% vs TC avg
§103
90.7%
+50.7% vs TC avg
§102
4.6%
-35.4% vs TC avg
§112
1.2%
-38.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 725 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1-4, 6 and 8-10 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Dykstra (US 20240106420 A1). Claim 1. Dykstra teaches a controller for a phase change switch device (Fig. 1 [0030] a circuital arrangement (100)), the controller (control circuit (110)) comprising: a control input configured to receive a first control signal indicating a desired state of the phase change switch device ([0020] As shown in FIG. 1, the control circuit (110) may be coupled to a controller circuit (115) (e.g., via SPI or MIPI radio frequency front-end control interface, RFFE) for reception of control commands that may dictate configuration/state of the PCM device (105).); a measurement input configured to receive a measurement signal indicating an actual state of the phase change switch device ([0021] In this way, an analog DC voltage resulting from conduction of the measuring current through the switch resistance can be measured, and the current state of the PCM device (105) based on a high switch resistance or a low switch resistance can be determined. In particular, the analog voltage value is converted to a digital value through an analog-to-digital converter (ADC) of the measurement circuit and then sent (135) to the logic and timing circuit (110).); a control output configured to output a second control signal to at least one heater of the phase change switch device ([0022] FIG. 1 shows one driver (120, 125) per switch state, wherein driver (120) is configured to process ON pulse waveforms generated by the control circuit (110) to program the switch (105), and driver (125) is configured to process OFF pulse waveforms generated by the control circuit (110) to program the switch (105). ); and a control logic configured to generate the second control signal based on the first control signal and the measurement signal ([0025] After an initial power-on reset (POR) operation (205), measuring (210) of the state of a particular switch device (e.g., a PCM device) is performed through the steps and devices involved in the measuring phase described in FIG. 1 above, followed by a determination step (215). In particular, if the measured state matches the expected state (YES), then the state machine waits (220) for the next control signal (222) to arrive (see also inputs CLK and SW_ON to the control circuit (110) of FIG. 1) and further program (225) the device accordingly. If, on the other hand, the measured state does not match the desired/expected state (NO), then the state machine initially waits (230) for a cool-off time (of a predetermined length/duration) before programming (225) the switch again to obtain the desired/expected state.). Claim 2. Dykstra teaches the controller of claim 1, wherein the second control signal is indicative of at least one of a time duration or electrical power to be supplied to the at least one heater for heating, and wherein the control logic is configured to determine the time duration and electrical power based on the desired state indicated by the first control signal and the measurement signal ([0063] This process, including the sequence of programming, measuring and trying again, is repeated until the switch (e.g., SW3 of FIG. 3), is found to be in the desired/expected state. [0065] In such cases, identification of the correct threshold to be able to distinguish between an ON state and an OFF state of the switch may be performed...Such controlling/programming may be provided by adjusting specific parameters, including pulse duration and/or injection current or voltage, of (programming) pulses to the switch.). Claim 3. Dykstra teaches the controller of claim 2, wherein the control logic is configured to generate the second control signal to supply electrical power to the at least one heater until the measurement signal indicates that the actual state matches the desired state ([0059] As noted in FIGS. 2 and 5 above, there are cases where the measured state of a switch (e.g., a MEMS or PCM switch) does not match its desired/expected state (unsuccessful attempt in programming), thus requiring (possibly after a cool-off time) a further programming of the switch in the attempt of forcing the switch away from its current state and into the desired/expected state. [0063] As a consequence, a “try again” signal (715) is asserted (see also “again” signals 521, 522 in FIG. 5) after the measurement (705), and the shunt switch (e.g., SW3 of FIG. 3) is programmed again (through, e.g., heater voltage programming pulses in case of a PCM switch, not shown in the figure). [0067] such electrical pulse profiles are applied to the heating element (i.e. resistor) of PCM device (105) of FIG. 1 to generate different thermal profiles that result either in amorphizing the PCM device... or crystalizing the PCM device into a low resistance state (ON or closed) using a lower-power/amplitude, long-period pulse (820). ). Claim 4. Dykstra teaches the controller of claim 2, wherein the control logic is configured to generate the second control signal providing a first time duration and a first electrical power based on the first control signal, and, if after the first electrical power has been applied during the first time duration to the at least one heater, the measurement signal indicates that the actual state of the phase change switch device is different from the desired state, to generate the second control signal providing a second time duration and a second electrical power, and wherein at least one of the second time duration or the second electrical power differs from the first time duration or first electrical power, respectively ([0063] According to the above scenario, and with continued reference to FIG. 7, when a state of the shunt switch (e.g., SW3 of FIG. 3) is measured (705) during the time interval (710) of the RF1ON state of the system (e.g., of the SPDT switch of FIG. 3), its state is not as desired/expected (e.g., wrong). (e.g. a first time duration) As a consequence, a “try again” signal (715) is asserted (see also “again” signals 521, 522 in FIG. 5) after the measurement (705), and the shunt switch (e.g., SW3 of FIG. 3) is programmed again (through, e.g., heater voltage programming pulses in case of a PCM switch, not shown in the figure). This process, including the sequence of programming, measuring and trying again, is repeated until the switch (e.g., SW3 of FIG. 3), is found to be in the desired/expected state. (e.g. a second time duration adjusting voltage)). Claim 6. Dykstra teaches the controller of claim 1, and further a power input configured to receive electrical power, wherein the second control signal is configured to be directly provided to the at least one heater to provide electrical power derived from the electrical power received at the power input to the at least one heater ([0021] the analog voltage value is converted to a digital value through an analog-to-digital converter (ADC) of the measurement circuit and then sent (135) to the logic and timing circuit (110). [0067] In other words, PCM device (105) is programmed in an OFF or ON state by controlling the amplitude as well as the pulse widths of the pulses provided by the drivers (120, 125) of FIG. 1.). Claim 8. Dykstra teaches the controller of claim 1, wherein the control logic is configured to be at least partially switched off when the first control signal does not indicate a change of the desired state ([0025] If, on the other hand, the measured state does not match the desired/expected state (NO), then the state machine initially waits (230) for a cool-off time (of a predetermined length/duration) before programming (225) the switch again to obtain the desired/expected state.). Claim 9. Dykstra teaches a system, comprising: the controller of claim 1; and the phase change switch device (Fig. 3 [0034]). Claim 10. Dykstra teaches the system of claim 9, wherein the phase change switch device comprises at least one first phase change switch including a heater coupled to the control output of the controller, a first electrode pair coupled to the measurement input, a second electrode pair coupled to terminals of the phase change switch device, ([0058] In this case, BIST (520) sends measuring signals (516, 517) to the switches SW1 and SW3, responsive to which the switches SW1 and SW3 output result signals (518, 519)—i.e. the digital results of the measurement after the analog-to-digital conversion- to BIST (520) (e.g. first electrode pair) [0058] Each state control machine (510, 530) include outputs (511, 512) and (531, 532) controlling ON state and OFF state programming of each switch. (e.g. second electrode pair)). and a phase change material thermally coupled to the heater and electrically coupled to the first electrode pair and the second electrode pair ([0004] A PCM switch consists of a volume of phase-change material having two electrical terminals and an adjacent heater, such as a resistor. Under stimulation of thermal energy generated by the heater, the PCM switch can be thermally transitioned between a high-resistivity amorphous state of the phase-change material that defines an OFF state (e.g., high resistance between the two electrical terminals) of the switch, and a low-resistivity crystalline state of the phase-change material that defines an ON state). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 11 is rejected under 35 U.S.C. 103 as being unpatentable over Dykstra in view of Zheng (CN 113451506 A). Claim 11. Dykstra teaches the system of claim 10, and discloses a phase change material but does not specifically disclose wherein an area of the phase change material covered by the first electrode pair is at least 50% smaller than an area of the phase change material covered by the second electrode pair. However, Zheng teaches wherein an area of the phase change material covered by the first electrode pair is at least 50% smaller than an area of the phase change material covered by the second electrode pair (Page 9- The first electrode 120 contact a memory element of a phase change material on a first contact region 122, and a carbon deposit on a second contact region 141 of the second electrode contact A mushroom type of memory element, as shown, the first contact region 122 is less than the second contact region 141, such as at least less than 50 %. ). Therefore, it would have been obvious to one ordinarily skilled in the art before the effective filing date of invention to use the electrode pair is at least 50% smaller as taught by Zheng within the system of Dykstra for the purpose of enhancing the system to reduce material density in order to optimize current flow to quickly heat the phase change material. Claim(s) 12-14 are rejected under 35 U.S.C. 103 as being unpatentable over Dykstra in view of Sutardja (US 7855909 B1). Claim 12. Dykstra teaches the system of claim 10, and further discloses the use of a plurality switches but does not specifically disclose wherein the phase change switch device comprises at least one second phase change switch including a heater coupled to the control output of the controller, an electrode pair coupled to terminals of the second phase change switch, and a phase change material thermally coupled to the heater and arranged between and electrically coupled to the electrode pair, and wherein the at least one second phase change switch is not coupled to the measurement input. However, Sutardja teaches wherein the phase change switch device comprises at least one second phase change switch including a heater coupled to the control output of the controller (Fig 3b Col 5 lines 1-20 A heater 24 and a select switch 26 are connected in a row and column orientation.) , an electrode pair coupled to terminals of the second phase change switch, and a phase change material thermally coupled to the heater and arranged between and electrically coupled to the electrode pair (Col 5 lines 1-20 One end 32 of the material 22 is connected to the column bit line 28. Another end 34 is connected to the resistive heater 24, ), and wherein the at least one second phase change switch is not coupled to the measurement input (Col 5 lines 1-20 another select switch 36 may be controlled by a read row select line 38... Reading the phase-change memory cell may include applying current and/or measuring voltage to determine resistance. e.g. the switch 36 reads the PCM values while switch 26 does not read the measurement, the column bit line and write row select line are the electrode pair). Therefore, it would have been obvious to one ordinarily skilled in the art before the effective filing date of invention to use the second phase change switch as taught by Sutardja within the system of Dykstra for the purpose of enhancing the system to utilize a dedicated switch to apply thermal energy to the phase change material and a separate circuit for measuring the phase change material in an effort to avoid directly measuring through the phase change material. Claim 13. Dykstra and Sutardja teach the system of claim 12, wherein signal paths of the at least one first phase change switch and the at least one second phase change switch are coupled in a parallel configuration, a serial configuration or a parallel/serial configuration (Fig 3b e.g. the switch 36 reads the PCM values while switch 26 does not read the measurement, the column bit line and write row select line are the electrode pair arranged in parallel/serial configuration). Claim 14. Dykstra and Sutardja teach the system of claim 12, wherein the heaters of the at least one first phase change switch and the at least one second phase change switch are coupled in a parallel configuration, a serial configuration or a parallel/serial configuration (Fig 3b e.g. the switch 36 reads the PCM values while switch 26 does not read the measurement, the column bit line and write row select line are the electrode pair arranged in parallel/serial configuration). Claim(s) 5 is rejected under 35 U.S.C. 103 as being unpatentable over Dykstra in view of Adamski (US 20220406997 A1). Claim 5. Dykstra teaches the controller of claim 4, and further disclose the process of adjusting voltage and time duration with the use of a lookup table having different pulse widths and amplitudes as a function ([0068]) but does not specifically disclose wherein the second time duration is longer than the first time duration, or the second electrical power is higher than the first electrical power . However, Adamski teaches wherein the second time duration is longer than the first time duration, or the second electrical power is higher than the first electrical power ([0090][0091] In recalculating the pulse profile, the current or voltage values need to be adjusted if pulse time is kept constant at T.sub.S_REF, or the pulse time needs to be adjusted if current or voltage are kept constant at a reference value for current control or voltage control, respectively. In some embodiments, a hybrid approach may be taken by adjusting at least two of current, voltage, and/or time (e.g., if a computed adjustment in voltage or current exceeds the limits of a power supply, then pulse duration may be increased).). Therefore, it would have been obvious to one ordinarily skilled in the art before the effective filing date of invention to use the second time duration as taught by Adamski within the system of Dykstra for the purpose of enhancing the system to provide enough energy to compensate the phase-change material above a melting temperature so that switching operation is activated properly. Claim(s) 7, 15 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Dykstra in view of Lee (US 20230009913 A1). Claim 7. Dykstra teaches the controller of claim 1, and discloses the use of a switching configuration within the circuit and further discloses the process of measuring heat and power but does not specifically disclose but does not specifically disclose a low dropout regulator. However, Lee teaches a low dropout regulator (([0038] Each of the pulse generators 515, 525 may include or be embodied as a voltage boost converter, a low -dropout regulator (LDO), charge pump, etc)). Therefore, it would have been obvious to one ordinarily skilled in the art before the effective filing date of invention to use a low dropout regulator as taught by Lee within the system of Dykstra for the purpose of enhancing the system to use excessive heat as power and provide low noise to maintain the signal integrity of a switching operation. Claim 15. Dykstra teaches the system of claim 9, wherein the controller further comprises a power input configured to receive electrical power, wherein the second control signal is configured to be directly provided to the at least one heater to provide electrical power derived from the electrical power received at the power input to the at least one heater ([0020] A control circuit (110), e.g., a logic and timing circuit, generates ON and OFF pulse waveforms for drivers (120, 125) to accordingly program the PCM device (105) in a desired state.). Dykstra further discloses the use of a switching configuration within the circuit and further discloses the process of measuring heat and power but does not specifically disclose the system further comprising: a charge pump coupled to the power input of the controller. However, Lee teaches a charge pump (([0038] Each of the pulse generators 515, 525 may include or be embodied as a voltage boost converter, a low -dropout regulator (LDO), charge pump, etc)). Therefore, it would have been obvious to one ordinarily skilled in the art before the effective filing date of invention to use a charge pump as taught by Lee within the system of Dykstra for the purpose of enhancing the system to increase required voltage needed for switching phase change material. Claim 16. Dykstra teaches the system of claim 9, and discloses the use of a switching configuration within the circuit and further discloses the process of measuring heat and power but does not specifically disclose wherein the controller further comprises a low dropout regulator, the system further comprising: a charge pump coupled to the power input of the controller. However, Lee teaches a low dropout regulator and a charge pump. (([0038] Each of the pulse generators 515, 525 may include or be embodied as a voltage boost converter, a low -dropout regulator (LDO), charge pump, etc)). Therefore, it would have been obvious to one ordinarily skilled in the art before the effective filing date of invention to use a low dropout regulator and charge pump as taught by Lee within the system of Dykstra for the purpose of enhancing the system to use excessive heat as power and provide low noise to maintain the signal integrity while increasing required voltage needed for switching phase change material. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to RUFUS C POINT whose telephone number is (571)270-7510. The examiner can normally be reached 9am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Davetta Goins can be reached at 571-272-2957. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /RUFUS C POINT/ Primary Examiner, Art Unit 2689
Read full office action

Prosecution Timeline

Aug 01, 2024
Application Filed
Jun 23, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
74%
Grant Probability
92%
With Interview (+18.1%)
2y 9m (~10m remaining)
Median Time to Grant
Low
PTA Risk
Based on 725 resolved cases by this examiner. Grant probability derived from career allowance rate.

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