DETAILED ACTION
This office action is in response to the application filed on 08/02/2024. Claims 1-16 are pending.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Drawing
The drawing submitted on 08/02/2024 is acknowledged and accepted by the examiner.
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 02/06/2025 has been considered by the examiner.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-2, 6, 8-9, 10, are rejected under 35 U.S.C. 102(a)(1) and/or (a)(2) as being anticipated by Oh (US Patent or PG Pub. No. 20230275516, hereinafter ‘516).
Claim 10, ‘516 teaches a controller for an asymmetric half-bridge power supply (e.g., see Fig. 1-10), the asymmetric half-bridge power supply comprising a first arm switch (e.g., Qm) and a second arm switch (e.g., Qa) forming a half-bridge for controlling a resonant circuit, the resonant circuit comprising a transformer (e.g., TX1) and an oscillating capacitor (e.g., Cr) , the controller being used to control the first arm switch and the second arm switch, the controller comprising: a first arm controller (e.g., the circuits of 1048 generating the gate signal of Qm) configured to provide a first control signal (e.g., the gate signal of Qm) to turn on the first arm switch for a first turn-on time (e.g., the current cycle of Qm); and a second arm controller (e.g., the circuits of 1048 generating the gate signal of Qa) configured to provide a second control signal (e.g., the gate signal of Qa) to turn on the second arm switch for a second turn-on time (e.g., the ON-Time of Qm), and comprising: a ZVS (zero voltage switching) detection circuit (e.g., 1044) configured to provide a duration parameter (e.g., the output of 1044) reflecting the second turn-on time of the second arm switch in a earlier switching cycle (e.g., the switching cycle right before the current switching cycle, see [0035]-[0037][0060]), detect whether the first arm switch has performed ZVS in response to a signal edge of the first control signal (e.g., the signal at t1), and adjust the duration parameter accordingly (e.g., see [0060], Fig. 8, 10); and a turn-on time controller (e.g., the corresponding circuits of 1048 controlling the on-time of Qa and/or Qm) configured to determine the second turn-on time within a later switching cycle according to the adjusted duration parameter (e.g., the output of 1044 being function of detected input of the previous switching cycle, see [0041][0060], Fig. 8, 10).
For method claims 1-2, 6, 8-9, note that under MPEP 2112.02, the principles of inherency, if a prior art device, in its normal and usual operation, would necessarily perform the method claimed, then the method claimed will be considered to be anticipated by the prior art device. When the prior art device is the same as a device described in the specification for carrying out the claimed method, it can be assumed the device will inherently perform the claimed process. In re King, 801 F.2d 1324, 231 USPQ 136 (Fed. Cir. 1986). Therefore the previous rejections based on the apparatus will not be repeated.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1,148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103(a) are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating
obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims under 35 U.S.C. 103(a), the examiner presumes that the subject matter of the various claims was commonly owned at the time any inventions covered therein were made absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and invention dates of each claim that was not commonly owned at the time a later invention was made in order for the examiner to consider the applicability of 35 U.S.C. 103(c) and potential 35 U.S.C. 102(e), (f) or (g) prior art under 35 U.S.C. 103(a).
Claim 11, 14-16 are rejected under 35 U.S.C. 103(a) as being unpatentable over Oh (US Patent or PG Pub. No. 20230275516, hereinafter ‘516), in view of Oh (US Patent or PG Pub. No. 20190036442, hereinafter ‘442).
Claim 11, ‘516 teaches the limitations of claim 10 as discussed above. ‘516 further discloses that a recorder (e.g., 1040) configured to determine the adjusted duration parameter according to a result (e.g., the output of 1040) in response to the signal edge of the first control signal (e.g., see Fig. 10); and a detection signal (e.g., the input of 1044) represents real-time changes of a switch voltage across the first arm switch (e.g., the voltage across Qm, and/or Qa, see Fig. 10).
‘516 does not explicitly disclose that the ZVS detection circuit comprises: a comparator configured to compare the detection signal and a default value to generate a comparison result as the result used for determining the adjusted duration parameter;
‘442 discloses an asymmetric half-bridge power supply (e.g., see Fig. 1-11) further discloses a detection circuit comprises: a comparator configured to compare a detection signal (e.g., sensed voltage in 803a, 803b) and a default value (e.g., Setpoint) to generate a comparison result for determining to increase or decrease of the switching Duty Cycle (e.g., the results of 803a and/or 803b, see Abstract; Fig. 8).
Therefore, It would have been obvious to one having ordinary skill in the art before the effective filing date to modify ‘516 by including the comparator circuits as taught by Kawano in order of being able to determine the increase or decrease of the switching Duty Cycle (e.g., the results of 803a and/or 803b, see Abstract; Fig. 8).
Claim 14, the combination of ‘516 and ‘442 teaches the limitations of claim 10 as discussed above. ‘516 further teaches that wherein the second arm controller (e.g., the circuits comprising the input circuit of 1044) is electrically connected to the first arm switch to provide a detection signal, the detection signal represents real-time changes of a switch voltage of the first arm switch, and the second arm controller is configured to compare the detection signal and a first default value (e.g., the output of 1042) to determine the adjusted duration parameter (e.g., see [0060], Fig. 10).
Claim 15, the combination of ‘516 and ‘442 teaches the limitations of claim 14 as discussed above. ‘516 does not explicitly disclose that wherein the first arm controller comprises: a comparator configured to compare the detection signal and a second default value to generate a start signal; and a turn-on time controller configured to receive the start signal to determine a deadtime immediately following the second turn-on time.
‘442 further teaches that wherein the first arm controller comprises: a comparator (e.g., 803a, 803b) configured to compare the detection signal and a second default value (e.g., the comparison value of 803b) the to generate a start signal (e.g., (e.g., Y or N, see Fig. 8); and a turn-on time controller configured to receive the start signal to determine a deadtime immediately following the second turn-on time (e.g., the deadtime immediately following the second turn-on time, see Fig. 3).
‘442 reads the same obviousness as discussed in claim 11 rejection above.
Claim 16, the combination of ‘516 and ‘442 teaches the limitations of claim 15 as discussed above. ‘516 further teaches that wherein the first arm controller further comprises a longest deadtime timer (e.g., a dead time generating circuits in order to generate the dead time of Fig. 8 is implicitly taught, see [0037], Fig. 8) configured to provide a longest deadtime, and the deadtime is not greater than the longest deadtime (e.g., the longest deadtime can be generated is implicitly taught, see [0037], Fig. 8).
Allowable Subject Matter
Claims 3-5, 7, 12-13 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matters:
For claims 3-5, the prior art does not disclose or suggest, in combination with the limitations of the base claim and any intervening claims, primarily, when the first arm switch was turned on last time, sampling the detection signal to generate a ZVS reference level; and triggered by the signal edge of the control signal, detecting whether the first arm switch has performed ZVS by comparing the detection signal and the ZVS reference level.
For claim 7, the prior art does not disclose or suggest, in combination with the limitations of the base claim and any intervening claims, primarily, when the first arm switch was turned on last time, sampling the detection signal to generate a ZVS reference level; determining a second difference of the ZVS reference level and the detection signal; and if the second difference is greater than or equal to the second default value, determining to trigger to turn on the first arm switch.
For claim 12, the prior art does not disclose or suggest, in combination with the limitations of the base claim and any intervening claims, primarily, the recorder having a counter configured to use the first control signal as a clock signal to increment or decrement a count according to the comparison result; a digital-to-analog converter to generate the adjusted duration parameter according to the count.
For claim 13, the prior art does not disclose or suggest, in combination with the limitations of the base claim and any intervening claims, primarily, the controller further having: a signal converter electrically connected to the secondary winding through a resistor and configured to provide a detection signal representing real-time changes of a winding voltage of the secondary winding; wherein the ZVS detection circuit is configured to compare the detection signal and the ZVS reference level in response to the signal edge of the first control signal to determine the adjusted duration parameter.
Examiner's Note:
Examiner has cited particular columns and line numbers in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner.
In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JUE ZHANG whose telephone number is (571)270-1263. The examiner can normally be reached on M-F: 8:30AM-5:00PM
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/JUE ZHANG/
Primary Examiner, Art Unit 2838