DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of Claims
Claims 1-19 are pending.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-3, 16, 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Forejtek et al. [US 20240072530].
As to claim 1. Forejtek discloses A system for fault detection in a circuit, the system comprising:
an input configured to receive an input signal, [fig. 3, 0023] input 301;
an output, [fig. 3, 0023] output 302;
a reference node, [fig. 3] ground gnd;
a first detector, [fig. 3, 0026, 0028] current control loop 320 formed by a current sense amplifier 321 and a first sense transistor 311, and a second detector, [fig. 3, 0034, 0035] current clamp loop 351 formed by fast current clamp and second sense transistor 312, [0032] detect short current condition at the output 302, the first detector configured to be in an on state when the second detector is in an off state, [0035] current clamp loop inactive during normal condition; and
a first switching device coupled between the input and the output, [fig. 3, 0024] power transistor 310, and configured allow current to pass from input to output in a first state, [0025], and to prevent current from passing from input to output in a second state, [0026].
Forejtek fails to explicitly disclose wherein the first detector is configured to be in an off state when the second detector is in an on state.
Forejtek teaches that the gate input of the sense transistors 311, 312, and the power transistor 310 are connected to the gate driver 330, [fig. 3, 4, 0024, 0027]; wherein the gate driver 330 outputs a signal “gate” to turn OFF the power transistor 310 when a fault is detected, [0026, 0034].
It is understood that the same “gate” output turns OFF the sense transistors 311 and 312, deactivating the current control loop 320, which is the first detector.
However, when the second sense transistor 312 is OFF under the fault state, current clamp loop 351, which is interpreted to represent the second detector, is active through the mirror loop, [fig. 4, 0037, 0039], allowing the first detector to be in an OFF state when the second detector is in an ON state.
It would have been obvious for one of ordinary skill in the art at the time of the filing of the claimed invention to combine the teachings of Forejtek so that the first detector is off when the second detector is in an off state to protect the components of the first detector from the fast short condition detected by the second detector.
As to claim 2. Forejtek discloses The system of claim 1 wherein circuit is configured to operate in a first mode and a second mode, [0025] normal and abnormal state.
As to claim 3. Forejtek discloses The system of claim 2 wherein the first switching device operates in the first state in the first mode and the second state in the second mode, [0025, 0026] power transistor 310 ON in normal state, and OFF in abnormal state.
As to claim 16. Forejtek discloses The system of claim 1 further comprising at least one controller configured to control a state of the first switching device, a state of the first detector, and a state of the second detector, [0029, 0032].
As to claim 17 is rejected using the same prior arts and reasoning as to that of claim 8.
Claim(s) 4-13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Forejtek in view of Telefus et al. [US 20230162937].
As to claim 4. Forejtek fails to disclose The system of claim 1 further comprising: a filter coupled in series with the first switching device between the input and the output; and an amplifier coupled to the output and coupled in series with the filter between the input and the output.
Telefus teaches circuit breakers with a solid-stage bidirectional switches comprising an input 111, an output 121, a detection circuitry 2440 as a first detector coupled to the input, and a current sensor 2450 as a second detector coupled to the output, a first switch 2410 coupled to the input, [fig. 24, 0283]; wherein the second detector, that is connected to the first switch, comprises a low pass filter, [0116], and an amplifier 921 coupled to the filter and the output of the amplifier is the output of the current sensor, [fig. 9, 0170]; wherein the output of the current sensor in [fig. 24] is connected to the output 121.
It would have been obvious for one of ordinary skill in the art at the time of the filing of the claimed invention to combine the teachings of Forejtek with that of Telefus so that the fault current can be grounded.
As to claim 5. Forejtek fails to disclose The system of claim 4 further comprising a second switching device coupled to the first switching device at a first connection and to the reference node at a second connection, the second switching device being configured to prevent current from passing from the first connection to the reference node in a first mode and to allow current to pass from the first connection to the reference node in a second mode.
Telefus teaches circuit breakers with a solid-stage bidirectional switches comprising an input 111, an output 121, a detection circuitry 2440 as a first detector coupled to the input, and a current sensor 2450 as a second detector coupled to the output, a first switch 2410 coupled to the input, [fig. 24, 0283]; wherein the system further comprises a second switch 2720 coupled to the first switch 2410 and a reference node 114, [fig. 27, 0314]; wherein the second detector, that is connected to the first switch, comprises a low pass filter, [0116], and an amplifier 921 coupled to the filter and the output of the amplifier is the output of the current sensor, [fig. 9, 0170]; wherein the output of the current sensor in [fig. 24] is connected to the output 121.
It would have been obvious for one of ordinary skill in the art at the time of the filing of the claimed invention to combine the teachings of Forejtek with that of Telefus so that the fault current can be grounded.
As to claim 6. Forejtek fails to disclose The system of claim 5 wherein the second switching device operates in the first mode when the first switching device is in the first state, and operates in the second mode when the first switching device is in the second state.
Telefus teaches circuit breakers with a solid-stage bidirectional switches comprising an input 111, an output 121, a detection circuitry 2440 as a first detector coupled to the input, and a current sensor 2450 as a second detector coupled to the output, a first switch 2410 coupled to the input, [fig. 24, 0283]; wherein the system further comprises a second switch 2720 coupled to the first switch 2410 and a reference node 114, [fig. 27, 0314]; wherein the second detector, that is connected to the first switch, comprises a low pass filter, [0116], and an amplifier 921 coupled to the filter and the output of the amplifier is the output of the current sensor, [fig. 9, 0170]; wherein the output of the current sensor in [fig. 24] is connected to the output 121; wherein the first switch 2410 and the second switch 2720 operate in a different state, [0316].
It would have been obvious for one of ordinary skill in the art at the time of the filing of the claimed invention to combine the teachings of Forejtek with that of Telefus so that the fault current can be grounded.
As to claim 7. Forejtek fails to disclose The system of claim 4 wherein the first switching device is coupled between the input and the filter, the first detector is coupled to the input, and the second detector is coupled to the output.
Telefus teaches circuit breakers with a solid-stage bidirectional switches comprising an input 111, an output 121, a detection circuitry 2440 as a first detector coupled to the input, and a current sensor 2450 as a second detector coupled to the output, a first switch 2410 coupled to the input, [fig. 24, 0283]; wherein the system further comprises a second switch 2720 coupled to the first switch 2410 and a reference node 114, [fig. 27, 0314]; wherein the second detector, that is connected to the first switch, comprises a low pass filter, [0116], and an amplifier 921 coupled to the filter and the output of the amplifier is the output of the current sensor, [fig. 9, 0170]; wherein the output of the current sensor in [fig. 24] is connected to the output 121; wherein the first switch 2410 is connected between the input and the second detector 2450 that comprises the filter, [fig. 9A, 24].
It would have been obvious for one of ordinary skill in the art at the time of the filing of the claimed invention to combine the teachings of Forejtek with that of Telefus so that the current sensor can detect a short circuit in the output.
As to claim 8. Forejtek discloses The system of claim 7 wherein the first detector is an active detector, [0028] first detector active during normal use, and the second detector is a passive detector, [0035].
As to claim 9. Forejtek fails to disclose The system of claim 4 wherein the first switching device is coupled between the input and the filter, the first detector is coupled between the filter and the amplifier, and the second detector is coupled to the output.
Telefus teaches circuit breakers with a solid-stage bidirectional switches comprising an input 111, an output 121, a detection circuitry 2440 as a first detector coupled to the input, and a current sensor 2450 as a second detector coupled to the output, a first switch 2410 coupled to the input, [fig. 24, 0283]; wherein the system further comprises a second switch 2720 coupled to the first switch 2410 and a reference node 114, [fig. 27, 0314]; wherein the second detector, that is connected to the first switch, comprises a low pass filter, [0116], and an amplifier 921 coupled to the filter and the output of the amplifier is the output of the current sensor, [fig. 9, 0170]; wherein the output of the current sensor in [fig. 24] is connected to the output 121; wherein the first switch 2410 is connected between the input and the second detector 2450 that comprises the filter, [fig. 9A, 24]; wherein the system implements an embodiment that has the current sensor on the input side, [fig. 2A].
It would have been obvious for one of ordinary skill in the art at the time of the filing of the claimed invention to combine the teachings of Forejtek with that of Telefus so that the current sensor can detect a short circuit in the output.
As to claim 10 is rejected using the same prior arts and reasoning as to that of claim 8.
As to claim 11. Forejtek fails to disclose The system of claim 4 wherein the first switching device is coupled between the input and the filter, the first detector is coupled to the input, and the second detector is coupled between the filter and the amplifier.
Telefus teaches circuit breakers with a solid-stage bidirectional switches comprising an input 111, an output 121, a detection circuitry 2440 as a first detector coupled to the input, and a current sensor 2450 as a second detector coupled to the output, a first switch 2410 coupled to the input, [fig. 24, 0283]; wherein the system further comprises a second switch 2720 coupled to the first switch 2410 and a reference node 114, [fig. 27, 0314]; wherein the second detector, that is connected to the first switch, comprises a low pass filter, [0116], and an amplifier 921 coupled to the filter and the output of the amplifier is the output of the current sensor, [fig. 9, 0170]; wherein the output of the current sensor in [fig. 24] is connected to the output 121; wherein the first switch 2410 is connected between the input and the second detector 2450 that comprises the filter, [fig. 9A, 24]; wherein the system implements an embodiment that has the current sensor on the input side, [fig. 3A]; wherein the current sense resistor 922 is connected between the filter and the amplifier, [fig. 9A].
It would have been obvious for one of ordinary skill in the art at the time of the filing of the claimed invention to combine the teachings of Forejtek with that of Telefus so that the current sensor can detect a short circuit in the output.
As to claim 12 is rejected using the same prior arts and reasoning as to that of claim 8.
As to claim 13. Forejtek fails to disclose The system of claim11 further comprising a third detector coupled to the output.
Telefus teaches circuit breakers with a solid-stage bidirectional switches comprising an input 111, an output 121, a detection circuitry 2440 as a first detector coupled to the input, and a current sensor 2450 as a second detector coupled to the output, a first switch 2410 coupled to the input, [fig. 24, 0283]; wherein the system further comprises a second switch 2720 coupled to the first switch 2410 and a reference node 114, [fig. 27, 0314]; wherein the system comprises an embodiment that comprises a third sensor as a voltage sensor 1622 coupled to the output, [fig. 16].
It would have been obvious for one of ordinary skill in the art at the time of the filing of the claimed invention to combine the teachings of Forejtek with that of Telefus so that the second voltage sensor can detect the output voltage for confirming the input is disconnected from the output.
As to claim 18. Forejtek discloses A system for fault detection in a circuit, the system comprising:
an input, [fig. 3, 0023] input 301;
an output, [fig. 3, 0023] output 302;
a first detector coupled to the input, [fig. 3, 0026, 0028] current control loop 320 formed by a current sense amplifier 321 and a first sense transistor 311 connected to input 301;
a second detector coupled to the output, [fig. 3, 0034, 0035] current clamp loop 351 formed by fast current clamp and second sense transistor 312, [0032] detect short current condition at the output 302;
a first switch coupled to the input, [fig. 3, 0024] power transistor 310 connected to input 301.
Forejtek fails to disclose wherein the system further includes a second switch coupled to the first switch and to a reference node; a filter coupled to the first switch; and an amplifier coupled to the filter and to the output.
Telefus teaches circuit breakers with a solid-stage bidirectional switches comprising an input 111, an output 121, a detection circuitry 2440 as a first detector coupled to the input, and a current sensor 2450 as a second detector coupled to the output, a first switch 2410 coupled to the input, [fig. 24, 0283]; wherein the system further comprises a second switch 2720 coupled to the first switch 2410 and a reference node 114, [fig. 27, 0314]; wherein the second detector, that is connected to the first switch, comprises a low pass filter, [0116], and an amplifier 921 coupled to the filter and the output of the amplifier is the output of the current sensor, [fig. 9, 0170]; wherein the output of the current sensor in [fig. 24] is connected to the output 121.
It would have been obvious for one of ordinary skill in the art at the time of the filing of the claimed invention to combine the teachings of Forejtek with that of Telefus so that the fault current can be grounded.
As to claim 19. Forejtek discloses A system for fault detection in a circuit, the system comprising:
an input, [fig. 3, 0023] input 301;
an output, [fig. 3, 0023] output 302;
a first detector coupled to the input, [fig. 3, 0026, 0028] current control loop 320 formed by a current sense amplifier 321 and a first sense transistor 311 connected to input 301;
a first switch coupled to the input, [fig. 3, 0024] power transistor 310 connected to input 301.
Forejtek fails to disclose wherein the system further includes a second switch coupled to the first switch and to a reference node; a filter coupled to the first switch; a second detector coupled to the filter; and an amplifier coupled to the filter and to the output.
Telefus teaches circuit breakers with a solid-stage bidirectional switches comprising an input 111, an output 121, a detection circuitry 2440 as a first detector coupled to the input, and a current sensor 2450 as a second detector coupled to the output, a first switch 2410 coupled to the input, [fig. 24, 0283]; wherein the system further comprises a second switch 2720 coupled to the first switch 2410 and a reference node 114, [fig. 27, 0314]; wherein the second detector, that is connected to the first switch, comprises a low pass filter, [0116], a current sense resistor 922 coupled to the filter, and an amplifier 921 coupled to the filter and the output of the amplifier is the output of the current sensor, [fig. 9, 0170]; wherein the output of the current sensor in [fig. 24] is connected to the output 121.
It would have been obvious for one of ordinary skill in the art at the time of the filing of the claimed invention to combine the teachings of Forejtek with that of Telefus so that the fault current can be grounded.
Allowable Subject Matter
Claims 14, 15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
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/Benyam Haile/Primary Examiner, Art Unit 2688