CTNF 18/794,326 CTNF 87080 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Claim Objections 07-29-01 AIA Claim 2, 9 and 16 are objected to because of the following informalities: It appears that the period after *and* in lines 3, 5 and 3 respectively should be deleted . Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. 07-34-01 Claim 4, 11 and 18 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claims 1 and 4, claims 8 and 11 and claims 15 and 18 recite the limitation “a plurality of data tiles.” This makes it impossible to be certain if the later instances in claims 4, 11 and 18 intend to refer to their respective initial instances in claims 1, 8 and 15, rendering the claims indefinite. For claim interpretation purposes the later instances in claims 4, 11 and 18 are interpreted to read as “ the plurality of data tiles.” Claim Rejections - 35 USC § 101 07-04-01 AIA 07-04 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title . Claims 1 - 22 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract ide without significantly more. Step 1: claim 1 recites “A method of generating computer program instructions of executing a deep neural network” which is a method/process. Claim 8 recites “One or more non-transitory computer-readable media storing instructions executable to perform operations for generating computer program instructions of executing a deep neural network” which is a manufacture. Claim 15 recites “An apparatus, comprising: a processor; and one or more non-transitory computer-readable media storing instructions executable by the processor to perform operations for generating computer program instructions of executing a deep neural network” which is a machine. Step 2A Prong 1: Claims 1, 8 and 15 recite a limitation of “ detecting” which specifically recite “ detecting a size of an input tensor of a tensor operation in the deep neural network ,” This limitation is a processes that, under their broadest reasonable interpretation, covers performance of the limitation in the mind, but for the recitation of generic computer components. That is, other than reciting (from claims 1, 8 and 15) “generating computer program instructions of executing a deep neural network , ” “one or more runtime conditions of a hardware device ,” “the computations are to be performed by the hardware device” “a generative AI model stored on one or more memories and executable by one or more processor, ” (form claim 8) “ one or more non-transitory computer-readable media ” and (from claim 15) “an apparatus, comprising: a processor; and one or more non-transitory computer-readable media storing instructions executable by the processor to perform operations ” nothing in the claim element precludes the step(s) from practically being performed in a human mind or with the aid of pen and paper. For example, “ detecting” in the context of this claim encompasses a user mentally, and with the aid of pen and paper writing the observations down on a sheet of paper and examine the list to identify the relevant observations (a rationale). If a claim limitation, under its broadest reasonable interpretation, covers performance of the limitation in the mind, then it falls within the “Mental Processes” grouping of abstract ideas (concepts performed in the human mind including an observation, evaluation, judgment, and opinion). Step 2A Prong 2: This judicial exception is not integrated into a practical application. The claims recites the additional elements (from claims 1, 8 and 15) “generating computer program instructions of executing a deep neural network , ” “one or more runtime conditions of a hardware device ,” “the computations are to be performed by the hardware device” “a generative AI model stored on one or more memories and executable by one or more processor, ” (form claim 8) “ one or more non-transitory computer-readable media ” and (from claim 15) “an apparatus, comprising: a processor; and one or more non-transitory computer-readable media storing instructions executable by the processor to perform operations .” These limitations are recited at a high-level of generality (i.e., as a generic processor performing a generic computer function) such that it amounts no more than mere instructions to apply the exception using a generic computer component. Accordingly, these additional elements do not integrate the abstract idea into a practical application because they do not impose any meaningful limits on practicing the abstract idea. (see MPEP 2106.05(f)). This/these claim(s) is/are directed to an abstract idea. Step 2B: The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception. The limitations (from claims 1, 8 and 15) “generating computer program instructions of executing a deep neural network , ” “one or more runtime conditions of a hardware device ,” “the computations are to be performed by the hardware device” “a generative AI model stored on one or more memories and executable by one or more processor, ” (form claim 8) “ one or more non-transitory computer-readable media ” and (from claim 15) “an apparatus, comprising: a processor; and one or more non-transitory computer-readable media storing instructions executable by the processor to perform operations ” these limitations are recited at a high-level of generality (i.e., as a generic processor performing a generic computer function) such that it amounts no more than mere instructions to apply the exception using a generic computer component. Accordingly, these additional elements do not integrate the abstract idea into a practical application because they do not impose any meaningful limits on practicing the abstract idea and are recognized by the courts as well-understood, routine, and conventional activities when they are claimed in a merely generic manner (see MPEP 2106.05(d)(II)(iv)). As such, claims 1, 8 and 15 are rejected under 35 U.S.C. 101. Claims 2 – 7, 9 -14 and 16 - 20 depend from claims 1, 8 and 15 and do not add additional elements that would overcome the rejection of claims 1, 8 or 15 and are rejected for at least this reason and the analysis below: 2. The method of claim 1, further comprising: detecting a size of an input tensor of another tensor operation in the deep neural network; and . (mental process – observation) partitioning the another tensor operation into computations based on the size of the input tensor of the another tensor operation and one or more other runtime conditions of the hardware device (insignificant extra solution activity – generic data processing) wherein the one or more other runtime conditions are for a different type of hardware resource from the one or more run conditions (insignificant extra solution activity – generic data processing) 3. The method of claim 1, wherein partitioning the input tensor into the plurality of data tiles comprises: determining one or more shapes of the plurality of data tiles based on the one or more runtime conditions of the hardware device (mental process – judgement) 4. The method of claim 1, wherein partitioning the tensor operation further comprises: partitioning a weight tensor of the tensor operation into a plurality of data tiles, wherein the computations comprise a computation on a data tile in the input tensor and a data tile in the weight tensor (insignificant extra solution activity – generic data processing) 5. The method of claim 1, wherein the one or more hardware resources comprise a processing unit for running the tensor operation (insignificant extra solution activity – generic data processing) 6. The method of claim 1, wherein the one or more hardware resources comprise a memory for storing the input tensor or an output tensor of the tensor operation (insignificant extra solution activity – generic data storage) 7. The method of claim 1, wherein the tensor operation comprises a matrix multiply operation (insignificant extra solution activity – generic data processing) 9. The one or more non-transitory computer-readable media of claim 8, wherein the operations further comprise: detecting a size of an input tensor of another tensor operation in the deep neural network; and . (mental process – observation) partitioning the another tensor operation into computations based on the size of the input tensor of the another tensor operation and one or more other runtime conditions of the hardware device, (insignificant extra solution activity – generic data processing) wherein the one or more other runtime conditions are for a different type of hardware resource from the one or more run conditions (insignificant extra solution activity – generic data processing) 10. The one or more non-transitory computer-readable media of claim 8, wherein partitioning the input tensor into the plurality of data tiles comprises: determining one or more shapes of the plurality of data tiles based on the one or more runtime conditions of the hardware device (mental process – judgement) 11. The one or more non-transitory computer-readable media of claim 8, wherein partitioning the tensor operation further comprises: partitioning a weight tensor of the tensor operation into a plurality of data tiles, wherein the computations comprise a computation on a data tile in the input tensor and a data tile in the weight tensor (insignificant extra solution activity – generic data processing) 12. The one or more non-transitory computer-readable media of claim 8, wherein the one or more hardware resources comprise a processing unit for running the tensor operation (insignificant extra solution activity – generic data processing) 13. The one or more non-transitory computer-readable media of claim 8, wherein the one or more hardware resources comprise a memory for storing the input tensor or an output tensor of the tensor operation (insignificant extra solution activity – generic data storage) 14. The one or more non-transitory computer-readable media of claim 8, wherein the tensor operation comprises a matrix multiply operation (insignificant extra solution activity – generic data processing) 16. The apparatus of claim 15, wherein the operations further comprise: detecting a size of an input tensor of another tensor operation in the deep neural network; and . (mental process – observation) partitioning the another tensor operation into computations based on the size of the input tensor of the another tensor operation and one or more other runtime conditions of the hardware device, (insignificant extra solution activity – generic data processing) wherein the one or more other runtime conditions are for a different type of hardware resource from the one or more run conditions (insignificant extra solution activity – generic data processing) 17. The apparatus of claim 15, wherein partitioning the input tensor into the plurality of data tiles comprises: determining one or more shapes of the plurality of data tiles based on the one or more runtime conditions of the hardware device (mental process – judgement) 18. The apparatus of claim 15, wherein partitioning the tensor operation further comprises: partitioning a weight tensor of the tensor operation into a plurality of data tiles, wherein the computations comprise a computation on a data tile in the input tensor and a data tile in the weight tensor (insignificant extra solution activity – generic data processing) 19. The apparatus of claim 15, wherein the one or more hardware resources comprise a processing unit for running the tensor operation or a memory for storing the input tensor or an output tensor of the tensor operation (insignificant extra solution activity – generic data storing) 20. The apparatus of claim 15, wherein the tensor operation comprises a matrix multiply operation (insignificant extra solution activity – generic data processing). Claim Rejections - 35 USC § 102 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-12-aia AIA (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. 07-15-03-aia AIA Claim s 1 – 20 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Young et al . (hereinafter Young , US 2018/0165574 ) . Regarding claim 1, Young discloses: a method of generating computer program instructions of executing a deep neural network (see at least Fig. 2, 6, ph. [0037] and [0065]) , the method comprising: detecting a size of an input tensor of a tensor operation in the deep neural network (see at least ph. [0094] for masking tensor size corresponding to the size of the input tensor, therefore the size of each is known/detected) ; and partitioning the tensor operation into computations based on the size of the input tensor and one or more runtime conditions of a hardware device executing the deep neural network (see at least ph. [0087] for the output tensor divided/partitioned based in the number of elements in the window of the average pooling neural network layer, where these instructions are carried out by a special-purpose hardware layer carrying out operations during execution of these processes (i.e. at runtime)) , wherein partitioning the tensor operation comprises partitioning the input tensor into a plurality of data tiles, a data tile is a portion of the input tensor (at least ph. [0105] discloses the special-purpose hardware as tiling tensor fragments, therefore the parts of the divided tensor of at least ph. [0087] are suspectable to this process of at least ph. [0105]) , and the computations are to be performed by the hardware device as at least part of a re-grained tile execution on the plurality of data tiles (see at least ph. [0087] and [0088] for the special-purpose hardware performs the dividing the output tensor into a different output tensor and this is done using dynamic (i.e. active runtime / on-the-fly) memory, therefore this process results in dynamic/on-the-fly resizing of the tensors which coincides with the approach of regraining discussed in Applicant’s specification paragraph [0021]). At least claim 8 is a non-transitory computer readable medium version of claim 1 and is similarly rejected where Young discloses such a medium storing such instructions in at least ph. [0121] to implement the features and functions disclosed throughout the references. At least claim 15 is an apparatus, comprising a processor version of claim 1 and is similarly rejected where Young discloses such an apparatus, processor and media storing such instructions in at least ph. [0117] and [0121] to implement the features and functions disclosed throughout the references. Regarding claims 2, 9 and 16, the rejections of claims 1, 8 and 15 are incorporated and Young discloses: detecting a size of an input tensor of another tensor operation in the deep neural network (see at least ph. [0094] for masking tensor size corresponding to the size of the input tensor, therefore the size of each is known/detected and this process may be repeated for any number and combination of such tensors)) ; and . partitioning the another tensor operation into computations based on the size of the input tensor of the another tensor operation and one or more other runtime conditions of the hardware device (see at least ph. [0087] for the output tensor divided/partitioned based in the number of elements in the window of the average pooling neural network layer, where these instructions are carried out by a special-purpose hardware layer carrying out operations during execution of these processes (i.e. at runtime) and where this process may be repeated for any number and combination of such tensors) , wherein the one or more other runtime conditions are for a different type of hardware resource from the one or more run conditions (at least ph. [0117] discloses different processor configurations on which the features and functions of the reference, including the special purpose hardware discussed in at least ph. [0087] are disclosed and where those runtime conditions are established as runtime conditions by the on-the-fly memory used in at least ph. [0088]). Regarding claims 3, 10 and 17, the rejections of claims 1, 8 and 15 are incorporated and Young discloses: partitioning the input tensor into the plurality of data tiles comprises: determining one or more shapes of the plurality of data tiles based on the one or more runtime conditions of the hardware device (at least Applicant’s specification paragraph [0021] provides the example that the shape of the tiles as a function of the size thereof and at least Fig. 4 and ph. [0410] disclose the accumulators that have inputs loaded from memory and array/cell values as disclosed in at least ph. [0050] and [0051] and at least ph. [0086] discloses that the convolutions (i.e. the combining of tensors) are within the polling window and will not overflow the accumulators 32 bits size and thus the runtime conditions of size of tensors must be affected by this runtime condition of the accumulators/underlying hardware condition). Regarding claims 4, 11 and 18, the rejections of claims 1, 8 and 15 are incorporated and Young discloses: partitioning the tensor operation further comprises: partitioning a weight tensor of the tensor operation into a plurality of data tiles (see at least ph. [0087] for the output tensor divided/partitioned based in the number of elements in the window of the average pooling neural network layer and at least Fig. 8 and ph. [0103] disclose the example of weighted matrix of an input tensor that affects then the size of the output tensor) , wherein the computations comprise a computation on a data tile in the input tensor and a data tile in the weight tensor (see at least Fig. 4 and ph. [0048] – [0057] and in particular ph. [0051] – [0052] for the weight input used in determining / shifting the array dimensions which then affects the cells and the tiles of the cells (such as multiplication of those cells / tiles in at least ph. [0056]). Regarding claims 5 and 12, the rejections of claims 1 and 8 are incorporated and Young discloses: the one or more hardware resources comprise a processing unit for running the tensor operation (see at least ph. [0117] for examples / variations of processors types disclosed as usable by the references teachings). Regarding claims 6 and 13, the rejections of claims 1 and 8 are incorporated and Young discloses: the one or more hardware resources comprise a memory for storing the input tensor or an output tensor of the tensor operation (see at least ph. [0038], [0042] and [0051] for the dynamic and direct memory types disclosed as usable by the references teachings). Regarding claims 7, 14 and 20, the rejections of claims 1, 8 and 15 are incorporated and Young discloses: the tensor operation comprises a matrix multiply operation (see at least ph. [0056] for disclosure of the use of matrix multiplication operations as part of the references teachings). Regarding claim 19, the rejection of claim 15 is incorporated and Young discloses: the one or more hardware resources comprise a processing unit for running the tensor operation (see at least ph. [0117] for examples / variations of processors types disclosed as usable by the references teachings) or a memory for storing the input tensor or an output tensor of the tensor operation . Other References Cited Not Relied Upon Tran et al. ( US 2020/0056660 ) discloses arrays that may be divided into sub-arrays in a configurable analog neural memory system for deep learning neural networks. Springer et al. ( US 2021/0064987 ) discloses converting tensor operations into a machine learning environment . Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to CRAIG C DORAIS whose telephone number is (571)270-3371. The examiner can normally be reached M-F 9:00 am - 6:00pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Pierre Vital can be reached at 5712724215. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CRAIG C DORAIS/Primary Examiner, Art Unit 2198 Application/Control Number: 18/794,326 Page 2 Art Unit: 2198 Application/Control Number: 18/794,326 Page 3 Art Unit: 2198 Application/Control Number: 18/794,326 Page 4 Art Unit: 2198 Application/Control Number: 18/794,326 Page 5 Art Unit: 2198 Application/Control Number: 18/794,326 Page 7 Art Unit: 2198 Application/Control Number: 18/794,326 Page 8 Art Unit: 2198 Application/Control Number: 18/794,326 Page 9 Art Unit: 2198 Application/Control Number: 18/794,326 Page 10 Art Unit: 2198 Application/Control Number: 18/794,326 Page 11 Art Unit: 2198 Application/Control Number: 18/794,326 Page 12 Art Unit: 2198
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