DETAILED ACTION
This action is in response to the filing 12/17/2025. Claims 1 and 8 are pending and have been fully examined.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of the Claims
Claims 1 is rejected under 35 U.S.C. 103.
Claim 8 is allowed.
Claims 2-7 and 9-15 have been cancelled.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1 is rejected under 35 U.S.C. 103 as being unpatentable over Jeong et al. (U.S. PGPub No. 20120131396) in view of Kang et al. (KR 20170161507 A) and Catthoor et al. (U.S. PGPub No. 20160179577).
Regarding Claim 1, Jeong teaches,
A memory fault information pre-analysis apparatus, comprising: a fault monitor, a fault counter, a must monitor, and a fault address collector (a device including parent memory configured to store fault addresses ("fault address collector") [0039] where the parent memory may store information about a must repair ("must monitor") [0040] and the system determines and sends faults to the fault information storing device (thus, a "fault monitor") [0039]; further including a repeat count value indicating the number of faults at a given row and address ("fault counter") [0073]),
wherein a fault memory receives fault data configured by a row address and a column address of a memory and stores a location where fault information about the fault data is stored in the fault counter, the must monitor, and the fault address collector (the system includes a child memory including pointers to the address and corresponding information regarding the fault stored in the parent memory [0061-62]),
the fault counter stores a number of faults in a fault row and a fault column of the memory (a fault counter is configured to indicate the number of fault cells previously detected at a row address and a column address [0073; 0078]),
the must monitor stores must fault information (the system is configured with "must flags" ("must information") indicating a must fault [0048-0051]),
and the fault address collector stores a row address and a column address of the fault data and whether it is a pivot fault status for the fault data (the parent memories are configured to store the location of a fault cell by row address and column address [0039]),
wherein the fault counter includes a row count flag which stores a number of faults in a fault row and a column count flag which stores a number of faults in a fault column (a repeat count value ("fault counter") is configured to indicate the number of fault cells previously detected at a row address and a column address [0073; 0078]; where it is demonstrated exemplary that the fault counter is updated according to newly determined faults [0078]),
wherein the must monitor includes a row must flag indicating must fault status of a fault row and a column must flag indicating the must fault status of a fault column (the must monitor includes a row must flag [0048-0049] and a column must flag [0050-0051]),
wherein the fault address collector includes: a row fault address collector indicating a fault column address and pivot fault status for every fault row address, and a column fault address collector indicating a fault row address and the pivot fault status for every fault column address (the fault address collector collects both row and column addresses for every fault [0039-0049] where the location of the storage is indicative of pivot fault information [0040 and 0053; spare versus non-spare]),
wherein the fault monitor includes a row fault monitor indicating a location where fault information for a fault row is to be stored and a column fault monitor indicating a location where fault information for a fault column is to be stored (the system includes a child memory including pointers to the address and corresponding information indicating the fault stored in the parent memory [0061-62]),
wherein the row fault monitor includes a first active flag indicating a fault row (the system includes an active flag (ADDR and ADD DES) indicating a row address [0079])
and a […] pointer flag indicating a location where the fault information is to be stored in the row count flag, the row must flag, and the row fault address collector (where the system further includes a pointer flag to indicate corresponding location of the fault information [0061-62; 0079]),
and wherein the column fault monitor includes a second active flag indicating a fault column (the system includes an active flag (ADDR and ADD DES) indicating a column address [0075])
and a […] pointer flag indicating a location where the fault information is to be stored in the column count flag, the column must flag, and the column fault address collector (where the system further includes a pointer flag to indicate corresponding location of the fault information [0061-62; 0079]).
Jeong does not appear to disclose and Kang teaches,
the pivot fault status being set by a pivot flag to 1 for pivot faults and to 0 for non-pivot faults (an enable flag is set to 1 upon detection of a fault classified as a spare pivot fault [0026]; where a spare pivot fault is where a row and column address is not shared ("pivot fault") [0016]),
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the memory-analysis and fault storing system of Jeong to incorporate a dedicated flag for indicating pivot faults of Kang. The resulting combination reduces hardware overhead by storing additional information pivot failures in an additional line, via a flag, to reduce the need for a content-addressable memory dedicated to holding pre-classified failure information [Kang; 0003-0004].
Jeong discloses use of a pointer flag [0061-62; 0079] but does not appear to explicitly disclose a distinct first and second pointer flag. Catthoor teaches,
and a first pointer flag indicating a location … (a long pointer dedicated to a row location in a memory [0115]),
and a second pointer flag indicating a location … (a long pointer dedicated to a column location in memory [0115]).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the single pointer flag indicative of both row and column-based fault information of Jeong to incorporate the use of a distinct pointer for a location by row and a distinct, dedicated pointer for a location by column of Catthoor. The resulting combination allows for the single pointer flag of Jeong to now provide efficient access to the dedicated storage location(s) attempted to be accessed; as dedicated pointers may allow for efficient access via a simple, logical bit-positioning and logical hardware not requiring decoding [Catthoor; 0115].
Allowable Subject Matter
Claim 8 is allowed.
The following is a statement of reasons for the indication of allowable subject matter:
Jeong discloses a device including parent memory configured to store fault addresses ("fault address collector") [0039] where the parent memory may store information about a must repair ("must monitor") [0040] and the system determines and sends faults to the fault information storing device (thus, a "fault monitor") [0039]; further including a repeat count value indicating the number of faults at a given row and address ("fault counter") [0073]; the system includes a child memory including pointers to the address and corresponding information regarding the fault stored in the parent memory [0061-62]; a fault counter is configured to indicate the number of fault cells previously detected at a row address and a column address [0073; 0078]; the system is configured with "must flags" ("must information") indicating a must fault [0048-0051]; the parent memories are configured to store the location of a fault cell by row address and column address [0039]; a repeat count value ("fault counter") is configured to indicate the number of fault cells previously detected at a row address and a column address [0073; 0078]; where it is demonstrated exemplary that the fault counter is updated according to newly determined faults [0078]; the must monitor includes a row must flag [0048-0049] and a column must flag [0050-0051]; the fault address collector collects both row and column addresses for every fault [0039-0049] where the location of the storage is indicative of pivot fault information [0040 and 0053; spare versus non-spare]; the system includes a child memory including pointers to the address and corresponding information indicating the fault stored in the parent memory [0061-62]; the system includes an active flag (ADDR and ADD DES) indicating a row address [0079]; the system includes an active flag (ADDR and ADD DES) indicating a column address [0075]; where the system further includes a pointer flag to indicate corresponding location of the fault information [0061-62; 0079].
Catthoor discloses two long pointers each dedicated to a row and, distinctly, a column location in a memory [0115].
Kang discloses an enable flag is set to 1 upon detection of a fault classified as a spare pivot fault [0026]; where a spare pivot fault is where a row and column address is not shared ("pivot fault") [0016].
While the prior art of record discloses a pivot fault status [Kang; 0026] and a fault address collector [Jeong; 0039], the prior art of record does not disclose, without impermissible hindsight reasoning, storing … pivot fault status in the fault address collector.
Response to Arguments
Applicant’s arguments filed 12/17/2025 have been fully considered and are persuasive.
Regarding Applicant’s arguments to the previous rejection under 35 U.S.C. 101 of Claim 15 on Page 6, the Examiner acknowledges that Claim 15 has been canceled, thus the rejection has been withdrawn.
Applicant’s arguments regarding the previous rejection under 35 U.S.C. 102 of pending Claims 1 and 8 on Pages 7-10 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, new grounds of rejection are made in view of Kang and Catthoor. The Examiner agrees that Jeong is silent regarding a pivot flag setting the pivot fault status, and instead points to Kang paragraph 26. The Examiner further agrees that Jeong is silent regarding a first and second pointer flag and instead points to Catthoor [0115]. Please see the rejection to Claim 1 under 35 U.S.C. 103 above.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/A.E.W./Examiner, Art Unit 2113 /BRYCE P BONZO/Supervisory Patent Examiner, Art Unit 2113