Prosecution Insights
Last updated: October 02, 2026
Application No. 18/795,615

IMAGE SENSOR

Non-Final OA §102§103
Filed
Aug 06, 2024
Priority
Jan 03, 2024 — RE 10-2024-0000726
Examiner
HAWKINS, IHSAN TAIWO
Art Unit
Tech Center
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
100%
Grant Probability
Favorable
1-2
OA Rounds
1y 0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 100% — above average
100%
Career Allowance Rate
1 granted / 1 resolved
+40.0% vs TC avg
Minimal +0% lift
Without
With
+0.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 2m
Avg Prosecution
14 currently pending
Career history
7
Total Applications
across all art units

Statute-Specific Performance

§103
54.4%
+14.4% vs TC avg
§102
24.6%
-15.4% vs TC avg
§112
21.1%
-18.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 16-18 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Shin et al. (US 20140361355 A1) hereinafter referred to as "Shin". Regarding Claim 16, Shin teaches an image sensor comprising: a substrate (Fig. 10, element 101; ¶: [0046]) including a plurality of pixel areas (Fig. 10, element P; ¶: [0036]); a pixel isolation film (Fig. 10, element 130; ¶: [0045]) disposed in the substrate, the pixel isolation film separating the plurality of pixel areas from each other; each pixel area of the plurality of pixel areas including, a first impurity region (Fig. 10, element 113; ¶: [0048]) doped with an impurity of a first conductivity-type, a second impurity region (Fig. 10, element 115; ¶: [0054]) surrounding the first impurity region, the second impurity region doped with an impurity of a second conductivity-type different from the first conductivity-type, and an element isolation film (Fig. 10, element 120; ¶: [0045]) between the first impurity region and the second impurity region; and the element isolation film has a first stack structure (Fig. 10, element 120; ¶: [0045, 0061]) in a first direction different from a second stack structure (Fig. 9, element 120; ¶: [0045, 0052]) of the element isolation film in a second direction , the first direction parallel to an upper surface of the substrate, and the second direction perpendicular to the upper surface of the substrate. Regarding Claim 17, Shin teaches the first stack structure of the element isolation film including a first insulating layer (Fig. 10, element 121; ¶: [0052]), a second insulating layer (Fig. 10, element 125; ¶: [0062]), and a third insulating layer (Fig. 10, element 123; ¶: [0052]) stacked in the first direction; and the second stack structure of the element isolation film (Fig. 9, element 120; ¶: [0045, 0052]) including at least a portion of the first insulating layer (Fig. 9, element 121; ¶: [0052]) and at least a portion of the third insulating layer (Fig. 9, element 123; ¶: [0052]) stacked in the second direction. Regarding Claim 18, Shin teaches at least the portion of the third insulating layer (Fig. 9, 10, element 123; ¶: [0052]) being directly in contact with the at least the portion of the first insulating layer (Fig. 9, 10, element 121; ¶: [0052]) in the second direction. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim 1-3, 6-10, 12, 14, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Yamashita (US 20200227582 A1) in view of Shin. Regarding Claim 1, Yamashita teaches an image sensor comprising: a substrate (Fig. 1, element 109; ¶: [0018]) including a plurality of pixel areas (Fig. 1, element 101a, 101b; ¶: [0018]); a pixel isolation film (Fig. 1, element 104; ¶: [0019]) disposed in the substrate, the pixel isolation film separating the plurality of pixel areas from each other; and each pixel area of the plurality of pixel areas including, a first impurity region (Fig. 1, element 110; ¶: [0022]) doped with an impurity of a first conductivity-type and a second impurity region (Fig. 1, element 112; ¶: [0023]). Yamashita doesn’t teach a second impurity region around the first impurity region in a first direction parallel to an upper surface of the substrate, the second impurity region doped with an impurity of a second conductivity-type different from the first conductivity-type, and an element isolation film between the first impurity region and the second impurity region in the first direction, the element isolation film including, a first insulating layer in contact with the substrate, a second insulating layer on a first portion of the first insulating layer and formed of a material different from a material of the first insulating layer, and a third insulating layer, a first portion of the third insulating layer on the second insulating layer, and a second portion of the third insulating layer is directly in contact with the first insulating layer. Shin teaches a second impurity region (Fig. 10, element 115; ¶: [0054]) around the first impurity region (Fig. 10, element 113; ¶: [0048]) in a first direction parallel to an upper surface of the substrate, the second impurity region doped with an impurity of a second conductivity-type different from the first conductivity-type, and an element isolation film (Fig. 10, element 120; ¶: [0045]) between the first impurity region and the second impurity region in the first direction, the element isolation film including, a first insulating layer (Fig. 10, element 121; ¶: [0052]) in contact with the substrate (Fig. 10, element 100; ¶: [0045]) , a second insulating layer (Fig. 10, element 125; ¶: [0062]) on a first portion of the first insulating layer and formed of a material different from a material of the first insulating layer, and a third insulating layer (Fig. 10, element 123; ¶: [0052]), a first portion of the third insulating layer on the second insulating layer, and a second portion of the third insulating layer is directly in contact with the first insulating layer. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have multiple insulating layers between the impurity regions as if light is incident at an angle, it may be reflected off of the first at an interface between the insulating layers as long as the refractive indices of the insulating layers are different (Shin, ¶: [0052]). Regarding Claim 2, Yamashita in view of Shin teaches the image sensor of claim 1. Yamashita does not teach the second insulating layer including a first side region between the first insulating layer and the third insulating layer in the first direction and adjacent to the first impurity region. Shin teaches the second insulating layer (Fig. 10, element 125; ¶: [0062]) including a first side region between the first insulating layer (Fig. 10, element 121; ¶: [0052])and the third insulating layer (Fig. 10, element 123; ¶: [0052]) in the first direction and adjacent to the first impurity region. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have multiple insulating layers between the impurity regions as if light is incident at an angle, it may be reflected off of the first at an interface between the insulating layers as long as the refractive indices of the insulating layers are different (Shin, ¶: [0052]). Regarding Claim 3, Yamashita in view of Shin teaches the image sensor of claim 2. Yamashita does not teach the second insulating layer further including a second side region between the first insulating layer and the third insulating layer in the first direction and adjacent to the second impurity region; and the second portion of the third insulating layer being between the first side region and the second side region. Shin teaches the second insulating layer further (Fig. 10, element 125; ¶: [0062]) including a second side region between the first insulating layer (Fig. 10, element 121; ¶: [0052]) and the third insulating layer (Fig. 10, element 123; ¶: [0052]) in the first direction and adjacent to the second impurity region; and the second portion of the third insulating layer (Fig. 10, element 123; ¶: [0052]) being between the first side region and the second side region. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have multiple insulating layers between the impurity regions as if light is incident at an angle, it may be reflected off of the first at an interface between the insulating layers as long as the refractive indices of the insulating layers are different (Shin, ¶: [0052]). Regarding Claim 6, Yamashita in view of Shin teaches the image sensor of claim 1. Yamashita does not teach the first impurity region and the second impurity region each having a thickness less than a thickness of the element isolation film in a second direction, the second direction perpendicular to the upper surface of the substrate. Shin teaches the first impurity region (Fig. 10, element 113; ¶: [0048, 0053]) and the second impurity region (Fig. 10, element 115; ¶: [0054, 0053]) each having a thickness less than a thickness of the element isolation film in a second direction, the second direction perpendicular to the upper surface of the substrate. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have the depth of the isolation file be greater so that it may be possible to prevent light from being incident in adjacent logic devices and thus prevent their deterioration (Shin, ¶: [0058]). Regarding Claim 7, Yamashita in view of Shin teaches the image sensor of claim 1. Yamashita does not teach the first impurity region being doped with a P-type impurity; and the second impurity region being doped with an N-type impurity. Shin teaches the first impurity region (Fig. 10, element 113; ¶: [0048]) being doped with a P-type impurity; and the second impurity region (Fig. 10, element 115; ¶: [0054]) being doped with an N-type impurity. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to include a first p-type impurity region to produce electric charges from incident light as well as reduce dark current (Shin, ¶: [0048]), and a surrounding n-type impurity region to act as a channel region for nearby transistors (Shin, ¶: [0055]) Regarding Claim 8, Yamashita in view of Shin teach the image sensor of claim 1. Yamashita further teaches a first contact (Fig. 1, element 122; ¶: [0022]) directly connected to the first impurity region; and at least one second contact (Fig. 1, element 122; ¶: [0022]) directly connected to the second impurity region. Regarding Claim 9, Yamashita in view of Shin teach the image sensor of claim 8. Yamashita further teaches the substrate being a first substrate (Fig. 1, element 109; ¶: [0018]); and the image sensor further including, a plurality of single photon avalanche diode (SPAD) pixels (¶: [0018-0019]), each of the SPAD pixels including, at least one semiconductor element (Fig. 1, element 105; ¶: [0018]) connected to at least one photodiode (Fig. 1, element 101; ¶: [0018]), the first contact and the second contact, the at least one photodiode formed from the first impurity region and the second impurity region, and the at least one semiconductor element is on a second substrate (Fig. 1, element 206; ¶: [0018]) different from the first substrate. Regarding Claim 10, Yamashita in view of Shin teach the image sensor of claim 9. Yamashita further teaches the first contact and the second contact being connected to a plurality of first pads (Fig. 1, element 126; ¶: [0028]); the plurality of semiconductor elements being connected to a plurality of interconnection patterns (Fig. 1, element 124; ¶: [0018]) and a plurality of second pads (Fig. 1, element 210; ¶: [0028]); and the plurality of first pads and the plurality of second pads being in contact with each other (¶: [0028]). Regarding Claim 11, Yamashita in view of Shin teach the image sensor of claim 8., Yamashita and Shin do not specifically state wherein the first contact is configured to receive a first bias voltage; the second contact is configured to receive a second bias voltage; and the first bias voltage is lower than the second bias voltage. However, applicant is claiming the basic function of electronic devices. One of ordinary skill in the art would have been capable of applying this known contact configuration and the results would have been predictable to one of ordinary skill in the art. Therefore, Before the effective filing date of the invention It would have been obvious to one having ordinary skill in the art to have a lower bias voltage to the first contact relative to the second contact to facilitate current flow. Regarding Claim 12, Yamashita in view of Shin teach the image sensor of claim 1. Yamashita further teaches each of the plurality of pixel areas further including: a first well region (Fig. 1, element 102; ¶: [0021]) below the first impurity region (Fig. 1, element 110; ¶: [0022]) in a second direction, the second direction perpendicular to the upper surface of the substrate; a second well region (Fig. 1, element 114; ¶: [0021]) below the second impurity region (Fig. 1, element 112; ¶: [0023]) in the second direction; and a third well region (Fig. 1, element 116; ¶: [0024]) below the first well region and the second well region in the second direction. Regarding Claim 14, Yamashita in view of Shin teach the image sensor of claim 12. Yamashita further teaches at least a portion of the third well region (Fig. 1, element 116; ¶: [0024]) overlaps the element isolation film in the second direction. Regarding Claim 20, Yamashita teaches an image sensor comprising: a substrate (Fig. 1, element 109; ¶: [0018]) including a plurality of pixel areas (Fig. 1, element 101a, 101b; ¶: [0018]); a pixel isolation film (Fig. 1, element 104; ¶: [0019]) disposed in the substrate, the pixel isolation film separating the plurality of pixel areas from each other; and each pixel area of the plurality of pixel areas includes, a photodiode (Fig. 1, element 101; ¶: [0018]), and a plurality of semiconductor elements (Fig. 1, element 105; ¶: [0018]). Yamashita does not teach an element isolation film between at least some of the plurality of semiconductor elements, the element isolation film including a first insulating layer, a second insulating layer, and a third insulating layer, the first insulating layer in contact with the substrate, the second insulating layer on the first insulating layer, the second insulating layer partially covering the first insulating layer, and the second insulating layer formed of a material different from a material of the first insulating layer, and a portion of third insulating layer on the second insulating layer. Shin teaches an element isolation film (Fig. 10, element 120; ¶: [0045]) between at least some of the plurality of semiconductor elements, the element isolation film including a first insulating layer (Fig. 10, element 121; ¶: [0052]), a second insulating layer (Fig. 10, element 125; ¶: [0062]), and a third insulating layer (Fig. 10, element 123; ¶: [0052]), the first insulating layer in contact with the substrate (Fig. 10, element 101; ¶: [0046]), the second insulating layer on the first insulating layer, the second insulating layer partially covering the first insulating layer, and the second insulating layer formed of a material different from a material of the first insulating layer, and a portion of third insulating layer on the second insulating layer. It would be obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have multiple insulating layers between the impurity regions as if light is incident at an angle, it may be reflected off of the first at an interface between the insulating layers as long as the refractive indices of the insulating layers are different (Shin, ¶: [0052]). Claims 4 and 5 are rejected under 35 U.S.C. 103 as being unpatentable Yamashita in view of Shin and further in view of Lee et al. (US 20170047371 A1) hereinafter referred to as "Lee". Regarding Claim 4, Yamashita in view of Shin teaches the image sensor of claim 2. However, neither Shin nor Yamashita teach the second insulating layer further including: a lower region between the first insulating layer and the third insulating layer in a second direction, the lower region extending from the first side region, the second direction being perpendicular to the upper surface of the substrate. Lee teaches the second insulating layer (Fig. 2, element 63; ¶: [0051]) further including: a lower region between the first insulating layer (Fig. 2, element 61; ¶: [0051]) and the third insulating layer (Fig. 2, element 62; ¶: [0051]) in a second direction, the lower region extending from the first side region, the second direction being perpendicular to the upper surface of the substrate (Fig. 2, element 21; ¶: [0048]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to include multiple insulating layers to induce hole accumulation and thus prevent dark currents, white spot defects and/or blooming effects (Lee, ¶: [0056, 0060]). Regarding Claim 5, Yamashita in view of Shin and further in view of Lee teaches the image sensor of claim 4. Yamashita does not teach the second portion of the third insulating layer being on a first side of the first insulating layer in the first direction; and the first insulating layer being directly in contact with the second impurity region on a second side of the first insulating layer in the first direction. Shin further teaches the second portion of the third insulating layer (Fig. 10, element 123; ¶: [0052]) being on a first side of the first insulating layer (Fig. 10, element 121; ¶: [0052]) in the first direction; and the first insulating layer being directly in contact with the second impurity region (Fig. 10, element 115; ¶: [0054]) on a second side of the first insulating layer in the first direction. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have multiple insulating layers between the impurity regions as if light is incident at an angle, it may be reflected off of the first at an interface between the insulating layers as long as the refractive indices of the insulating layers are different (Shin, ¶: [0052]). Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Yamashita in view of Shin and further in view of Chen et al. (US 20240153979 A1) hereinafter referred to as "Chen". Regarding Claim 13, Chen teaches the first well region (Fig. 16A, element 140b; ¶: [0027]) being doped with an impurity of the first conductivity-type, and the first well region having an impurity concentration lower than an impurity concentration of the first impurity region (Fig. 16A, element 140b; ¶: [0027]); and the second well region (Fig. 16A, element 150b; ¶: [0027]) and the third well region (Fig. 16A, element 108; ¶: [0027]) are doped with an impurity of the second conductivity-type, and the second well region and the third well region have an impurity concentration lower than an impurity concentration of the second impurity region (¶: [0027]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to include the less concentrated well regions in order to improve the structure of the image sensor by reducing dark currents, white pixels, and electron crosstalk (Chen, ¶: [0028]). Allowable Subject Matter Claims 15, and 19 are objected to as being dependent upon a rejected base claim but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claims 11 and 15 are objected to as being dependent on rejected claim 1 Claim 19 is objected to as being dependent on rejected claim 16 The following is a statement of reasons for the indication of allowable subject matter: Regarding Claim 15, the prior art discloses certain elements of the claimed invention including but not limited to an image sensor with multiple impurity regions, impurity concentrated well areas, and isolation films. However, when taken alone or in combination, the prior art cannot be construed to teach or suggest the elements of the claimed invention regarding: ”the second well region having a thickness greater than a thickness of the element isolation film in the second direction”. Regarding Claim 19, the prior art discloses certain elements of the claimed invention including but not limited to an image sensor comprising multiple impurity regions and an isolation film comprising different stacks of insulating layers. However, when taken alone or in combination, the prior art cannot be construed to teach or suggest the elements of the claimed invention regarding: ”the first impurity region configured to be an anode of the SPAD pixel, and the second impurity region configured to be a cathode of the SPAD pixel”. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to IHSAN HAWKINS whose telephone number is (571)272-8594. The examiner can normally be reached Mon-Thu 7:00AM-5:00PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Zandra Smith can be reached at (571)272-2429. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /I.H./Examiner, Art Unit 2899 /LAWRENCE C TYNES JR./Examiner, Art Unit 2899
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Prosecution Timeline

Aug 06, 2024
Application Filed
Sep 23, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
100%
Grant Probability
99%
With Interview (+0.0%)
3y 2m (~1y 0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1 resolved cases by this examiner. Grant probability derived from career allowance rate.

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