Prosecution Insights
Last updated: July 17, 2026
Application No. 18/796,115

INTEGRATED OPTICAL COUPLING SWITCH

Non-Final OA §103§112
Filed
Aug 06, 2024
Priority
Apr 12, 2022 — CN 202210383343.5 +1 more
Examiner
HOLLWEG, THOMAS A
Art Unit
Tech Center
Assignee
Shenzhen Lighting Institute
OA Round
1 (Non-Final)
53%
Grant Probability
Moderate
1-2
OA Rounds
1y 1m
Est. Remaining
84%
With Interview

Examiner Intelligence

Grants 53% of resolved cases
53%
Career Allowance Rate
247 granted / 464 resolved
-6.8% vs TC avg
Strong +31% interview lift
Without
With
+31.2%
Interview Lift
resolved cases with interview
Typical timeline
3y 0m
Avg Prosecution
14 currently pending
Career history
483
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
86.2%
+46.2% vs TC avg
§102
8.8%
-31.2% vs TC avg
§112
3.4%
-36.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 464 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Drawings The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because they do not include the following reference sign(s) mentioned in the description: Insulation layer 30 is not labeled in figs. 2-4. Also, the “spacer layer” of claim 3 is not labeled in the drawings (It is presumed that the spacer layer is the small layer shown in fig. 2 below layer 22. The following claimed features are not shown in the drawings: Claim 13 “a projection area of the upper electrode onto the silicon substrate is equal to a projection area of the optical waveguide adjacent to the upper electrode onto the silicon substrate”. Claim 14 “a projection area of the upper electrode onto the silicon substrate is larger than a projection area of the optical waveguide adjacent to the upper electrode onto the silicon substrate and does not overlap with a projection area of the other optical waveguide onto the silicon substrate”. Not an objection, but the examiner notes that fig. 3 presented with the instant U.S. Application shown with electrode 22 in contact with the insulating layer and the waveguide 11 is different from fig. 3 published in WO 2023197757 A1, the PCT publication of the parent application where electrode is shown in contact with waveguide 11, but not in contact with the insulating layer. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Specification The disclosure is objected to because of the following informalities: In Paragraph [0028], line 6 the “second optical waveguide” is labeled 10 instead of 12. Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claims 1 and 19 recite “a lower electrode that is arranged on a silicon surface and avoids the optical waveguides”. It is unclear what the word “avoids” means in this context. Relying on the specification for clarity, for prior art examination, this phrase will be taken to mean that the lower electrode is separated from the optical waveguides. Claim 7, “the electrode” of line 4 lacks antecedent basis. Claim 12 introduces “a silicon substrate” on which the lower electrode is provided. However claim 1 recites “a lower electrode that is arranged on a silicon surface”. It is unclear how the silicon substrate of claim 12 relates to the silicon surface of claim 1. Claim 14 is dependent on claim 13. Claim 13 requires that the projection area of the upper electrode and the projection area of the optical waveguide be equal. Claim 14 requires that the projection area of the upper electrode be larger than the projection area of the optical waveguide. Therefore the terms of claim 14 are in conflict with the terms of claim 13. Claim 16, “the sacrificial layer” lacks antecedent basis. Also, because there is no sacrificial layer in any of the parent claims of claim 16, this claim limitation does not make sense. Claim 16 will be treated as being dependent on claim 19 which recites a sacrificial layer. With regard to claim 11, a broad range or limitation together with a narrow range or limitation that falls within the broad range or limitation (in the same claim) may be considered indefinite if the resulting claim does not clearly set forth the metes and bounds of the patent protection desired. See MPEP § 2173.05(c). In the present instance, claim 11 recites the broad recitation “a transparent insulating substance with a high refractive index”, and the claim also recites “silicon nitride” which is the narrower statement of the range/limitation. The claim(s) are considered indefinite because there is a question or doubt as to whether the feature introduced by such narrower language is (a) merely exemplary of the remainder of the claim, and therefore not required, or (b) a required feature of the claims. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over Huang et al., U.S. Patent Application Publication No. 20170059778 A1 in view of Moebius et al., U.S. Patent No. 10,823,913 B1. With regard to claim 1, Huang, in figs. 4 and 6 disclose an integrated optical coupling switch, comprising: two optical waveguides parallel to each other (410/412/414); two electrodes that are electrostatically attracted to each other (404/422}, wherein the two electrodes comprise a lower electrode (404) that is arranged on a silicon surface (402 is silicon [0011]) and avoids the optical waveguides(410/412/414), and an upper electrode (422) that is arranged above the optical waveguides (410/412/414) and formed as a micro-electromechanical architecture, and the upper electrode (422) is attracted to come into contact with surfaces of the optical waveguides (410/412/414) when reaching a preset voltage value; and an insulating layer (layer 420 under electrode 422) used for preventing the upper electrode (422) from directly contacting the lower electrode (404) to cause short circuit when the upper electrode (422) is attracted to come into contact with the surfaces of the optical waveguides (410/412/414) [0028-0035]. Huang teaches that the insulating layer (420) is between the two electrodes, but it does not expressly teach that the insulating layer is not provided on a surface of the lower electrode. Moebius, in figs. 10 and 11, teaches a MEMS optical switch having an insulating layer/stops 1002 on the surface of the lower electrode 1000 to prevent the upper and lower electrodes from short circuiting and to provide a mechanical stop for the moving portion of the MEMS device. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide an insulating layer on the surface of the lower electrode of the Huang device to prevent the upper and lower electrodes from short circuiting and to provide a mechanical stop for the moving portion of the MEMS device, as taught by Moebius. With regard to claim 2, the Huang/Moebius device described in the rejection of claim 1 above teaches that the upper electrode is provided as a micro-electromechanical architecture above the insulating layer and is spaced apart from the insulating layer. With regard to claim 3, the Huang/Moebius device described in the rejection of claim 1 above teaches the upper electrode is arranged above the insulating layer and spaced apart from the insulating layer, and a spacer layer (gap) is provided between the upper electrode and the insulating layer. With regard to claim 4, the Huang/Moebius device described in the rejection of claim 1 above teaches that the spacer layer may be an air layer or an inert gas layer. With regard to claim 5, the Huang/Moebius device described in the rejection of claim 1 above teaches that both the insulating layer and the lower electrode are spaced apart from the optical waveguides. With regard to claim 6, the Huang/Moebius device described in the rejection of claim 1 above teaches that the lower electrode and the upper electrode are separated from each other by the insulating layer. With regard to claim 7, the Huang/Moebius device described in the rejection of claim 1 above teaches that the lower and upper electrodes are provided outside the two parallel optical waveguides, and the insulating layer is sandwiched in lower and upper electrodes electrode for separating the lower electrode from the upper electrode of the electrode. With regard to claim 8, the Huang/Moebius device described in the rejection of claim 1 above teaches that the insulating layer may be formed by one of nitrocellulose polymer, silicon nitride, or silicon dioxide (Huang [0018]). With regard to claim 9, the Huang/Moebius device described in the rejection of claim 1 above teaches that Huang, in figs. 4 and 6 disclose a surface of the upper electrode (422) away from the insulating layer is provided with a material capable of enhancing strength of the upper electrode (layer 424). With regard to claim 10, the Huang/Moebius device described in the rejection of claim 1 above teaches that the material may be made of a metal or dielectric layer with higher hardness (Huang [0035]). With regard to claim 11, the Huang/Moebius device described in the rejection of claim 1 above teaches that the optical waveguides are formed by a material comprising silicon nitride or a transparent insulating substance with a high refractive index (Moebius [0011]). With regard to claim 12, the Huang/Moebius device described in the rejection of claim 1 above teaches that further comprising a silicon substrate (402), wherein the lower electrode (404) is provided on the silicon substrate (Moebius [0011]). With regard to claim 13, the Huang/Moebius device described in the rejection of claim 1 above teaches that a projection area of the upper electrode onto the silicon substrate is equal to a projection area of the optical waveguide adjacent to the upper electrode onto the silicon substrate. With regard to claim 14, the Huang/Moebius device described in the rejection of claim 1 above teaches that a projection area of the upper electrode onto the silicon substrate is larger than a projection area of the optical waveguide adjacent to the upper electrode onto the silicon substrate and does not overlap with a projection area of the other optical waveguide onto the silicon substrate. With regard to claim 15, the Huang/Moebius device described in the rejection of claim 1 above teaches that the insulating layer and the optical waveguides are positioned at a same level or the insulating layer is located is higher than a horizontal height at which the optical waveguide is located. With regard to claim 17, the Huang/Moebius device described in the rejection of claim 1 above teaches that the lower electrode and the upper electrode are formed by a material comprising aluminum alloy, silicon series material, or metal compatible with a silicon process (Huang [0020]). With regard to claim 18, the Huang/Moebius device described in the rejection of claim 1 above teaches that the optical waveguides are Mach Zehender optical waveguides (Huang fig. 6 [0042-0042]). With regard to claim 19, Huang, in figs. 4 and 6 disclose a method for forming an integrated optical coupling switch, wherein the integrated optical coupling switch comprises: two optical waveguides (410/412/414) parallel to each other; two electrodes (404/422) that are electrostatically attracted to each other, wherein the two electrodes comprise a lower electrode (404) that is arranged on a silicon surface (402) and avoids the optical waveguides, and an upper electrode (422) that is arranged above the optical waveguides (410/412/414) and formed as a micro-electromechanical architecture, and the upper electrode (422) is attracted to come into contact with surfaces of the optical waveguides (410/412/414) when reaching a preset voltage value; and an insulating layer used for preventing the upper electrode (422) from directly contacting the lower electrode (404) to cause short circuit when the upper electrode (422) is attracted to come into contact with the surfaces of the optical waveguides (410/412/414), [0028-0035] and wherein the method comprises: forming a sacrificial layer on the insulating layer; providing the upper electrode onto the sacrificial layer; etching the sacrificial layer away to form a spacer layer between the upper electrode and the insulating layer (as described in [0032]). Huang teaches that the insulating layer (420) is between the two electrodes, but it does not expressly teach that the insulating layer is not provided on a surface of the lower electrode. Moebius, in figs. 10 and 11, teaches a MEMS optical switch having an insulating layer/stops 1002 on the surface of the lower electrode 1000 to prevent the upper and lower electrodes from short circuiting and to provide a mechanical stop for the moving portion of the MEMS device. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide an insulating layer on the surface of the lower electrode of the Huang device to prevent the upper and lower electrodes from short circuiting and to provide a mechanical stop for the moving portion of the MEMS device, as taught by Moebius. With regard to claim 20, Huang discloses the conventional technique of providing and removing sacrificial layers in manufacturing semiconductor devices, however it does not expressly describe polishing a surface of the sacrificial layer away from the lower electrode, to make the surface of the sacrificial layer away from the lower electrode flat. One skilled in the art would understand that any needed steps in forming a MEMs semiconductor device such as polishing, etching, etc., would be obvious to form the device of desired shape and function. Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention where forming the Huang device further comprises: polishing a surface of the sacrificial layer away from the lower electrode, to make the surface of the sacrificial layer away from the lower electrode flat to achieve a MEMs device with the desired shape and function. With regard to claim 16, Huang discloses using a sacrificial layer to form the upper electrode, but is silent as to what type of material is used. Photoresist sacrificial layers are commonly used and well known in the art. Therefore, It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the sacrificial layer may be photoresist in the formation of the Huang device, since these are commonly used and well known. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Thomas A Hollweg whose telephone number is (571)270-1739. The examiner can normally be reached M-F 8-4. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matthew W Such can be reached at (571)272-1570. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /THOMAS A HOLLWEG/Supervisory Patent Examiner, Art Unit 2874
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Prosecution Timeline

Aug 06, 2024
Application Filed
Jun 24, 2026
Non-Final Rejection mailed — §103, §112 (current)

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Prosecution Projections

1-2
Expected OA Rounds
53%
Grant Probability
84%
With Interview (+31.2%)
3y 0m (~1y 1m remaining)
Median Time to Grant
Low
PTA Risk
Based on 464 resolved cases by this examiner. Grant probability derived from career allowance rate.

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