DETAILED ACTION
This action is in response to the filing 08/06/2024. Claims 1-20 are pending and have been fully examined.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of the Claims
Claims 1-6 are interpreted under 35 U.S.C. 112(f).
Claims 1, 7-8, and 18 are rejected under 35 U.S.C. 102.
Claims 2-6, 9, 11-13, 15-17, and 19-20 are rejected under 35 U.S.C. 103.
Claims 10 and 14 contain allowable subject matter but are objected to as being dependent upon rejected base claims.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are:
Claim 1: “A neural network (NN) module configured to…” with the following three-prong test analysis:
The term “module” is used as a substitute for means as a generic placeholder.
The generic placeholder is modified by the following functional language:
Process a plurality of vectorized channel samples.
The generic placeholder is not found to be modified by sufficient structure, material, or acts in Claim 1.
The corresponding structure for performing the claimed “processing of a plurality of vectorized channel samples” is found to be modified by a processor executing computer executable code [0011]. Therefore, the “module” is interpreted to be a circuit (processor).
Claim 1: “A vectorization module configured to…” with the following three-prong test analysis:
The term “module” is used as a substitute for means as a generic placeholder.
The generic placeholder is modified by the following functional language:
Vectorize a plurality of windowed channel samples.
The generic placeholder is not found to be modified by sufficient structure, material, or acts in Claim 1.
The corresponding structure for performing the claimed “vectorize a plurality of windowed channel samples” is found to be modified by a processor executing computer executable code [0011]. Therefore, the “module” is interpreted to be a circuit (processor).
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 7-8, and 18 are rejected under 35 U.S.C. 102(a)(1) and (a)(2) as being unpatentable in view of Pattipati et al. (U.S. PGPub No. 20230106360).
Regarding Claim 1, Pattipati teaches,
An apparatus comprising: a neural network (NN) module configured to process a plurality of vectorized channel samples and to generate a plurality of power supply fault predictions (in a system designed to detect one or more power electronics failures [0101]; where the input to the neural network (for clarity: also called NARX model [0077 and/or 0143]) is a vector of inputs ("vectorized") [0147]; where the neural network may receive inputs including known current from switching devices (vectorized "channel samples") [0188]; where the NARX ("neural network") module generates residuals used to detect predicted faults [0128]; where the CUSUM detection may exist corresponding to the NARX (therefore, neural network "module") [0128]);
and a vectorization module coupled to the NN module, the vectorization module configured to vectorize a plurality of windowed channel samples and to generate the plurality of vectorized channel samples (where the data is preprocessed such that they may be a median of samples from a given length window ("windowed channel samples") [0119]; where the input to the NARX neural network is a vector [0147]; therefore, the examiner notes, vectorization is performed).
Regarding Claim 7, Pattipati teaches,
A method comprising: performing a neural network (NN) processing on a plurality of vectorized channel samples to generate a plurality of power supply fault predictions (in a system designed to detect one or more power electronics failures [0101]; where the input to the neural network (for clarity: also called NARX model [0077 and/or 0143]) is a vector of inputs ("vectorized") [0147]; where the neural network may receive inputs including known current from switching devices (vectorized "channel samples") [0188]; where the NARX ("neural network") module generates residuals used to detect predicted faults [0128]; where the CUSUM detection may exist corresponding to the NARX (therefore, neural network "module") [0128]);
and vectorizing a plurality of windowed channel samples to generate the plurality of vectorized channel samples (where the data is preprocessed such that they may be a median of samples from a given length window ("windowed channel samples") [0119]; where the input to the NARX neural network is a vector [0147]; therefore, the examiner notes, vectorization is performed).
Regarding Claim 8, Pattipati teaches,
The method of claim 7, wherein the plurality of power supply fault predictions includes one or more of the following: a prediction of power supply overvoltage, a prediction of power supply undervoltage, a prediction of power supply overcurrent, a prediction of power supply undercurrent, a prediction of power supply temperature violation, or a prediction of power supply battery depth of discharge (DoD) violation (where faults and failures are classified according to the electronic behavior and includes at least short circuit failures ("overcurrent") [0096]).
Regarding Claim 18, Pattipati teaches,
A non-transitory computer-readable medium storing computer executable code, operable on a device comprising at least one processor and at least one memory coupled to the at least one processor, wherein the at least one processor is configured to implement power state management and diagnostics, the computer executable code comprising:
instructions for causing a computer to perform a neural network (NN) processing on a plurality of vectorized channel samples; instructions for causing the computer to generate a plurality of power supply fault predictions (in a system designed to detect one or more power electronics failures [0101]; where the input to the neural network (for clarity: also called NARX model [0077 and/or 0143]) is a vector of inputs ("vectorized") [0147]; where the neural network may receive inputs including known current from switching devices (vectorized "channel samples") [0188]; where the NARX ("neural network") module generates residuals used to detect predicted faults [0128]; where the CUSUM detection may exist corresponding to the NARX (therefore, neural network "module") [0128]);
instructions for causing the computer to vectorize a plurality of windowed channel samples; and instructions for causing the computer to generate the plurality of vectorized channel samples (where the data is preprocessed such that they may be a median of samples from a given length window ("windowed channel samples") [0119]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2-6, 9, 11-13, 15-17, and 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Pattipati in view of Mosberger-Tang (U.S. PGPub No. 20100235144).
Regarding Claim 2, Pattipati discloses,
The apparatus of claim 1, further comprising an apodizer coupled to the vectorization module, the apodizer configured to time window a plurality of … channel samples and to generate the plurality of windowed channel samples (where the data is preprocessed such that they may be a median of samples from a given length window ("windowed channel samples") [0119]).
Pattipati does not appear to disclose and Mosberger-Tang teaches,
… interpolated channel samples (where converted digital data (ADC [0083]) is interpolated ("interpolated" channel samples") [0082])
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the neural-network based fault prediction of Pattipati to incorporate the preprocessing step of interpolation as taught by Mosberger-Tang. The resulting combination resolves the problem of preventing two samples from being acquired simultaneously, where interpolation between samples allows for power calculation between samples with good accuracy at a low computational cost [Mosberger-Tang; 0083-0084].
Regarding Claim 3, Pattipati teaches,
The apparatus of claim 2, wherein the time window is weighted (where the data is preprocessed such that they may be a median of samples from a given length window ("windowed channel samples") [0119]; the examiner notes that performing the median is the act of weighting).
Regarding Claim 4, Pattipati does not appear to disclose and Mosberger-Tang teaches,
The apparatus of claim 2, further comprising an interpolator coupled to the apodizer, the interpolator configured to interpolate a plurality of digital channel samples and to generate the plurality of interpolated channel samples of a reconstructed waveform (where converted digital data (ADC [0083]) is interpolated [0082]; where the interpolation is a waveform ("reconstructed waveform") [Fig. 8, also see Fig. 9 for another demonstration of interpolated waveforms]).
The same motivation for Claim 2 also applies to Claim 4.
Regarding Claim 5, Pattipati teaches,
generate the plurality of digital channel samples based on a triggered event (where state data may be determined from sensed data during a timing event or trigger [0154]) while the sensors providing data to the control system may output in either analog or digital [0104]
Pattipati does not appear to disclose and Mosberger-Tang teaches,
The apparatus of claim 4, further comprising an analog to digital converter (ADC) coupled to the interpolator, the ADC configured to digitize one of a plurality of power supply channels and to generate the plurality of digital channel samples (where there is a multi-channel A/D converter (ADC) that performs analog to digital conversion prior to interpolation and samples both voltage and power from probes over multiple times (t0, t1, t2, etc.) ("plurality of digital channel samples") [0083 & Fig. 3]).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the neural-network based fault prediction of Pattipati to incorporate the preprocessing step of performing analog-to-digital conversion as taught by Mosberger-Tang. The resulting combination allows for data to be sampled in analog format, and the particular ADC configuration of Mosberger-Tang prevents reduced sampling due to each conversion taking a certain amount of time by allowing channel selection by the ADC [Mosberger-Tang; 0083 also see Fig. 3].
Regarding Claim 9, Pattipati discloses,
The method of claim 7, wherein the plurality of power supply fault predictions includes one or more of the following: … a power supply line fault (the indicated faults may include wire-bond degradation ("power supply line fault") [0095])
Pattipatti does not appear to disclose and Mosberger-Tang teaches,
The method of claim 7, wherein the plurality of power supply fault predictions includes one or more of the following: an electrostatic discharge (ESD) event, a power supply glitch, or a power supply line fault (where the monitoring and processing is performed to minimize data loss in the event of a power failure ("power supply glitch" and "power supply line fault") [0025]).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the neural-network based fault prediction of Pattipati to incorporate the feature of performing a prediction based on a broader range of failure types as taught by Mosberger-Tang. The resulting combination allows for enhanced data reliability by preventing data loss in the event of a power failure [Mosberger-Tang; 0022].
Regarding Claim 11, Pattipati teaches,
The method of claim 7, further comprising time windowing a plurality of … channel samples to generate the plurality of windowed channel samples (where the data is preprocessed such that they may be a median of samples from a given length window ("windowed channel samples") [0119]).
Pattipati does not appear to disclose and Moseberger-Tang teaches,
… interpolated channel samples (where converted digital data (ADC [0083]) is interpolated [0082])
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the neural-network based fault prediction of Pattipati to incorporate the preprocessing step of interpolation as taught by Mosberger-Tang. The resulting combination resolves the problem of preventing two samples from being acquired simultaneously, where interpolation between samples allows for power calculation between samples with good accuracy at a low computational cost [Mosberger-Tang; 0083-0084].
Regarding Claim 12, Pattipati does not appear to disclose and Mosberger-Tang teaches,
The method of claim 11, further comprising interpolating a plurality of digital channel samples to generate the plurality of interpolated channel samples of a reconstructed waveform (where converted digital data (ADC [0083]) is interpolated [0082]; where the interpolation is a waveform ("reconstructed waveform") [Fig. 8, also see Fig. 9 for another demonstration of interpolated waveforms]).
The same motivation for Claim 11 also applies to Claim 12.
Regarding Claim 13, Pattipati does not appear to disclose and Mosberger-Tang teaches,
The method of claim 12, wherein the reconstructed waveform includes an estimated frequency based on a counter measurement of one or more detected peaks of the plurality of digital channel samples (where the interpolated waveform ([0082]) includes determining the frequency [0083] where the reconstructed waveform is interpolated from digital samples [0042&0083]).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the neural-network based fault prediction of Pattipati to incorporate the preprocessing step of acquiring frequency of the interpolated waveform ("reconstructed waveform") as taught by Mosberger-Tang. The resulting combination allows for higher accuracy eGauge measurements when sampling the voltage at the probes [Mosberger-Tang; 0082].
Regarding Claim 15, Pattipati discloses,
generate the plurality of digital channel samples based on a triggered event (where state data may be determined from sensed data during a timing event or trigger [0154]) while the sensors providing data to the control system may output in either analog or digital [0104].
Pattipati does not appear to disclose and Mosberger-Tang teaches,
The method of claim 12, further comprising digitizing one of a plurality of power supply channels to generate the plurality of digital channel samples (where there is a multi-channel A/D converter (ADC) that performs analog to digital conversion prior to interpolation and samples both voltage and power from probes over multiple times (t0, t1, t2, etc.) ("plurality of digital channel samples") [0083 & Fig. 3]).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the neural-network based fault prediction of Pattipati to incorporate the preprocessing step of performing analog-to-digital conversion as taught by Mosberger-Tang. The resulting combination allows for data to be sampled in analog format, and the particular ADC configuration of Mosberger-Tang prevents reduced sampling due to each conversion taking a certain amount of time by allowing channel selection by the ADC [Mosberger-Tang; 0083 also see Fig. 3].
Regarding Claim 16, Pattipati does not appear to disclose and Mosberger-Tang teaches,
The method of claim 15, further comprising multiplexing the plurality of power supply channels from a plurality of electronic subsystems (where the system comprises a plurality of ADCs [0042]; where the plurality of ADCs unit (310 of Fig. 3) are demonstrated to behave as a multiplexor in Fig. 3 by selecting either current or voltage from the probes to be collected at a time (t0, t1, t2, etc.) [0083]).
The same motivation for Claim 15 also applies to Claim 16.
Regarding Claim 17, Pattipati teaches,
The method of claim 16, wherein the plurality of electronic subsystems is a plurality of automotive subsystems (where the control system may be applied to predict failure of a power inverter of a vehicle ("automotive subsystem") [0019]).
Regarding Claim 19, Pattipati teaches,
The non-transitory computer-readable medium of claim 18, further comprising: instructions for causing the computer to time window a plurality of … channel samples; instructions for causing the computer to generate the plurality of windowed channel samples (where the data is preprocessed such that they may be a median of samples from a given length window ("windowed channel samples") [0119]);
Pattipati does not appear to disclose and Mosberger-Tang teaches,
instructions for causing the computer to interpolate a plurality of digital channel samples; and instructions for causing the computer to generate the plurality of interpolated channel samples of a reconstructed waveform (where converted digital data (ADC [0083]) is interpolated [0082]; where the interpolation is a waveform ("reconstructed waveform") [Fig. 8, also see Fig. 9 for another demonstration of interpolated waveforms]).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the neural-network based fault prediction of Pattipati to incorporate the preprocessing step of interpolation as taught by Mosberger-Tang. The resulting combination resolves the problem of preventing two samples from being acquired simultaneously, where interpolation between samples allows for power calculation between samples with good accuracy at a low computational cost [Mosberger-Tang; 0083-0084].
Regarding Claim 2, Pattipati teaches,
generate the plurality of digital channel samples based on a triggered event (where state data may be determined from sensed data during a timing event or trigger [0154]) while the sensors providing data to the control system may output in either analog or digital [0104];
Pattipati does not appear to disclose and Mosberger-Tang teaches,
instructions for causing the computer to digitize one of a plurality of power supply channels; instructions for causing the computer to generate the plurality of digital channel samples (where there is a multi-channel A/D converter (ADC) that performs analog to digital conversion prior to interpolation and samples both voltage and power from probes over multiple times (t0, t1, t2, etc.) ("plurality of digital channel samples") [0083 & Fig. 3]);
and instructions for causing the computer to multiplex the plurality of power supply channels from a plurality of electronic subsystems (where the system comprises a plurality of ADCs [0042]; where the plurality of ADCs unit (310 of Fig. 3) are demonstrated to behave as a multiplexor in Fig. 3 by selecting either current or voltage from the probes to be collected at a time (t0, t1, t2, etc.) [0083]).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the neural-network based fault prediction of Pattipati to incorporate the preprocessing step of performing analog-to-digital conversion as taught by Mosberger-Tang. The resulting combination allows for data to be sampled in analog format, and the particular ADC/multiplexor configuration of Mosberger-Tang prevents reduced sampling due to each conversion taking a certain amount of time by allowing channel selection by the ADC [Mosberger-Tang; 0083 also see Fig. 3].
ALLOWABLE SUBJECT MATTER
Claims 10 and 14 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is the Examiner’s statement of reasons for indicating allowable subject matter:
Regarding Claim 10, Pattipati discloses generating residuals to indicate faults [0128] and that the prediction may indicate a plurality of fault types (open circuit, short circuit…) [0095]. The prior art of record does not disclose, without impermissible hindsight reasoning, the plurality of power supply fault predictions includes at least one occurrence statistic of fault events in a power supply.
Regarding Claim 14, Mosberger-Tang discloses identifying the frequency of the reconstructed waveform [0083]. However, the prior art of record does not disclose, without impermissible hindsight reasoning, the reconstructed waveform includes an estimated peak amplitude level.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Wen et al. (U.S. Patent No. 12177349) discloses a system for identifying side channel attacks that exploit leakage, where data collected includes power supply noise and consumption and a neural network is employed to predict probability of leakage (failure).
You et al. (U.S. PGPub No. 20230094389) discloses a system employing a neural network to generate a prediction of a monitored system based on at least one obtained characteristic; where the applied system may be for fault detection in electrical power systems.
Gomez et al. (U.S. PGPub No. 20210026321) discloses a system for collecting, at least, voltage, in order to predict or anticipate failure events using a neural network. The system includes performing analog to digital conversion and use of weighted moving time windowing.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to AUDREY E WHITESELL whose telephone number is (703)756-4767. The examiner can normally be reached 8:30am - 5:00pm MST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Bryce Bonzo can be reached at 5712723655. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/A.E.W./Examiner, Art Unit 2113 /BRYCE P BONZO/Supervisory Patent Examiner, Art Unit 2113
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