DETAILED ACTION
This office action is in response to the filing with the office dated 08/07/2024
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). The certified copy has been filed in parent Application No. EP 23191260 filed on 14 Aug 2023.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 08/07/2024. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 11-14 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. Claim 11 recite “A method of diagnosing the electrical power supply circuit of claim 1, the method comprising: switching off the first semiconductor switch and the second semiconductor switch in a first power supply branch; switching on the first semiconductor switch and the second semiconductor switch in a second power supply branch; and measuring an electrical potential at the first end of the first resistor in the first power supply branch.” Furthermore, claims 12 and 13 cites “The method of claim 11,” while claim 14 cites “The method of claim 13.” Making the claims consistent with the process’s embodiment of claim language. Furthermore, the limitational use of the words “Method of” does not share the same characteristics of Independent claim 1 which states “An electrical power supply circuit comprising: at least two power supply branches, wherein each power supply branch includes: a first semiconductor switch configured to be electrically connected to a power source; a second semiconductor switch in series with the first semiconductor switch and electrically connected to a common output of the electrical power supply circuit; and a first resistor, wherein a first end of the first resistor is electrically connected to an electrical connection between the first semiconductor switch and the second semiconductor switch and a second end of the first resistor is configured to be electrically connected to a reference potential.” Making this more in line with manufacturer language.
Claims 11-14 are rejected under 35 U.S.C. § 101 as independent claim 11 recites a mental process, as the switching on and off while collecting data is merely a data gathering technique. Which is also a well-understood in the art to collect data.
The dependent claims 12 and 14 introduces the mathematical concept wherein the comparison to determine deviation and matching parameters i.e. as claim 12 mentions “diagnosing a failure in the first power supply branch if the measured electrical potential at the first end of the first resistor deviates from a first predetermined value by a first predetermined threshold and/or if the electrical potential at the first end of the first resistor matches a second predetermined value within a first predetermined tolerance.”
Claim 14 Also focuses on a mathematical concept as well but adds another aspect of outputting the outcome. As claim 14 states “and outputting a failure signal and/or setting a failure flag in response to diagnosing a failure.” This is a mere post solution activity that is disclosed with high level of generality. Thus does not amount to the level to integrate the abstract idea to a practical implementation.
Claim 13 states an extra solution activity as measuring is mere data collection that is done in well-understood techniques within the art. Claims 11-14 is not patent eligible because only one patent for one invention.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-14 are rejected under 35 U.S.C. 102(a)(1 ) as being anticipated by JACKSON et al. (Hereinafter, “Jackson”) in the Patent Application Publication Number US 20040051384 A1.
In regards to independent claim 1, Jackson teaches, “An electrical power supply circuit comprising: at least two power supply branches, ([Abstract], “plurality of power supplies.” Reads on “at least two power supply branches.”)
Wherein each power supply branch includes: a first semiconductor switch configured to be electrically connected to a power source; a second semiconductor switch in series with the first semiconductor switch and electrically connected to a common output of the electrical power supply circuit; ([0020], “It can be seen that first and second MOSFETs 16 and 18 are connected between the node A and the load.” Reads on, “semiconductor switch configured to be electrically connected to a power source.” Furthermore, ([0023],” channel B is identical to Channel A, and both channels output at a common output node 0.”)
and a first resistor, wherein a first end of the first resistor is electrically connected to an electrical connection between the first semiconductor switch and the second semiconductor switch and a second end of the first resistor is configured to be electrically connected to a reference potential.” ([0030], “comparable pair of resistors 72 and 74.” Reads on, “first resistor is electrically connected to an electrical connection between the first semiconductor switch and the second semiconductor switch” and “be electrically connected to a reference potential.”)
As per claim 2, Jackson teaches, “The electrical power supply circuit of claim 1 wherein each power supply branch further includes a second resistor with a first end being electrically connected to the electrical connection between the first semiconductor switch and the second semiconductor switch and a second end being electrically connected to the common output of the electrical power supply circuit in order to form a voltage divider with the first resistor.” ([0029], “voltage divider formed by a first resistor 56 which extends between the node 54 and the ground, and a second resistor 58 which extends between the node 54 and the node 28.” Reads on “second resistor” and “connection between the first semiconductor switch and the second semiconductor switch” furthermore, “connected to the common output” and “form a voltage divider with the first resistor.”)
As per claim 3, Jackson teaches, “The electrical power supply circuit of claim 1 wherein the first semiconductor switch and the second semiconductor switch are metal-oxide-semiconductor field-effect transistors (MOSFETs).” ([0020], “It can be seen that first and second MOSFETs 16 and 18 are connected between the node A and the load.” Reads on “(MOSFETS).”)
As per claim 4, Jackson teaches, “The electrical power supply circuit of claim 1 wherein the first semiconductor switch and/or the second semiconductor switch includes overcurrent protection.” ([0024],” The MOSFETs 16 and 18 of channel A are switched to a non-conducting state by the selection and hotswap controller 12 of channel A.”) Jackson further discloses, ([0029], “The controller 12 also has a window comparator 52.”)
As per claim 5, Jackson teaches, “The electrical power supply circuit of claim 2 further comprising a controller configured to: switch the first semiconductor switch and the second semiconductor switch; receive an electrical signal corresponding to an electrical potential at the first end of the first resistor; and/or receive an electrical signal corresponding to an electrical potential at the common output of the electrical power supply circuit.” ([0019], “Each selection and hotswap controller 12 and 14 is tasked with ensuring that the most appropriate power supply is connected to a load (not shown) at any given time via an output node O. In general, this means that the power supply with the most negative output voltage (that is the largest magnitude of output voltage) is connected to the load provided that the output voltage of the power supply falls within an acceptable range of voltages defined by window comparator within the selection and hotswap controllers 12 and 14.” Reads on “controller” and “receive an electrical signal corresponding to an electrical potential at the common output of the electrical power supply circuit.”)
As per claim 6, Jackson teaches, “The electrical power supply circuit of claim 5 further comprising a measurement unit configured to measure the electrical potential at the first end of the first resistor and/or the electrical potential at the common output of the electrical power supply circuit, wherein the measurement unit is electrically connected to the controller.” ([0030], “The comparator 70 receives a measurement of the voltage occurring at node 28 via the resistors 56 and 58 and also receives a measurement of the voltage occurring at node 28' via a comparable pair of resistors 72 and 74.” Reads on “Measurement unit” and “connected to the controller.”)
As per claim 7, Jackson teaches, “The electrical power supply circuit of claim 5 wherein the controller is configured to output a failure signal and/or to set a failure flag if the electrical potential at the first end of the first resistor deviates from a first predetermined value by a first predetermined amount and/or if the electrical potential at the common output of the electrical power supply circuit deviates from a second predetermined value by a second predetermined amount.” ([0019], “hotswap controller 12 and 14 is tasked with ensuring that the most appropriate power supply is connected to a load (not shown) at any given time via an output node O.” furthermore, ([0024]), “Consider a situation in which an acceptable voltage range spans from -32 to -76 volts, and in which supply A is at -50 volts and supply B is at -60 volts. Both supplies A and B are within an acceptable voltage window. In this situation supply B should be connected to the load and hence the MOSFET 16' and 18' are controlled by the selection and hotswap controller 14 of channel B to be in a conducting state.” Reads on “output a failure signal and/or to set a failure flag” and “deviates from a first predetermined value by a first predetermined amount and/or if the electrical potential at the common output.”)
As per claim 8, Jackson teaches, “The electrical power supply circuit of claim 1 wherein: the first semiconductor switch and the second semiconductor switch include a forward direction and an opposing reverse direction; and the forward direction of the first semiconductor switch is configured to be operated in the reverse direction and the second semiconductor switch is configured to be operated in the forward direction.” (0025), “if MOSFET 16' is switched off, conduction may occur via the internal source drain diode 30' which would become forward biased in these circumstances. However the inability to prevent conduction via the parasitic diode 30' (even though the transistor part of the MOSFET 16' is fully off) is not a problem as the selection and hotswap controller 14 operates to switch the MOSFET 18' fully off. There is no conduction from the load 0 to the node 28' since the parasitic source drain diode 32' is reverse biased under this condition, and also because of the voltage occurring at the node 28' would be equal to that of the supply voltage of channel B.” See figure 2. Reads on “first semiconductor switch is configured to be operated in the reverse direction and the second semiconductor switch is configured to be operated in the forward direction”
As per claim 9, Jackson teaches, “The electrical power supply circuit of claim 1 further comprising two power supply branches.” ([0018], “Nodes A and B represent connections to first and second power supplies.” Reads on “two power supply branches.”)
As per claim 10, Jackson teaches, “The electrical power supply circuit of claim 1 wherein the electrical power supply circuit is configured for an automotive application.” ([0028], “Furthermore, given that such equipment is primarily intended for the telecommunications market.” The telecommunications market is commonly used in automotive applications.)
As per claim 11, “A method of diagnosing the electrical power supply circuit of claim 1, the method comprising: switching off the first semiconductor switch and the second semiconductor switch in a first power supply branch; switching on the first semiconductor switch and the second semiconductor switch in a second power supply branch;” ([0030], “switching on and off of FETs to swap supplies.” Reads on switching off the first semiconductor switch and the second semiconductor switch in a first power supply branch.” See figure 3.)
“And measuring an electrical potential at the first end of the first resistor in the first power supply branch.” ([0030], “The comparator 70 receives a measurement of the voltage occurring at node 28 via the resistors 56 and 58 and also receives a measurement of the voltage occurring at node 28' via a comparable pair of resistors 72 and 74.” Reads on “measuring an electrical potential.”)
As per claim 12, Jackson teaches, “The method of claim 11, further comprising: diagnosing a failure in the first power supply branch if the measured electrical potential at the first end of the first resistor deviates from a first predetermined value by a first predetermined threshold and/or if the electrical potential at the first end of the first resistor matches a second predetermined value within a first predetermined tolerance;” ([0019], “hotswap controller 12 and 14 is tasked with ensuring that the most appropriate power supply is connected to a load (not shown) at any given time via an output node O.” furthermore, ([0024]), “Consider a situation in which an acceptable voltage range spans from -32 to -76 volts, and in which supply A is at -50 volts and supply B is at -60 volts. Both supplies A and B are within an acceptable voltage window. In this situation supply B should be connected to the load and hence the MOSFET 16' and 18' are controlled by the selection and hotswap controller 14 of channel B to be in a conducting state.”
“And switching off all semiconductor switches in response to diagnosing a failure in the first power supply branch.” ([0030], “switching on and off of FETs to swap supplies.” Reads on “switching off all semiconductor switches in response to diagnosing a failure in the first power supply branch.”)
As per claim 13, Jackson teaches “The method of claim 11 further: measuring an electrical potential at the common output of the electrical power supply circuit.” ([0023], “Channel B is identical to Channel A, and both channels output at a common output node 0.” Furthermore, ([0030], “The selection and hotswap controller 12 also includes a comparator 70 for selecting whether channel A or channel B is to supply power to the load. Only one of the controllers 12 and 14 can act as the master, and in the arrangement shown in FIG. 3 controller 12 is arranged to act as the master controller. The comparator 70 receives a measurement of the voltage occurring at node 28 via the resistors 56 and 58 and also receives a measurement of the voltage occurring at node 28' via a comparable pair of resistors 72 and 74. ” Reads on, “measuring an electrical potential at the common output of the electrical power supply circuit.”)
As per claim 14, “The method of claim 13 further comprising: diagnosing a failure in the second power supply branch if the measured electrical potential at the common output of the electrical power supply circuit deviates from a third predetermined value by a second predetermined threshold and/or if the electrical potential at the common output of the electrical power supply circuit matches a fourth predetermined value within a second predetermined tolerance; and outputting a failure signal and/or setting a failure flag in response to diagnosing a failure in the second power supply branch.” (0024) “Consider a situation in which an acceptable voltage range spans from -32 to -76 volts, and in which supply A is at -50 volts and supply B is at -60 volts. Both supplies A and B are within an acceptable voltage window. In this situation supply B should be connected to the load and hence the MOSFET 16' and 18' are controlled by the selection and hotswap controller 14 of channel B to be in a conducting state.”
Furthermore, “allowing the voltage from channel A to be supplied to the load. Simultaneously, the MOSFET 16' and 18' of channel B would be switched off. This causes the -50 volts from power supply A to be seen both at the load, and at the node 28' of channel B (less one diode drop voltage) by virtue of the parasitic diode 3.”
Moreover, ([0025], “A different situation arises when one of the channels becomes faulty in such a way that its output voltage drops dramatically. If we assume that initially channel A is at -50 volts and channel B is at -60 volts, then as described herein above the selection and hotswap controllers 12 and 14 operate in unison in order to ensure the channel A is deselected and channel B is selected. However, if channel B now drops to -100 volts, it becomes excessively negative and hence must be disconnected from the load.” Reads on “diagnosing a failure in the second power supply branch if the measured electrical potential at the common output.”)
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Jackson ‘384 in view of WIRTZBERGER et al. (Hereinafter, “Wirtzberger”) in the Patent Application Publication Number US 20080062730 A1.
In regards to independent claim 15, Jackson is silent on, “A non-transitory computer-readable medium comprising instructions including: switching off a first semiconductor switch and a second semiconductor switch in a first power supply branch;”
Wirtzberger teaches, “A non-transitory computer-readable medium comprising instructions including: switching off a first semiconductor switch and a second semiconductor switch in a first power supply branch;” ([0021], “a circuit may include a software controlled microprocessor, discrete logic such as an application specific integrated circuit (ASIC), or other programmed logic device. A circuit may also be fully embodied as software. As used herein, "circuit" is considered synonymous with "logic." Furthermore, [0035], “power distribution circuit” reads on “A non-transitory computer-readable medium.” And “switching off a first semiconductor switch and a second semiconductor switch.”)
Wirtzberger is silent on, “Switching on the first semiconductor switch and the second semiconductor switch in a second power supply branch;”
Jackson teaches, ([0030], “Switching on the first semiconductor switch and the second semiconductor switch in a second power supply branch;” “The hysteresis also ensures that changes in the voltage midpoints (eg at nodes 28 and 28') due to switching on and off of FETs to swap supplies does not prompt the system to switch back again or to enter an unstable state.” Reads on “Switching on the first semiconductor switch and the second semiconductor switch in a second power supply.”)
“and measuring an electrical potential at a first end of a first resistor in the first power supply branch.” ([0023], “Channel B is identical to Channel A, and both channels output at a common output node 0.” Furthermore, ([0030], “The selection and hotswap controller 12 also includes a comparator 70 for selecting whether channel A or channel B is to supply power to the load. Only one of the controllers 12 and 14 can act as the master, and in the arrangement shown in FIG. 3 controller 12 is arranged to act as the master controller. The comparator 70 receives a measurement of the voltage occurring at node 28 via the resistors 56 and 58 and also receives a measurement of the voltage occurring at node 28' via a comparable pair of resistors 72 and 74.” Reads on, “measuring an electrical potential at the common output of the electrical power supply circuit.”)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention. To modify Jackson by incorporating Wirtzberger, which teaches a power distribution circuit. Further improving the switching mechanism to be automated by unitizing the computerization parameters ensuring a continual supply of power if one of the power supply branches were to fail. This is well-known, providing expected results as is widely used in the industry (KSR)
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Reiter et al (US 20140049866 A1) teaches, A description is given of a method for the pulsed control of a transistor which has a control terminal and a load path. The load path of the transistor is connected in series with a load. A control circuit is provided for a transistor. In the method, the transistor is controlled with a control pulse of a first type, which has a first control level at least for a first time duration, before a control pulse of a second type, which has a second control level, which is higher in comparison with the first control level. A voltage across the load path of the transistor is evaluated and the pulsed control is terminated if the voltage across the load path exceeds a predefined threshold value.
Sazinger et al (DE 102019108302 A1) teaches, The invention relates to a method for operating an electronic circuit arrangement (1) for electrical current limitation in a potentially explosive area, which comprises at least one electrical consumer (20) which is supplied with electrical energy from an electrical voltage source (3), via an electrical supply line (2), is preferably supplied from a rechargeable electric battery (6). According to the method, at least one of at least two semiconductor switches (4a, 4b, 4c) present in the electrical supply line (2) is switched over to an open state, so that the electrical supply line (2) is interrupted when the sum of the semiconductor switches falling electrical voltage (V) exceeds a predetermined voltage threshold value (Vs). According to the invention, the open state of the at least one semiconductor switch (4a, 4b, 4c) is maintained after falling below the voltage threshold value (Vs) until the comparator circuit (7a, 7b, 7c) is reset.
Wang et al (US 11070197 B1) teaches, Methods, apparatus, systems and articles of manufacture are described for transistor health monitoring. An example gate driver includes a request receiver pin, a measurement transmitter pin, and a driver control logic pin, the request receiver pin, the measurement transmitter pin, and the driver control logic pin configured to be coupled to a controller, a sensing pin, the sensing pin to be coupled to a sensing circuit, a control logic circuit having an input coupled to the request receiver pin, a transistor coupled to the control logic circuit and the sensing pin, a multiplexer coupled to the control logic circuit and the sensing pin, an analog-to-digital converter (ADC) coupled to the multiplexer and the measurement transmitter pin, and a driver control logic circuit coupled to the driver control logic pin.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JARELL W PAXTON whose telephone number is (571)272-0521. The examiner can normally be reached Monday-Friday 8:00 am - 5:00 pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eman Alkafawi can be reached at (571)272-4448. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JARELL W PAXTON/Examiner, Art Unit 2858
/EMAN A ALKAFAWI/Supervisory Patent Examiner, Art Unit 2858 4/1/2026
