DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 2, 11-13, and 21 is/are rejected under 35 U.S.C. 102a1 as being anticipated by Chae et al (US Pat. Pub. 2005/0270848; hereinafter referred to as Chae).
As per claims 2, 13, 21:
Chae teaches a memory system, medium, and method, comprising:
one or more memory arrays (Fig. 2, 110); and
processing circuitry coupled with the one or more memory arrays (see Fig. 2) and configured to cause the memory system to:
generate a first voltage for writing data to one or more blocks of memory cells of the one or more memory arrays (Fig. 2, 200; Fig. 4, Vpgm);
determine whether the first voltage satisfies a threshold tolerance associated with a second voltage comprising a reference voltage (Fig. 4, 230 Vref) based at least in part on comparing the first voltage to the second voltage (Fig. 4, 240); and
generate, based at least in part on determining that the first voltage does not satisfy the threshold tolerance associated with the second voltage (paragraph 40), signaling indicating one or more errors associated with writing the data to the one or more blocks of memory cells (Fig. 2, 150 PF).
As per claim 11:
Chae teaches the memory system of claim 2, wherein the processing circuitry is further configured to cause the memory system to: receive a write command for writing the data to one or more blocks of memory cells, wherein generating the first voltage is based at least in part on receiving the write command (paragraph 32: “The control logic 160 activates the word line voltage generator circuit 200 in response to a command informing about a program cycle”).
As per claim 12:
Chae teaches the memory system of claim 2, wherein the processing circuitry is further configured to cause the memory system to:
generate a third voltage for writing second data to the one or more memory arrays (Fig. 2, 200 and Fig. 4, Vpgm for subsequent program operations according to the loop counter 170);
determine whether the third voltage satisfies a second threshold tolerance associated with a fourth voltage comprising a second reference voltage (Fig. 4, 230 Vref) based at least in part on comparing the third voltage to the fourth voltage (Fig. 4, 240); and
refrain from generating the signaling based at least in part on determining that the third voltage satisfies the second threshold tolerance (paragraph 40 end: “When the clock enable signal CLK_EN is inactivated low, the oscillation signal OSC is blocked so that the clock signal CLK is not toggled. This means that charge pump 210 does not operate.”).
Allowable Subject Matter
Claims 3-10 and 14-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: None of the prior art of record teach or fairly suggest: writing the data to the one or more blocks of memory cells based at least in part on generating the first voltage; pausing one or more ongoing operations of the memory system based at least in part on generating the signaling; and decoding the data written to the one or more blocks of memory cells based at least in part on pausing the one or more ongoing operations; as recited in claims 3 and 14, particularly in combination with each and every limitation of the respective parent claim.
Claims 4-10 and 15-20 depend from claims 3 or 14, and are allowable for at least these reasons.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The prior art are generally directed to comparing a program voltage with a reference for controlling a charge pump in memory.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to STEVE N NGUYEN whose telephone number is (571)272-7214. The examiner can normally be reached M-F 9-5.
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/STEVE N NGUYEN/Primary Examiner, Art Unit 2111