Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 5/22/2026 has been entered.
Response to Arguments
Applicant’s arguments have been considered but are moot in view of new grounds of rejections.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 4, 8 are rejected under 35 U.S.C. 103 as being unpatentable over US 20030194145 A1-Chiba et al (Hereinafter referred to as “Chiba”), in view of US 20090232225 A1-Yang et al (Hereinafter referred to as “Yang”).
Regarding claim 1, Chiba discloses an encoder,(fig. 1) comprising:
a quantization circuit (Fig. 1, element 4), configured to perform a quantization operation on multiple blocks of current frame data in sequence, to generate multiple quantized data respectively corresponding to the multiple blocks ([0016], quantized multiple coefficients);
a quantized data adjustment circuit ([0019], adjusting section), wherein for each of the multiple blocks in the current frame data, the quantized data adjustment circuit adjusts multiple coefficients in the quantized data corresponding to the block according to an optimization level of the block, to generate adjusted quantized data ([0044], wherein adjusting quantization coefficients of the multiple blocks in accordance with a degree of appearance of valid coefficients. The degree of appearance of valid coefficients are interpreted as an optimization level); and
an encoding circuit (Fig. 1), configured to encode the adjusted quantized data of each of the multiple blocks to generate encoded data ([0044], encoding the adjusted quantized coefficients).
an optimization level calculation circuit, wherein for a current ([0049], wherin block that has not been encoded by the encoding circuit, the optimization level calculation circuit refers to encoding information of at least one block that has been encoded to determine the optimization level of the current block( [0049], wherein perform the encoding processes can be vastly reduced, while grasping features of the source image at the same time. Further, the number of sub-areas on which the encoding process is to be performed is also reduced, thereby reducing a capacity of a memory required to retain the result of counting the number of valid coefficients of each sub-area, which contributes to saving memory. This is interpreted as optimization); wherein the encoding information of the at least one block that has been encoded comprises an optimization level ([0049], wherein perform the encoding processes can be vastly reduced, while grasping features of the source image at the same time. Further, the number of sub-areas on which the encoding process is to be performed is also reduced, thereby reducing a capacity of a memory required to retain the result of counting the number of valid coefficients of each sub-area, which contributes to saving memory. This is interpreted as optimization) and a bit number of the encoded data corresponding to the at least one block ([0087], bit number).
Yang further discloses wherein the encoding information of the at least one block that has been encoded comprises an optimization level and a bit number of the encoded data corresponding to the at least one block ([0059])
Therefore, it would have been obvious to one of ordinary skilled in the art before the effective filing date of the claimed invention to modify the encoder disclosed by Chiba to disclose wherein the encoding information of the at least one block that has been encoded comprises an optimization level and a bit number of the encoded data corresponding to the at least one block as taught by Yang, to improve optimization performance ([0039], Yang).
Regarding claim 4, Yang discloses the encoder of claim 1 (See claim 1),
wherein the optimization level calculation circuit calculates a predicted bit number of encoded data of the current block according to the bit number of the encoded data of the at least one block that has been encoded ([0059]); and the optimization level calculation circuit determines the optimization level of the current block according to the predicted bit number of the encoded data of the current block, a target bit number of the current block, a total number of bits that can be lent, and the optimization level of the at least one block ([0059]).
Regarding claim 8, Yang discloses the encoder of claim 1 (See claim 1),
Further comprising a quantization parameter calculation circuit (Fig. 3), configured to determine a quantization parameter of the current frame data according to a target bit number of the current frame data ([0059], wherein determining the appropriate QP based on the target bit) and encoding and/or quantization information of previous frame data (Fig 3), for the quantization circuit to perform the quantization operation on the multiple blocks of the current frame data in sequence ([0071], quantization).
Allowable Subject Matter
Claims 5-7, 9-12, 14-16 allowed.
Conclusion
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LERON . BECK
Examiner
Art Unit 2487
/LERON BECK/Primary Examiner, Art Unit 2487
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