Prosecution Insights
Last updated: April 19, 2026
Application No. 18/798,037

ADDITIONAL COMPRESSION FOR EXISTING COMPRESSED DATA

Non-Final OA §DP
Filed
Aug 08, 2024
Examiner
JEANGLAUDE, JEAN BRUNER
Art Unit
2845
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Netapp Inc.
OA Round
1 (Non-Final)
94%
Grant Probability
Favorable
1-2
OA Rounds
1y 9m
To Grant
99%
With Interview

Examiner Intelligence

Grants 94% — above average
94%
Career Allow Rate
1087 granted / 1160 resolved
+25.7% vs TC avg
Moderate +6% lift
Without
With
+5.6%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 9m
Avg Prosecution
19 currently pending
Career history
1179
Total Applications
across all art units

Statute-Specific Performance

§101
7.8%
-32.2% vs TC avg
§103
28.4%
-11.6% vs TC avg
§102
35.2%
-4.8% vs TC avg
§112
9.6%
-30.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1160 resolved cases

Office Action

§DP
Detailed Office Action Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1- 20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1 – 20 of U.S. Patent No. 12,088,327. US Application Number 18/798,037 US Patent Number 12,088,327 (Claim 1) A method comprising: receiving a request to access a data block stored in a storage; reading format information stored within the data block to determine whether the data block is compressed according to a heavier-weight compression process or lighter- weight compression process; and in response to the data block being compressed according to the lighter-weight compression process, decompressing the data block using the lighter-weight compression process to form a decompressed data block, compressing the decompressed data block using the heavier-weight compression process, and providing access to the data block compressed using the heavier-weight compression process. (Claim 1) A method comprising: receiving a request to access a data block stored in a storage; reading format information stored within the data block to determine whether the data block is compressed according to a first compression process or a second compression process; and in response to the data block being compressed according to the second compression process, decompressing the data block using the second compression process to form a decompressed data block, compressing the decompressed data block using the first compression process, and providing access to the data block compressed using the first compression process. (Claim 2) The method of claim 1, further comprising sending the data block compressed using the heavier-weight compression process to a sender of the request. (Claim 2) The method of claim 1, further comprising sending the data block compressed using the first compression process to a sender of the request. (Claim 3) The method of claim 1, further comprising retaining deduplication of the data block. (Claim 3) The method of claim 1, further comprising retaining deduplication of the data block. (Claim 4) The method of claim 1, wherein the data block was compressed by an application using the lighter-weight compression process. (Claim 4) The method of claim 1, wherein the data block was compressed by an application using the first compression process. (Claim 5) The method of claim 4, wherein the data block was compressed by the application at a file layer using the lighter-weight compression process, the lighter- weight compression process using a user file layer compression format. (Claim 5) The method of claim 4, wherein the data block was compressed by the application at a file layer using the first compression process, the first compression process using a user file layer compression format. (Claim 6) The method of claim 1, wherein the data block was decompressed by a storage node at a container file layer using heavier-weight compression process, heavier-weigh compression process using a container file layer compression format. (Claim 6) The method of claim 1, wherein the data block was decompressed by a storage node at a container file layer using the second compression process, the second compression process using a container file layer compression format. (Claim 7) The method of claim 1, wherein the lighter-weight compression process uses a first chunk size and the heavier-weight compression process uses a second chunk size, the second chunk size being larger than the first chunk size. (Claim 7) The method of claim 1, wherein the first compression process uses a first chunk size and the second compression process uses a second chunk size, the second chunk size being larger than the first chunk size. (Claim 8) An apparatus comprising: a memory comprising instructions; and processor circuitry coupled to the memory, the processor circuitry to execute the instructions to cause the processor circuitry to :receive a request to access a data block stored in a storage; read format information stored within the data block to determine whether the data block is compressed according to a heavier-weight compression process or a lighter-weight compression process; and in response to the data block being compressed according to the lighter- weight compression process, decompress the data block using the lighter-weight compression process to form a decompressed data block, compress the decompressed data block using the heavier-weight compression process, and provide access to the data block compressed using the heavier-weight compression process. (Claim 8) An apparatus comprising: a memory comprising instructions; and processor circuitry coupled to the memory, the processor circuitry to execute the instructions to cause the processor circuitry to: receive a request to access a data block stored in a storage; read format information stored within the data block to determine whether the data block is compressed according to a first compression process or a second compression process; and in response to the data block being compressed according to the second compression process, decompress the data block using the second compression process to form a decompressed data block, compress the decompressed data block using the first compression process, and provide access to the data block compressed using the first compression process. (Claim 9) The apparatus of claim 8, further comprising the processor circuitry to execute the instructions to send the data block compressed using the heavier-weight compression process to a sender of the request. (Claim 9) The apparatus of claim 8, further comprising the processor circuitry to execute the instructions to send the data block compressed using the first compression process to a sender of the request. (Claim 10) The apparatus of claim 8, further comprising retaining deduplication of the data block. (Claim 10) The apparatus of claim 8, further comprising retaining deduplication of the data block. (Claim 11) The apparatus of claim 8, wherein the data block was compressed by an application using the lighter-weight compression process. (Claim 11) The apparatus of claim 8, wherein the data block was compressed by an application using the first compression process. (Claim 12) The apparatus of claim 8, wherein the data block was compressed by an application using the lighter-weight compression process. (Claim 12) The apparatus of claim 11, wherein the data block was compressed by the application at a file layer using the first compression process, the first compression process using a user file layer compression format. (Claim 13) The apparatus of claim 8, wherein the data block was decompressed by the processor circuitry in a storage node at a container file layer using the heavier- weight compression process, the heavier-weight compression process using a container file layer compression format. (Claim 13) The apparatus of claim 8, wherein the data block was decompressed by the processor circuitry in a storage node at a container file layer using the second compression process, the second compression process using a container file layer compression format. (Claim 14) The apparatus of claim 8, wherein the lighter-weight compression process uses a first chunk size and the heavier-weight compression process uses a second chunk size, the second chunk size being larger than the first chunk size. (Claim 14) The apparatus of claim 8, wherein the first compression process uses a first chunk size and the second compression process uses a second chunk size, the second chunk size being larger than the first chunk size. (Claim 15) At least one tangible machine-readable storage medium comprising instructions which, when executed by processor circuitry, cause the processor circuitry to: receive a request to access a data block stored in a storage; read format information stored within the data block to determine whether the data block is compressed according to a heavier-weight compression process or a lighter-weight compression process; and in response to the data block being compressed according to the lighter-weight compression process, decompress the data block using the lighter-weight compression process to form a decompressed data block, compress the decompressed data block using the heavier-weight compression process, and provide access to the data block compressed using the heavier-weight compression process. (Claim 15) At least one tangible machine-readable storage medium comprising instructions which, when executed by processor circuitry, cause the processor circuitry to: receive a request to access a data block stored in a storage; read format information stored within the data block to determine whether the data block is compressed according to a first compression process or a second compression process; and in response to the data block being compressed according to the second compression process, decompress the data block using the second compression process to form a decompressed data block, compress the decompressed data block using the first compression process, and provide access to the data block compressed using the first compression process. (Claim 16) The at least one tangible machine-readable storage medium of claim 15, comprising the processor circuitry to execute the instructions to send the data block compressed using the heavier-weight compression process to a sender of the request. (Claim 16) The at least one tangible machine-readable storage medium of claim 15, comprising the processor circuitry to execute the instructions to send the data block compressed using the first compression process to a sender of the request. (Claim 17) The at least one tangible machine-readable storage medium of claim 15, comprising retaining deduplication of the data block. (Claim 17) The at least one tangible machine-readable storage medium of claim 15, comprising retaining deduplication of the data block. (Claim 18) The at least one tangible machine-readable storage medium of claim 15, wherein the data block was compressed by an application using the lighter-weight compression process. (Claim 18) The at least one tangible machine-readable storage medium of claim 15, wherein the data block was compressed by an application using the first compression process. (Claim 19) The at least one tangible machine-readable storage medium of claim 18, wherein the data block was compressed by the application at a file layer using the lighter-weight compression process, the lighter-weight compression process using a user file layer compression format. (Claim 19) The at least one tangible machine-readable storage medium of claim 18, wherein the data block was compressed by the application at a file layer using the first compression process, the first compression process using a user file layer compression format. (Claim 20) The at least one tangible machine-readable storage medium of claim 15, comprising the processor circuitry to execute the instructions to decompress the data block at a container file layer using the heavier-weight compression process, the heavier-weight compression process using a container file layer compression format. (Claim 20) The at least one tangible machine-readable storage medium of claim 35, comprising the processor circuitry to execute the instructions to decompress the data block at a container file layer using the second compression process, the second compression process using a container file layer compression format. Although the claims at issue are not identical, they are not patentably distinct from each other because the claims of the issued patents make obvious the claims of the pending application in that the limitations claimed in the pending application are found in the issued patents even though they are not necessarily presented in the same order as those in the issued patents. “A later patent claim is not patentably distinct from an earlier patent claim if the later claim is obvious over, or anticipated by, the earlier claim. In re Longi, 759 F.2d at 896, 225 USPQ at 651 (affirming a holding of obviousness-type double patenting because the claims at issue were obvious over claims in four prior art patents); In re Berg, 140 F.3d at 1437, 46 USPQ2d at 1233 (Fed. Cir. 1998) (affirming a holding of obviousness-type double patenting where a patent application claim to a genus is anticipated by a patent claim to a species within that genus). “ELI LILLY AND COMPANY v BARR LABORATORIES, INC., United States Court of Appeals for the Federal Circuit, ON PETITION FOR REHEARING EN BANC (DECIDED: May 30, 2001). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JEAN BRUNER JEANGLAUDE whose telephone number is (571)272-1804. The examiner can normally be reached Monday-Thursday 7:00 AM-5:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dameon Levi can be reached at 571-272-2105. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JEAN B JEANGLAUDE/Primary Examiner, Art Unit 2845
Read full office action

Prosecution Timeline

Aug 08, 2024
Application Filed
Nov 01, 2024
Response after Non-Final Action
Mar 03, 2026
Non-Final Rejection — §DP (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12592718
SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTER AND METHOD FOR CONVERTING AN ANALOG INPUT SIGNAL TO A DIGITAL OUTPUT SIGNAL AT A SAMPLING FREQUENCY
2y 5m to grant Granted Mar 31, 2026
Patent 12587174
CONVERTING A DIGITAL SIGNAL FROM A FIRST SAMPLING RATE TO A SECOND SAMPLING RATE
2y 5m to grant Granted Mar 24, 2026
Patent 12587210
METHODS, SYSTEMS, AND APPARATUSES FOR REDUCING DC BIAS
2y 5m to grant Granted Mar 24, 2026
Patent 12587209
Intermediate Frequency Digital-to-Analog Conversion (IFDAC) System
2y 5m to grant Granted Mar 24, 2026
Patent 12580585
Lossless Binary Data Compression
2y 5m to grant Granted Mar 17, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

AI Strategy Recommendation

Get an AI-powered prosecution strategy using examiner precedents, rejection analysis, and claim mapping.
Powered by AI — typically takes 5-10 seconds

Prosecution Projections

1-2
Expected OA Rounds
94%
Grant Probability
99%
With Interview (+5.6%)
1y 9m
Median Time to Grant
Low
PTA Risk
Based on 1160 resolved cases by this examiner. Grant probability derived from career allow rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month