Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This office action is responsive to the amendment and terminal disclaimer filed 7/30/26. The terminal disclaimer is approved.
Information Disclosure Statement
The IDS filed 8/31/26 has been considered by the examiner.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1-2, 5-7, 10-12, 15-17, and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Khoshnevisan et al., US 2023/0208598, (“Khoshnevisan”), in view of Cirik et al., US 2022/0030521, (“Cirik”), or alternatively in view of Ling et al., US 2023/0041109, (“Ling”).
Independent Claims
Regarding claim 1, Khoshnevisan teaches “A method comprising:
receiving, by a wireless device via at least one of a first control resource set (CORESET) with a first CORESET pool index or a second CORESET with a second CORESET pool index, downlink control information (DCI) scheduling a downlink signal and comprising a transmission configuration indicator (TCI) field (paragraph no. 0067, “As shown in FIG. 5 , at 506, the UE 502 receives a configuration (e.g., a PDCCH-config RRC parameter) with the index values (e.g., CORESETPoolIndex values) from the TRP 1 504 (or TRP 2 or both). At 508, the UE 502 receives a DCI (at t1) from the BS 504 scheduling a PDSCH (at t2). The DCI may indicate a TCI state for the scheduled PDSCH. The DCI may be received in a CORESET associated with one of the CORESETPoolIndex values (e.g., 0 in the example in FIG. 5). Thus, the UE knows the CORESET and CORESETPoolIndex value associated with the DCI”); and
receiving the downlink signal based on a TCI state, among one or more TCI states activated for a default CORESET pool index that is selected based on the first CORESET pool index and the second CORESET pool index being different, indicated by the TCI field” (paragraph no. 0065, “For example, the UE may receive a configuration of index values. A medium access control (MAC) control element (CE) may activate a set of TCI states (e.g., up to 8 TCI states) and map the set of activate TCI states to TCI codepoints in DCI. Each codepoint is mapped to a single TCI state. For example, 8 TCI states may be mapped to 8 TCI codepoints. The MAC-CE may also indicate a control resource set (CORESET) pool index value (e.g., CORESETPoolIndex value) associated with the active set of TCI states and the mapping”; see also, paragraph no. 0067, supra; the indicated CORESETPoolIndex value appears to implicitly teach a “default CORESET pool index” since CORESET pool index values of 0 and 1 are disclosed – however, see below for an explicit teaching of a “default CORESET pool index”).
Regarding claim 1, Cirik explicitly teaches “a default CORESET pool index that is selected based on the first CORESET pool index and the second CORESET pool index being different” (see paragraph nos. 0255, 0262 and in particular, 0255, “The one or more configuration parameters 1920 might omit a coreset pool index for a coreset of the plurality of coresets. The wireless device 1911 may determine a default value for the coreset pool index of the coreset, for example, based on the one or more configuration parameters 1920 omitting the coreset pool index for the coreset. The default value may be equal to zero (CoresetPoolIndex=0). The default value may be equal to the first coreset pool index (e.g., zero). The first coreset pool may comprise the coreset based on the default value for the coreset pool index of the coreset being equal to the first coreset pool index. The default value may be equal to one (CoresetPoolIndex=1)”).
It would have been obvious to one of ordinary skill in the art before the effective filing date of this claimed invention to modify Khoshnevisan by incorporating the teachings of Cirik to enable the UE to use a default Coreset pool index value when the received configuration parameters omit a coreset pool index for a coreset of a plurality of coresets, as suggested by Cirik in paragraph no. 0255.
As an alternative grounds of rejection, regarding claim 1, Ling explicitly teaches “a default CORESET pool index that is selected based on the first CORESET pool index and the second CORESET pool index being different” (see paragraph nos. 0045, 0046). It would have been obvious to one of ordinary skill in the art before the effective filing date of this claimed invention to modify Khoshnevisan by incorporating the teachings of Ling to enable the UE to use a default Coreset pool index value when a coreset may not be configured with a coreset pool index value, as suggested by Ling in paragraph no. 0046.
Regarding independent claims 6, 11, and 16, these independent claims are corresponding apparatus (i.e., wireless device), base station method and base station claims of the method claim 1 and recite similar subject matter. As such, the rationale behind the above rejection of claim 1 applies with equal force to these independent claims and as further amplified below to highlight the minor differences between the claims.
Regarding further independent claim 6, see Khoshnevisan, Fig. 2, UE 120a for the claimed structural elements of the claim.
Regarding further independent claim 16, see Khoshnevisan, Fig. 2, base station 110a for the claimed structural elements of the claim.
Dependent Claims
Regarding claims 2, 7, 12, and 17, Khoshnevisan does not teach but Ling teaches “wherein the default CORESET pool index is:
a lowest CORESET pool index among the first CORESET pool index and the second CORESET pool index (paragraph no. 0046 discloses a CORESET pool index 0),
a highest CORESET pool index among the first CORESET pool index and the second CORESET pool index,
a preconfigured value among the first CORESET pool index and the second CORESET pool index, or
indicated in the DCI.”
It would have been obvious to one of ordinary skill in the art before the effective filing date of this claimed invention to modify Khoshnevisan and Ling by incorporating the additional teachings of Ling to enable the UE to use a default Coreset pool index value (e.g., 0) when a coreset may not be configured with a coreset pool index value, as suggested by Ling in paragraph no. 0046.
Regarding claims 5, 10, 15, and 20, Khoshnevisan does not teach but Ling teaches “selecting, based on the first CORESET and the second CORESET being linked, the default CORESET pool index among the first CORESET pool index and the second CORESET pool index” (paragraph no. 0044 discloses CORESET #A and CORESET #B which are “linked” as that term is construed under BRI; see paragraph no. 0046 for the selecting of a default CORESET pool index such as 0).
It would have been obvious to one of ordinary skill in the art before the effective filing date of this claimed invention to modify Khoshnevisan and Ling by incorporating the additional teachings of Ling to enable the UE to use a default Coreset pool index value (e.g., 0) when a coreset may not be configured with a coreset pool index value, as suggested by Ling in paragraph no. 0046.
Claim(s) 4, 9, 14, and 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Khoshnevisan and Cirik or alternatively, Ling, as applied to claims 1, 6, 11, and 16 above, and further in view of Yoshioka et al., US 2022/0353710, (“Yoshioka”).
Khoshnevisan does not teach but Yoshioka teaches “wherein the receiving the downlink signal based on the TCI state comprises receiving the downlink signal based on at least one demodulation reference signal (DMRS) port of the downlink signal being quasi co-located with a reference signal associated with the TCI state” (paragraph no. 0188).
It would have been obvious to one of ordinary skill in the art before the effective filing date of this claimed invention to modify Khoshnevisan and Cirik or alternatively, Ling by incorporating the teachings of Yoshioka to facilitate the receiving of downlink reference signals such as CSI-RS for obtaining channel state information of the link between the base station and the UE.
Allowable Subject Matter
Claims 3, 8, 13, and 18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claims 3, 8, 13, and 18, the prior art of record does not teach or fairly suggest the claim limitations “wherein the receiving the DCI comprises receiving repetitions of the DCI, wherein the default CORESET pool index is a CORESET pool index of a CORESET, among the first CORESET and the second CORESET, via which a last repetition of the DCI is received” as recited in claim 3 and similarly recited in claims 8, 13, and 18.
Conclusion
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/WON TAE C KIM/Primary Examiner, Art Unit 2414