DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 3-4 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 3 recites “a resistor and a capacitor connected in parallel between a negative input terminal of the second input amplifier and an output terminal of the second input amplifier” in lines 6-8. It is unclear “a resistor and a capacitor” is the same as “a resistor and a capacitor connected in parallel” recited in the same claim line 3.
Claim 4 recites “a resistor connected between an output terminal of the second input amplifier and a negative input terminal” in lines 5-6, “a resistor connected between the positive input terminal of the output amplifier and a negative output terminal” in lines 8-9, “a resistor connected between the negative input terminal of the output amplifier and a positive output terminal” in lines 11-12. It is unclear “a resistor” is the same as “a resistor” recited in the same claim line 3.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 1 is rejected under 35 U.S.C. 103 as being unpatentable over Romero et al. (US 2019/0079143 and Romero hereinafter) in view of Kusuda (US 11,139,789)
Regarding claim 1, Romero discloses an instrumentation amplifier [100/100’, figs. 1 and 3] comprising: an input chopping circuit [106, fig. 1] configured to convert differential input voltages [104a/104b, fig. 1] into differential chopping input voltages [107a/107b, fig. 1] according to a chopping signal [fchop, fig. 1]; a compensation voltage input circuit [152] configured to generate compensation voltages [152a] according to compensation signals [150a]; an amplifier circuit [114, fig. 1] configured to generate differential output voltages [128, fig. 1] from the differential chopping input voltages and the compensation voltages; a modulation circuit [132, fig. 1] configured to modulate the differential output voltages; an output chopping circuit [134. Fig. 3] configured to generate a bitstream signal [134a, fig. 3] by converting phase of an output of the modulation circuit [output 132, fig. 3] according to the chopping signal; and a filter circuit [138a, fig. 3] configured to filter the bitstream signal. Romero does not explicitly disclose a compensation voltage input circuit configured to generate differential compensation voltages according to differential compensation signals; a compensation chopping circuit configured to generated signals by performing chopping operation on the differential compensation voltages according to the chopping signal and to provide the signals to the compensation voltage input circuit
However, Kusuda disclose a compensation voltage input circuit [25, fig. 2A, cl. 8, ln. 11-18] configured to generate differential compensation voltages [output 25] according to differential compensation signals [differential output signal of 13]; a compensation chopping circuit [16] configured to generated signals by performing chopping operation on the differential compensation voltages according to chopping signal [signal from 1 to 13] and to provide the signals to the compensation voltage input circuit. It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the apparatus of Romero by incorporating the compensation circuit as taught in Kusuda in order to inject the input offset compensation signal for the purpose of suppressing output chopping ripple.
Allowable Subject Matter
Claims 2 and 5-8 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 3-4 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 2, Romero in view of Kusuda further discloses wherein the amplifier circuit includes: a first input amplifier [116] configured to receive a positive input voltage [109a] among the differential chopping input voltages, but silent with respect to the above structure in combination with a positive compensation voltage among the differential compensation voltages via two positive input terminals; a second input amplifier configured to receive a negative input voltage among the differential chopping input voltages and a negative compensation voltage among the differential compensation voltages via two positive input terminals; and an output amplifier configured to generate the differential output voltages. This combination has been found to be non-obvious, thus allowed.
Regarding claim 5, Romero in view of Kusuda further discloses wherein the filter circuit [138] generates an output [138a], but silent with respect to the above structure in combination with filter circuit generates an average of a first value and a second value as an output thereof, and wherein the first value corresponds to an output of the filter circuit during a first operation performed when the chopping signal has a high level and the second value corresponds to an output of the filter circuit during a second operation performed when the chopping signal has a low level. This combination has been found to be non-obvious, thus allowed.
Conclusion
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/METASEBIA T RETEBO/Primary Examiner, Art Unit 2836
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