DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
Information disclosure statement filed 11/14/2024 has been considered.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 4-5, 11, 14, 17, 19-20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US Patent Application Publication No. US 2017/0199328 A1 to Shubin et al. (hereinafter “Shubin”).
Regarding claim 1, Shubin discloses an integrated electro-optical device (100 in Fig. 1) comprising: a very large scale integrated (VLSI) chip (110 in Fig. 1) comprising a semiconductor substrate and a plurality of integrated circuit (IC) devices (i.e. the VLSI chip 110 is disclosed as a driver chip that controls the optical gain chip 112 and the photonic chip 114- see paragraph [0040]. As such the VLSI driver chip necessarily contains semiconductor and plurality of integrated circuits), the VLSI chip further comprising a microelectronic interconnection (electrical connectors 118 and spacer 116 in Fig. 1; paragraph [0043]) formed on a first side of the VLSI chip; and an optical chiplet comprising an active optical device (optical gain chip 112 or photonic chip 114 in Fig. 1), wherein: the optical chiplet is mounted to the VLSI chip such that the active optical device is adjacent to the first side of the VLSI chip, and a control signal provided from the VLSI chip to the microelectronic interconnection, when the integrated electro-optical device is operating, couples to the active optical device and controls the active optical device on the optical chiplet (paragraph [0040]-[0044]).
Regarding claim 4, Shubin discloses wherein the active optical device comprises an optical amplifier (paragraph [0042]).
Regarding claim 5, Shubin discloses wherein the active optical device comprises an optical modulator (paragraph [0040]).
Regarding claim 11, Shubin discloses wherein the microelectronic interconnection comprises at least one electrode (electrical connectors 118 in Fig. 1) to capacitively couple the control signal to the active optical device (paragraph [0066]).
Regarding claim 14, Shubin discloses wherein the microelectronic interconnection comprises at least one ohmic contact (118, 116 in Fig. 1; these electrical connectors are necessarily ohmic contact because they establish a contact between metal and semiconductor materials- see paragraph [0042]-[0043]) to electrically couple the control signal to the active optical device to control the active optical device.
Regarding claim 17, Shubin discloses a method of controlling an active optical device that is formed in an integrated electro-optical device (since Shubin discloses an integrated electro optical device according to claim 1 as discussed above, it also necessarily discloses the method of using such a device), the integrated electro-optical device comprising: a very large scale integrated (VLSI) chip (110 in Fig. 1) comprising a semiconductor substrate and a plurality of integrated circuit (IC) devices (i.e. the VLSI chip 110 is disclosed as a driver chip that controls the optical gain chip 112 and the photonic chip 114- see paragraph [0040]. As such the VLSI driver chip necessarily contains semiconductor and plurality of integrated circuits), the VLSI chip further comprising a microelectronic interconnection (electrical connectors 118 and spacer 116 in Fig. 1; paragraph [0043]) formed on a first side of the VLSI chip; and an optical chiplet comprising the active optical device (optical gain chip 112 or photonic chip 114 in Fig. 1), wherein the optical chiplet is mounted to the VLSI chip such that the active optical device is adjacent to the first side of the VLSI chip, the method comprising: providing a control signal from the VLSI chip to the microelectronic interconnection such that the control signal couples to and controls the active optical device on the optical chiplet (paragraph [0040]-[0044]).
Regarding claim 19, Shubin discloses wherein the active optical device comprises a semiconductor optical amplifier and providing the control signal increases a power of an optical wave traveling through the semiconductor optical amplifier (paragraph [0042]).
Regarding claim 20, Shubin discloses a method of making an integrated electro optical device (since Shubin discloses an integrated electro optical device according to claim 1 as discussed above, it also necessarily discloses the method of making such a device), method comprising aligning an active optical device, formed on an optical chiplet (112, 114 in Fig. 1), with a microelectronic interconnection (118, 116 in Fig. 1) formed on a first side of a VLSI chip, the VLSI chip (110 in Fig. 1) comprising a semiconductor substrate and a plurality of IC devices (i.e. the VLSI chip 110 is disclosed as a driver chip that controls the optical gain chip 112 and the photonic chip 114- see paragraph [0040]. As such the VLSI driver chip necessarily contains semiconductor and plurality of integrated circuits); and mounting the optical chiplet to the first side of the VLSI chip such that: the active optical device (112 or 114 in Fig. 1) is adjacent to the microelectronic interconnection (118, 116 in Fig. 1); and a control signal provided from the VLSI chip to the microelectronic interconnection, when the integrated electro-optical device is operating, couples to the active optical device and controls the active optical device on the optical chiplet (paragraph [0040]-[0044]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 2-3, 9-10, 15-16, 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shubin.
Regarding claim 2, Shubin discloses an integrated electro optical device as discussed above regarding claim 1. Although it discloses the use of an active device as already discussed above, it does not explicitly disclose that the optical device is formed at least in part from lithium niobate as claimed in the present application. On the other hand, the use of lithium niobate in active optical devices is well known and common in the art. Lithium niobate material is widely known to be advantageous because it has large electro optic coefficients and allows for ultra fast light modulation and switching with lower driving voltages, as well as wide optical transparency and high optical damage threshold suitable for robust active optical devices. Therefore, it would have been obvious to a person of ordinary skill in the art before the filing date of the present application to modify the device of Shubin to have active optical devices formed at least in part from lithium niobate, in the manner claimed in the present application.
Regarding claims 3, 9, and 18 Shubin discloses an integrated electro optical device comprising an optical gain medium as already discussed above. However, it does not explicitly disclose the use of an optical resonator in the manner claimed in the present application. On the other hand, the use of an optical resonator is well known and common in the integrated electro optical device art. Optical resonators are commonly used in the art in order to provide high energy density optical amplification device capable of precise, wavelength specific light control. In addition, since optical resonators suppress unwanted transverse optical modes, the output beam stays focused and stable for high fidelity light output. Therefore, it would have been obvious to a person of ordinary skill in the art before the filing date of the present application to modify the device of Shubin to have an active device comprising an optical resonator in the manner claimed in the present application.
Regarding claims 10 and 15, Shubin discloses an integrated electro optical device as discussed above regarding claim 1. However, Shubin does not explicitly disclose the use of microlens or a grating coupler in the manner claimed in the present application. However, microlens and grating couplers are well-known optical coupling elements in the art. The use of microlens and grating couplers allow for optimized optical energy coupling with low insertion loss, while allowing for more relaxed alignment tolerances between optical elements. Therefore, it would have been obvious to a person of ordinary skill in the art before the filing date of the present application to modify the device of Shubin to have a microlens or a grating coupler, in the manner claimed in the present application.
Regarding claim 16, Shubin discloses an integrated electro optical device as discussed above regarding claim 1. Although Shubin discloses the use of a spacer (116 in Fig. 1) for mounting an optical chiplet, it does not explicitly disclose the use of a socket for mounting an optical chiplet as claimed in the present application. However, the use of a socket is well known and common in the photonic integrated circuit art. Chip sockets are advantageously used in the art because they allow for quick, precise, and accurate device alignment without the need for complicated active alignment mechanisms. Therefore, it would have been obvious to a person of ordinary skill in the art before the filing date of the present application to modify the device of Shubin to have a socket for mounting the optical chiplet, in the manner claimed the present application.
Allowable Subject Matter
Claims 6-8 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: as discussed above, an integrated electro optical device comprising a VLSI chip and an optical chiplet comprising an active device mounted to the VLSI chip, wherein a control signal is provided from the VLSI chip to the microelectronic interconnection and couples to the active optical device is known in the art. However, none of the prior art fairly teaches or suggests wherein the active optical device comprises a ring resonator; and the microelectronic interconnection comprises a radio-frequency (RF) oscillator, such that operation of the RF oscillator adjacent to the ring resonator: produces optical RF combs from an optical wave propagating in the ring resonator; or encodes data into an optical carrier wave propagating in the ring resonator, in the manner claimed in the present application.
Claims 12-13 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: as discussed above, an integrated electro optical device comprising a VLSI chip and an optical chiplet comprising an active device mounted to the VLSI chip, wherein a control signal is provided from the VLSI chip to the microelectronic interconnection and couples to the active optical device is known in the art. However, none of the prior art fairly teaches or suggests wherein the microelectronic interconnection comprises a pair of electrodes arranged tof rom an electric field that passes through at least a portion of the active optical device in response to the control signal to control a refractive index in the portion of the active optical device, as claimed in claim 12, or wherein the microelectronic interconnection comprises an inductor to create a magnetic field to couple the control signal to the active optical device to control the active optical device, as claimed in claim 13 of the present application.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SUNG H PAK whose telephone number is (571)272-2353. The examiner can normally be reached M-F: 7AM- 5PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Uyen-Chau Le can be reached at 571-272-2397. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/SUNG H PAK/Primary Examiner, Art Unit 2874
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