Prosecution Insights
Last updated: August 15, 2026
Application No. 18/799,464

THERMAL ANALYSIS DEVICE

Non-Final OA §103
Filed
Aug 09, 2024
Priority
Aug 14, 2023 — JP 2023-131785
Examiner
COTEY, PHILIP L
Art Unit
Tech Center
Assignee
Hitachi High-Tech Analysis Corporation
OA Round
1 (Non-Final)
84%
Grant Probability
Favorable
1-2
OA Rounds
5m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 84% — above average
84%
Career Allowance Rate
650 granted / 774 resolved
+24.0% vs TC avg
Strong +21% interview lift
Without
With
+21.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
21 currently pending
Career history
792
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
59.1%
+19.1% vs TC avg
§102
7.6%
-32.4% vs TC avg
§112
26.2%
-13.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 774 resolved cases

Office Action

§103
DETAILED ACTION Claims 1 – 6 are pending in the present application. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of certified copies of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1-4 are rejected under 35 U.S.C. 103 as being unpatentable over Iizuka (US 5370457) in view of Hirokubo et al. (US 20150092275; hereinafter Hirokubo). Regarding claim 1, Iizuka teaches a thermal analysis device (abstract; fig. 1) comprising: a probe that extends in an axial direction (3), one end side of the probe contacting a sample (1) directly or indirectly to apply a load to the sample (abstract; see fig. 1 showing this load being applied); a force generator (at least 7 with 7a / 7/b) provided at another end side of the probe (fig. 1) and configured to generate a force in the axial direction of the probe (col. 3, ¶ at 3; see fig. 1); a displacement detector that detects a displacement in the axial direction of the probe to measure a mechanical property of the sample (col. 4, ¶ at 18 “a displacement detector comprising the core 5 and the differential transformer 4”; see also abstract and col. 6, lines 2-10; see also fig. 1); a force signal generator (at least 22 and 24) that generates a force signal to activate the force generator (“The coil 7b of the force generator is connected to a force generator circuit 22 and generates a force controlled by a CPU 24”; col. 4, lines 13-15); a load detector that detects a load applied to the sample (23; col. 5, lines 47-48 “load (stress) is detected by the detecting circuit 23”); and a furnace for heating the sample (20; col. 5, ¶ at 21); wherein the force signal generator comprises a digital signal generator (24) that generates a digital signal of the force signal (col. 4, ¶ at 1 “force generator circuit 22 … generates a force controlled by a CPU 24”). Iizuka lacks direct and specific teaching regarding a plurality of D/A converters that convert the digital signal into an analog signal, and a plurality of amplifiers that amplify the analog signal output from each of the plurality of D/A converters by different amplification factors, respectively; and the force signal generator outputs the analog signal amplified by at least one of the plurality of amplifiers as the force signal. However, Hirokubo teaches an actuator driving system (abstract; see fig. 2) having a plurality of D/A converters (at least 181/182; see fig. 2; [0109]) that convert the digital signal into an analog signal ([0110]; [0112]), and a plurality of amplifiers (183/184) that amplify the analog signal output from each of the plurality of D/A converters (see fig. 2 showing this configuration; [0111]; [0113]) by different amplification factors, respectively ([0198] teaches regarding “providing a difference in the amplification factor between the amplifiers 183 and 184”); and the force signal generator outputs the analog signal amplified by at least one of the plurality of amplifiers as the force signal (at least first drive voltage V1 and/or second drive voltage V2; see [0111] and [0113] respectively). Therefore, before the effective filing date of the claimed invention it would have been obvious to one of ordinary skill in the art to modify the driver/force generating circuit for actuating the probe of Iizuka with the specific knowledge of using the DACs and amplifiers with different amplification factors of Hirokubo. This is because such a DAC / amplifier configuration allows for digital CPU/microprocessor controlled analog waveform production (see fig. 1 of Iizuka and fig. 2 of Hirokubo showing this digital control of actuating structures). This is important in order to allow for computer/digital controlled actuation. Regarding claim 2, Iizuka and Hirokubo lack direct and specific teaching that a difference in the amplification factor of each of the plurality of amplifiers is greater than or equal to 2 times. However, Hirokubo does disclose that design indicated amplification difference is understood to be useful in certain designs ([0198]). Therefore, before the effective filing date of the claimed invention it would have been obvious to one of ordinary skill in the art to modify the knowledge that amplification difference is understood to be useful in certain designs of Iizuka with a specific range including 2 plus times as a difference as here. This is because it has been held that where the general conditions of a claim are disclosed in the prior art (differing amplification of plural DAC outputs for controlling an actuator), discovering the optimum or workable ranges (difference in amplification greater than or equal to 2 times) involves only routine skill in the art. MPEP 2144.05 (II-A). Regarding claim 3, Iizuka lacks direct and specific teaching that the thermal analysis device comprises a plurality of digital signal generators, each of which generating a different digital signal, and comprises a plurality of the D/A converters and a plurality of the amplifiers for each of the plurality of digital signal generators. However, Hirokubo teaches an actuator driving system (abstract; see fig. 2) with a plurality of digital signal generators (digital control device 17 has storage 171 with two sets of bits to drive p1 and p2 [0105-106]) and a plurality of D/A converters (at least 181/182; see fig. 2; [0109]) that convert the digital signal into an analog signal ([0110]; [0112]), and a plurality of amplifiers (183/184) that amplify the analog signal output from each of the plurality of D/A converters (see fig. 2 showing this configuration; [0111]; [0113]). Therefore, before the effective filing date of the claimed invention it would have been obvious to one of ordinary skill in the art to modify the driver/force generating circuit for actuating the probe of Iizuka with the specific knowledge of using the DACs and amplifiers with different amplification factors of Hirokubo. This is because such plural DAC / amplifier configuration allows for digital CPU/microprocessor controlled analog waveform production (see fig. 1 of Iizuka and fig. 2 of Hirokubo showing this digital control of actuating structures). This is important in order to allow for computer/digital controlled actuation. Iizuka and Hirokubo lack direct and specific teaching that the pluralities of D/As and amplifiers are for each of the plurality of digital signal generators. However, Hirokubo does disclose actuating plural actuators (see fig. 2 elements 561 / 562) with plural digital signal generators (digital control device 17 has storage 171 with two sets of bits to drive p1 and p2 [0105-106]). Therefore, before the effective filing date of the claimed invention it would have been obvious to one of ordinary skill in the art to modify the knowledge plural D/As, plural amplifiers and plural actuators of Iizuka with duplication of any of these components if a design needs expanding. This is because it has been held that mere duplication of the essential working parts (here additional D/As and amplifiers for additional signal generators) of a device involves only routine skill in the art (see MPEP 2144.04 (VI-B)). Regarding claim 4, Iizuka lacks direct and specific teaching that the thermal analysis device comprises a plurality of digital signal generators, each of which generating a different digital signal, and comprises a plurality of the D/A converters and a plurality of the amplifiers for each of the plurality of digital signal generators. However, Hirokubo teaches an actuator driving system (abstract; see fig. 2) with a plurality of digital signal generators (digital control device 17 has storage 171 with two sets of bits to drive p1 and p2 [0105-106]) and a plurality of D/A converters (at least 181/182; see fig. 2; [0109]) that convert the digital signal into an analog signal ([0110]; [0112]), and a plurality of amplifiers (183/184) that amplify the analog signal output from each of the plurality of D/A converters (see fig. 2 showing this configuration; [0111]; [0113]). Therefore, before the effective filing date of the claimed invention it would have been obvious to one of ordinary skill in the art to modify the driver/force generating circuit for actuating the probe of Iizuka with the specific knowledge of using the DACs and amplifiers with different amplification factors of Hirokubo. This is because such plural DAC / amplifier configuration allows for digital CPU/microprocessor controlled analog waveform production (see fig. 1 of Iizuka and fig. 2 of Hirokubo showing this digital control of actuating structures). This is important in order to allow for computer/digital controlled actuation. Iizuka and Hirokubo lack direct and specific teaching that the pluralities of D/As and amplifiers are for each of the plurality of digital signal generators. However, Hirokubo does disclose actuating plural actuators (see fig. 2 elements 561 / 562) with plural digital signal generators (digital control device 17 has storage 171 with two sets of bits to drive p1 and p2 [0105-106]). Therefore, before the effective filing date of the claimed invention it would have been obvious to one of ordinary skill in the art to modify the knowledge plural D/As, plural amplifiers and plural actuators of Iizuka with duplication of any of these components if a design needs expanding. This is because it has been held that mere duplication of the essential working parts (here additional D/As and amplifiers for additional signal generators) of a device involves only routine skill in the art (see MPEP 2144.04 (VI-B)). Claims 5-6 are rejected under 35 U.S.C. 103 as being unpatentable over Iizuka (US 5370457) in view of Hirokubo et al. (US 20150092275; hereinafter Hirokubo) as applied to claims 1-4 respectively (1 and 3 for claim 5 and 1, 2 and 4 for claim 6) above and further in view of Nakamura et al. (US 6205862; hereinafter Nakamura). Regarding claim 5, Iizuka teaches that the signals comprise an AC signal that oscillates over time or a DC signal that is constant over time (col. 5, ¶ at 21 teaches that the “current from the force generating circuit 22 can be a constant (DC) current or a current having a time function”). Iizuka lacks direct and specific teaching regarding the signals being different digital signals as well as the signals being constant DC and time oscillating AC signals (teaching the signals as an “or” – see above). However, Hirokubo teaches an actuator driving system (abstract; see fig. 2) having a plurality of D/A converters (at least 181/182; see fig. 2; [0109]) that convert the digital signal into an analog signal ([0110]; [0112]), and a plurality of amplifiers (183/184) that amplify the analog signal output from each of the plurality of D/A converters (see fig. 2 showing this configuration; [0111]; [0113]) by different amplification factors, respectively ([0198] teaches regarding “providing a difference in the amplification factor between the amplifiers 183 and 184”). Therefore, before the effective filing date of the claimed invention it would have been obvious to one of ordinary skill in the art to modify the driver/force generating circuit for actuating the probe of Iizuka with the specific knowledge of using the DACs and amplifiers with different digital signals of Hirokubo. This is because such different digital signals allows for plural digital CPU/microprocessor controlled analog waveform production (see fig. 1 of Iizuka and fig. 2 of Hirokubo showing this digital control of actuating structures via plural signals). This is important in order to allow for more granular computer/digital controlled actuation. Iizuka and Hirokubo lack direct and specific teaching of the signals being an AC and a DC signal. However, Nakamura teaches a viscoelasticity measurement instrument (abstract; see fig. 1) having “a function generator connected with said force generator and acting to establish a DC component and an AC component of a stress applied to the sample” (emphasis added; col. 2, lines 27-29; see also col. 2, ¶ at 43 “a DC-like strain is induced in the DC force, and an AC-like strain is induced in the AC force”; see also Summary on cols. 2-3 describing the AC and DC components in detail). Therefore, before the effective filing date of the claimed invention it would have been obvious to one of ordinary skill in the art to modify the force generating circuit which can be a constant (DC) current or a current having a time function of Iizuka and Hirokubo with the specific knowledge of using the DC component and an AC component of a stress applied to the sample of Nakamura. This is because such multi component AC and DC force allows for measurements of both “dynamic viscoelasticity” and “static viscoelasticity” (see col. 2, ¶’s at 51 and 58 respectively of Nakamura). This is important in order to provide a better testing of the sample and provide such results to an end user. Regarding claim 6, Iizuka teaches that the signals comprise an AC signal that oscillates over time or a DC signal that is constant over time (col. 5, ¶ at 21 teaches that the “current from the force generating circuit 22 can be a constant (DC) current or a current having a time function”). Iizuka lacks direct and specific teaching regarding the signals being different digital signals as well as the signals being constant DC and time oscillating AC signals (teaching the signals as an “or” – see above). However, Hirokubo teaches an actuator driving system (abstract; see fig. 2) having a plurality of D/A converters (at least 181/182; see fig. 2; [0109]) that convert the digital signal into an analog signal ([0110]; [0112]), and a plurality of amplifiers (183/184) that amplify the analog signal output from each of the plurality of D/A converters (see fig. 2 showing this configuration; [0111]; [0113]) by different amplification factors, respectively ([0198] teaches regarding “providing a difference in the amplification factor between the amplifiers 183 and 184”). Therefore, before the effective filing date of the claimed invention it would have been obvious to one of ordinary skill in the art to modify the driver/force generating circuit for actuating the probe of Iizuka with the specific knowledge of using the DACs and amplifiers with different digital signals of Hirokubo. This is because such different digital signals allows for plural digital CPU/microprocessor controlled analog waveform production (see fig. 1 of Iizuka and fig. 2 of Hirokubo showing this digital control of actuating structures via plural signals). This is important in order to allow for more granular computer/digital controlled actuation. Iizuka and Hirokubo lack direct and specific teaching of the signals being an AC and a DC signal. However, Nakamura teaches a viscoelasticity measurement instrument (abstract; see fig. 1) having “a function generator connected with said force generator and acting to establish a DC component and an AC component of a stress applied to the sample” (emphasis added; col. 2, lines 27-29; see also col. 2, ¶ at 43 “a DC-like strain is induced in the DC force, and an AC-like strain is induced in the AC force”; see also Summary on cols. 2-3 describing the AC and DC components in detail). Therefore, before the effective filing date of the claimed invention it would have been obvious to one of ordinary skill in the art to modify the force generating circuit which can be a constant (DC) current or a current having a time function of Iizuka and Hirokubo with the specific knowledge of using the DC component and an AC component of a stress applied to the sample of Nakamura. This is because such multi component AC and DC force allows for measurements of both “dynamic viscoelasticity” and “static viscoelasticity” (see col. 2, ¶’s at 51 and 58 respectively of Nakamura). This is important in order to provide a better testing of the sample and provide such results to an end user. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. See PTO-892. See especially: Underwood et al. (US 4937535) teaching regarding a “method for calibrating measurement or analysis systems that is externally traceable, simple, and repeatable, which is particularly amenable to computer control, and a unique programmable phase-gain amplifier” (abstract) including “blocks 66A, B and C represent programmable resistor arrays. These arrays can be multiplying digital to analog converter device” (see fig. 3 showing this array of plural DACs 66A/B/C each with an amplifier 68A/B/C). Any inquiry concerning this communication or earlier communications from the examiner should be directed to PHILIP COTEY whose telephone number is (571)270-1029. The examiner can normally be reached M-F 9-5. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Laura Martin can be reached at 571-272-2160. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /PHILIP L COTEY/ Examiner, Art Unit 2855 /LAURA MARTIN SWEENEY/ Supervisory Patent Examiner, Art Unit 2855
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Prosecution Timeline

Aug 09, 2024
Application Filed
Jul 22, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
84%
Grant Probability
99%
With Interview (+21.2%)
2y 5m (~5m remaining)
Median Time to Grant
Low
PTA Risk
Based on 774 resolved cases by this examiner. Grant probability derived from career allowance rate.

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