CTFR 18/799,622 CTFR 80587 DETAILED ACTION 1 . This Office Action is taken in response to Applicants’ Amendments and Remarks filed on 12/8/2025 regarding application 18/799,622 filed on 8/9/2024. Claims 1-17, and 21-23 are pending for consideration. 2 . Response to Amendments and Remarks Applicants’ amendments and remarks have been fully and carefully considered, with the Examiner’s response set forth below. In view of the amendments and remarks, rejection of claim 4 under 112(b) has been withdrawn. (2) In response to the amendments and remarks, an updated claim analysis has been made with additional, new reference(s). Refer to the corresponding sections of the following Office Action for details. 3 . Examiner’s Note (1) In the case of amending the Claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention. This will assist in expediting compact prosecution. MPEP 714.02 recites: “Applicant should also specifically point out the support for any amendments made to the disclosure. See MPEP § 2163.06. An amendment which does not comply with the provisions of 37 CFR 1.121(b), (c), (d), and (h) may be held not fully responsive. See MPEP § 714.” Amendments not pointing to specific support in the disclosure may be deemed as not complying with provisions of 37 C.F.R. 1.131(b), (c), (d), and (h) and therefore held not fully responsive . Generic statements such as “Applicants believe no new matter has been introduced” may be deemed insufficient. (2) Examiner has cited particular columns/paragraph and line numbers in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. 4 . Claims 1-17, and 21-23 are rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, regards as the invention. Claim 1 recites “the multiple memory addresses comprising embedded data and a corresponding check code;” “each respective decoder configured to: compute a respective check code based on the respective portion of memory addresses stored in each respective buffer;” and “search for the embedded data using a comparison including the respective check code and at least one memory address of the respective portion of memory addresses stored in each the buffer.” First , the limitation “the multiple memory addresses comprising embedded data and a corresponding check code ” appears to require that there is “only one check code” corresponds to “the entire multiple memory addresses,” rather than “one check code” corresponds to “each of the multiple memory addresses.” Second , the limitation “each respective decoder configured to: compute a respective check code based on the respective portion of memory addresses stored in each respective buffer” also confirms that there is only one check code corresponds to the entire portion of memory addresses stored in each respective buffer, and that the check code is computed from based on the respective portion of memory addresses stored in each respective buffer. Third , the limitation “search for the embedded data using a comparison including the respective check code and at least one memory address of the respective portion of memory addresses stored in each the buffer” requires comparing “the respective check code (computed from the respective portion of memory addresses stored in each respective buffer)” to “at least one memory address of the respective portion of memory addresses stored in each the buffer.” However, the respective check code is computed form all the memory addresses stored in each respective buffer, and yet it is compared to just a single (at least one) memory addresses stored in each respective buffer. It is not clear how a check code can be directly compared to a single memory address, because the check code, being computed from all the memory addresses stored in each respective buffer, may be in a totally different format/unit than a memory address. Further, regarding “search for the embedded data,” it is not clear where “the embedded data” refers to “the embedded data stored in the memory,” or “the embedded data stored in the respective buffer,” because both the memory and all the buffers include embedded data, as the contents of the memory are copied to the multiple buffers in portions. Significantly, it is not clear whether a check code computed from all the memory addresses can be the same as a check code computed from only a portion of the memory addresses or simply a single memory address. If the value of a check code depends on the number of memory addresses from which it is computed, then the comparison of a check code computed from all the memory addresses and a a check code computed using only a portion of the memory addresses or simply a single memory address may never result in a match. Claim 1 is completely silent regarding how a check code is computed, leaving the above raised issues unanswered, thus rendering claim 1 indefinite. Claims 2-10, and 21-22 are rejected by virtue of their dependency from claim 1. Claim 11 suffers from the same deficiency as in claim 1. Claims 12-17 are rejected by virtue of their dependency from claim 11. Claim 23 suffers from the same deficiency as in claim 1. Clarifications/corrections are required. Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA 5 . Claim s 1-7, 11, 13, 15-17, and 21-23 are rejected under 35 U.S.C. 103 as being unpatentable over Kyrychynskyi et al. (US Patent Application Publication 2018/0173649, hereinafter Kyrychynskyi), and in view of Yen et al. (US Patent Application Publication 2019/0065123, hereinafter Yen) . As to claim 1, Kyrychynskyi teaches An apparatus [an apparatus as shown in figures 1-3; Yen also teaches this limitation -- an apparatus as shown in figure 2] comprising : a memory [as shown in figure 3, where the corresponding memory is the buffer (310); Yen also teaches this limitation – memory device, figure 1, 200] configured to store multiple memory addresses [multiple entries of address, figure 3, 316; Roberts also teaches this limitation – address stream as shown in figures 2-1 and 2-2], the multiple memory addresses comprising embedded data and a corresponding check code [the corresponding embedded data includes attributes and pointers, while the corresponding check code comprises hash values computed using address -- as shown in figure 3, where the corresponding data comprises attributes (312) and next pointer (314); In some embodiments, the page address field 316 stores a DRAM page addres s of partitioned memory to be accessed by the stored memory access requests. In other embodiments, the field 316 stores a hash value . As described earlier, the hash value is computed using the page address and one or more of a source identifier (ID), an application ID, a program counter (PC) value of an instruction being processed by the source, and so forth. In various embodiments, the request selector 300 is used to select a stored memory access request of the requests stored in the buffer 310 and identify one or more other stored requests storing a same field such as the field 316 holding a page address, a hash value or other ... (¶ 0044-0045)]; multiple buffers coupled to the memory [multiple buffers, figure 3, 320A-320F], each buffer of the multiple buffers configured to store a portion of memory addresses of the multiple memory addresses [as shown in figure 3; Referring now to FIG. 3, one embodiment of a memory access request selector 300 is shown. The request selector 300 includes the buffer 310. In some embodiments, the request selector 300 includes another single buffer 320A. In such embodiments, the single buffer 320A is used to search a subset of memory access requests stored in the buffer 310. In other embodiments, the request selector 300 includes multiple other buffers 320A-320F . In such embodiments, the multiple other buffers 320A-320F are used to search multiple subsets of memory access requests stored in the buffer 310 based on criteria. The criteria includes a source identifier (ID) of the requestor generating memory access requests, a memory access type, a priority level or other ... Rather than search the buffer 310 as it can store an appreciable number of entries, the request selector 300 searches a subset of the requests stored in the buffer 310. The subset(s) are stored in the buffers 320A-320F. The selector 306 determines whether the buffers 320A-320F are filled from the memory access requests on the input 302 or from the buffer 310. For example, when the buffer 320A stores a subset of the oldest requests in the buffer 310, the buffer 320A is initially filled from the input 302. When the buffer 320A becomes full and later creates available entries by sending requests on output 340, the buffer 320A receives requests from the buffer 310 . Therefore, the buffer 320A holds a number N of the oldest requests in the buffer 310 where N is an integer less than a total number M of the entries in the buffer 310 ... (¶ 0040-0052)]; a controller [memory controller, figure 1, 130] coupled to the memory and the multiple buffers, the controller configured to copy the portion of memory addresses from the memory to each buffer of the multiple buffers [as shown in figure 3; Referring now to FIG. 3, one embodiment of a memory access request selector 300 is shown. The request selector 300 includes the buffer 310. In some embodiments, the request selector 300 includes another single buffer 320A. In such embodiments, the single buffer 320A is used to search a subset of memory access requests stored in the buffer 310. In other embodiments, the request selector 300 includes multiple other buffers 320A-320F . In such embodiments, the multiple other buffers 320A-320F are used to search multiple subsets of memory access requests stored in the buffer 310 based on criteria. The criteria includes a source identifier (ID) of the requestor generating memory access requests, a memory access type, a priority level or other ... Rather than search the buffer 310 as it can store an appreciable number of entries, the request selector 300 searches a subset of the requests stored in the buffer 310. The subset(s) are stored in the buffers 320A-320F. The selector 306 determines whether the buffers 320A-320F are filled from the memory access requests on the input 302 or from the buffer 310. For example, when the buffer 320A stores a subset of the oldest requests in the buffer 310, the buffer 320A is initially filled from the input 302. When the buffer 320A becomes full and later creates available entries by sending requests on output 340, the buffer 320A receives requests from the buffer 310 . Therefore, the buffer 320A holds a number N of the oldest requests in the buffer 310 where N is an integer less than a total number M of the entries in the buffer 310 ... (¶ 0040-0052)]; and multiple decoders, each respective decoder of the multiple decoders coupled to a respective buffer of the multiple buffers [Kyrychynskyi teaches each of the multiple buffers performs the corresponding decoder function -- ... In other embodiments, the request selector 300 includes multiple other buffers 320A-320F . In such embodiments, the multiple other buffers 320A-320F are used to search multiple subsets of memory access requests stored in the buffer 310 based on criteria . The criteria includes a source identifier (ID) of the requestor generating memory access requests, a memory access type, a priority level or other (¶ 0040); When the oldest or highest ranking request is selected, the field 322 is inspected for the address, hash value or other that it stores . This value is used to search the other entries of the buffer 320A . For example, in various embodiments, the search logic 330 performs a CAM match operation using the identified value to find whether one or more other requests with entries in the buffer 320A also store the identified value ... (¶ 0050); Yen more expressively teaches multiple decoders – as shown in figure 5, where there are multiple decoders 61-63] , each respective decoder configured to: compute a respective check code based on the respective portion of memory addresses stored in each respective buffer [In some embodiments, the page address field 316 stores a DRAM page addres s of partitioned memory to be accessed by the stored memory access requests. In other embodiments, the field 316 stores a hash value . As described earlier, the hash value is computed using the page address and one or more of a source identifier (ID), an application ID, a program counter (PC) value of an instruction being processed by the source, and so forth. In various embodiments, the request selector 300 is used to select a stored memory access request of the requests stored in the buffer 310 and identify one or more other stored requests storing a same field such as the field 316 holding a page address, a hash value or other ... In various embodiments, each entry of the buffer 320A stores a subset of the information stored in a corresponding entry in the buffer 310 . As shown in the illustrated embodiment, each entry of the multiple entries in the buffer 320A includes an address field 322, a status field 324 and a pointer field 326. In various embodiments, the field 322 stores the same information stored in the field 316 of the corresponding entry in the buffer 310 . For example, the field 322 stores the same page address, the same hash value or other . The status field 324 stores status information such as a valid bit, an entry or position number, and so forth (¶ 0044-0047)]; and search for the embedded data using a comparison including the respective check code and at least one memory address of the respective portion of memory addresses stored in each the buffer [Referring now to FIG. 3, one embodiment of a memory access request selector 300 is shown. The request selector 300 includes the buffer 310. In some embodiments, the request selector 300 includes another single buffer 320A. In such embodiments, the single buffer 320A is used to search a subset of memory access requests stored in the buffer 310 . In other embodiments, the request selector 300 includes multiple other buffers 320A-320F . In such embodiments, the multiple other buffers 320A-320F are used to search multiple subsets of memory access requests stored in the buffer 310 based on criteria . The criteria includes a source identifier (ID) of the requestor generating memory access requests, a memory access type, a priority level or other (¶ 0040); In various embodiments, the request selector 300 is used to select a stored memory access request of the requests stored in the buffer 310 and identify one or more other stored requests storing a same field such as the field 316 holding a page address, a hash value or other. When determining whether any other stored request also includes a same value in the field 316, control logic (not shown) within the request selector 300 searches the requests. Rather than search the buffer 310 as it can store an appreciable number of entries, the request selector 300 searches a subset of the requests stored in the buffer 310 . The subset(s) are stored in the buffers 320A-320F (¶ 0045); When the oldest or highest ranking request is selected, the field 322 is inspected for the address, hash value or other that it stores . This value is used to search the other entries of the buffer 320A . For example, in various embodiments, the search logic 330 performs a CAM match operation using the identified value to find whether one or more other requests with entries in the buffer 320A also store the identified value ... (¶ 0050)]. Regarding claim 1, Kyrychynskyi teaches multiple buffers, in which each buffer performs the functions of a “decoder” as recited in claim 1, i.e., compute a respective check code based on the respective portion of memory addresses stored in each respective buffer [In some embodiments, the page address field 316 stores a DRAM page addres s of partitioned memory to be accessed by the stored memory access requests. In other embodiments, the field 316 stores a hash value . As described earlier, the hash value is computed using the page address and one or more of a source identifier (ID), an application ID, a program counter (PC) value of an instruction being processed by the source, and so forth. In various embodiments, the request selector 300 is used to select a stored memory access request of the requests stored in the buffer 310 and identify one or more other stored requests storing a same field such as the field 316 holding a page address, a hash value or other ... In various embodiments, each entry of the buffer 320A stores a subset of the information stored in a corresponding entry in the buffer 310 . As shown in the illustrated embodiment, each entry of the multiple entries in the buffer 320A includes an address field 322, a status field 324 and a pointer field 326. In various embodiments, the field 322 stores the same information stored in the field 316 of the corresponding entry in the buffer 310 . For example, the field 322 stores the same page address, the same hash value or other . The status field 324 stores status information such as a valid bit, an entry or position number, and so forth (¶ 0044-0047)]; and search for the embedded data using a comparison including the respective check code and at least one memory address of the respective portion of memory addresses stored in each the buffer [Referring now to FIG. 3, one embodiment of a memory access request selector 300 is shown. The request selector 300 includes the buffer 310. In some embodiments, the request selector 300 includes another single buffer 320A. In such embodiments, the single buffer 320A is used to search a subset of memory access requests stored in the buffer 310 . In other embodiments, the request selector 300 includes multiple other buffers 320A-320F . In such embodiments, the multiple other buffers 320A-320F are used to search multiple subsets of memory access requests stored in the buffer 310 based on criteria . The criteria includes a source identifier (ID) of the requestor generating memory access requests, a memory access type, a priority level or other (¶ 0040); In various embodiments, the request selector 300 is used to select a stored memory access request of the requests stored in the buffer 310 and identify one or more other stored requests storing a same field such as the field 316 holding a page address, a hash value or other. When determining whether any other stored request also includes a same value in the field 316, control logic (not shown) within the request selector 300 searches the requests. Rather than search the buffer 310 as it can store an appreciable number of entries, the request selector 300 searches a subset of the requests stored in the buffer 310 . The subset(s) are stored in the buffers 320A-320F (¶ 0045); When the oldest or highest ranking request is selected, the field 322 is inspected for the address, hash value or other that it stores . This value is used to search the other entries of the buffer 320A . For example, in various embodiments, the search logic 330 performs a CAM match operation using the identified value to find whether one or more other requests with entries in the buffer 320A also store the identified value ... (¶ 0050)]. Regarding claim 1, Kyrychynskyi does not use the term “decoder,” and does not explicitly teach multiple decoders, as recited in claim 1. However, as explained above, the each of multiple buffers disclosed by Kyrychynskyi actually performs the functions of a decoder, so the decoder is integrated into, and becomes part of the buffer itself. Further, Yen specifically teaches multiple decoders associated with buffers [as shown in figure 5, where there are multiple decoders 61-63]. Therefore, it would have been obvious for one of ordinary skills in the art before the effective filing date of the claimed invention to recognize that the feature of having each of the multiple decoders corresponds to each of the multiple buffers, is implicitly disclosed by Kyrychynskyi and explicitly demonstrated by Yen, rendering the feature patentably insignificant. As to claim 2, Kyrychynskyi in view of Yen teaches The apparatus of claim 1, wherein a respective decoder of the multiple decoders is configured to: identify the embedded data based on the respective check code matching the corresponding check code that is included as at least part of the at least one memory address of the portion of memory addresses stored in the respective buffer of the respective decoder; and signal identification of the embedded data responsive to the matching [Kyrychynskyi -- Referring now to FIG. 3, one embodiment of a memory access request selector 300 is shown. The request selector 300 includes the buffer 310. In some embodiments, the request selector 300 includes another single buffer 320A. In such embodiments, the single buffer 320A is used to search a subset of memory access requests stored in the buffer 310 . In other embodiments, the request selector 300 includes multiple other buffers 320A-320F . In such embodiments, the multiple other buffers 320A-320F are used to search multiple subsets of memory access requests stored in the buffer 310 based on criteria . The criteria includes a source identifier (ID) of the requestor generating memory access requests, a memory access type, a priority level or other (¶ 0040); In various embodiments, each entry of the buffer 320A stores a subset of the information stored in a corresponding entry in the buffer 310 . As shown in the illustrated embodiment, each entry of the multiple entries in the buffer 320A includes an address field 322, a status field 324 and a pointer field 326. In various embodiments, the field 322 stores the same information stored in the field 316 of the corresponding entry in the buffer 310 . For example, the field 322 stores the same page address, the same hash value or other . The status field 324 stores status information such as a valid bit, an entry or position number, and so forth ... In various embodiments, the request selector 300 is used to select a stored memory access request of the requests stored in the buffer 310 and identify one or more other stored requests storing a same field such as the field 316 holding a page address, a hash value or other. When determining whether any other stored request also includes a same value in the field 316, control logic (not shown) within the request selector 300 searches the requests. Rather than search the buffer 310 as it can store an appreciable number of entries, the request selector 300 searches a subset of the requests stored in the buffer 310 . The subset(s) are stored in the buffers 320A-320F ... (¶ 0044-0047); When the oldest or highest ranking request is selected, the field 322 is inspected for the address, hash value or other that it stores . This value is used to search the other entries of the buffer 320A . For example, in various embodiments, the search logic 330 performs a CAM match operation using the identified value to find whether one or more other requests with entries in the buffer 320A also store the identified value ... (¶ 0050)]. As to claim 3, Kyrychynskyi in view of Yen teaches The apparatus of claim 2, wherein: the respective portion of memory addresses stored in the respective buffer comprises a first memory address, a second memory address, and the at least one memory address; the first memory address comprises a first part of the embedded data; the second memory address comprises a second part of the embedded data; and the at least one memory address comprises the corresponding check code [Kyrychynskyi -- the corresponding check code comprises hash values computed using address -- as shown in figure 3; Referring now to FIG. 3, one embodiment of a memory access request selector 300 is shown. The request selector 300 includes the buffer 310. In some embodiments, the request selector 300 includes another single buffer 320A. In such embodiments, the single buffer 320A is used to search a subset of memory access requests stored in the buffer 310. In other embodiments, the request selector 300 includes multiple other buffers 320A-320F . In such embodiments, the multiple other buffers 320A-320F are used to search multiple subsets of memory access requests stored in the buffer 310 based on criteria. The criteria includes a source identifier (ID) of the requestor generating memory access requests, a memory access type, a priority level or other ... Rather than search the buffer 310 as it can store an appreciable number of entries, the request selector 300 searches a subset of the requests stored in the buffer 310. The subset(s) are stored in the buffers 320A-320F. The selector 306 determines whether the buffers 320A-320F are filled from the memory access requests on the input 302 or from the buffer 310. For example, when the buffer 320A stores a subset of the oldest requests in the buffer 310, the buffer 320A is initially filled from the input 302. When the buffer 320A becomes full and later creates available entries by sending requests on output 340, the buffer 320A receives requests from the buffer 310 . Therefore, the buffer 320A holds a number N of the oldest requests in the buffer 310 where N is an integer less than a total number M of the entries in the buffer 310 ... as shown in figure 3, where the corresponding data comprises attributes (312) and next pointer (314); In some embodiments, the page address field 316 stores a DRAM page addres s of partitioned memory to be accessed by the stored memory access requests. In other embodiments, the field 316 stores a hash value . As described earlier, the hash value is computed using the page address and one or more of a source identifier (ID), an application ID, a program counter (PC) value of an instruction being processed by the source, and so forth. In various embodiments, the request selector 300 is used to select a stored memory access request of the requests stored in the buffer 310 and identify one or more other stored requests storing a same field such as the field 316 holding a page address, a hash value or other ... (¶ 0044-0045)]. As to claim 4, Kyrychynskyi in view of Yen teaches the apparatus of claim 3, wherein to compute the respective check code, the respective decoder is configured to: apply a checking algorithm to the first part of the embedded data and the second part of the embedded data to produce the respective check code [Kyrychynskyi -- the corresponding check code comprises hash values computed using address -- as shown in figure 3; Referring now to FIG. 3, one embodiment of a memory access request selector 300 is shown. The request selector 300 includes the buffer 310. In some embodiments, the request selector 300 includes another single buffer 320A. In such embodiments, the single buffer 320A is used to search a subset of memory access requests stored in the buffer 310. In other embodiments, the request selector 300 includes multiple other buffers 320A-320F . In such embodiments, the multiple other buffers 320A-320F are used to search multiple subsets of memory access requests stored in the buffer 310 based on criteria. The criteria includes a source identifier (ID) of the requestor generating memory access requests, a memory access type, a priority level or other ... Rather than search the buffer 310 as it can store an appreciable number of entries, the request selector 300 searches a subset of the requests stored in the buffer 310. The subset(s) are stored in the buffers 320A-320F. The selector 306 determines whether the buffers 320A-320F are filled from the memory access requests on the input 302 or from the buffer 310. For example, when the buffer 320A stores a subset of the oldest requests in the buffer 310, the buffer 320A is initially filled from the input 302. When the buffer 320A becomes full and later creates available entries by sending requests on output 340, the buffer 320A receives requests from the buffer 310 . Therefore, the buffer 320A holds a number N of the oldest requests in the buffer 310 where N is an integer less than a total number M of the entries in the buffer 310 ... as shown in figure 3, where the corresponding data comprises attributes (312) and next pointer (314); In some embodiments, the page address field 316 stores a DRAM page addres s of partitioned memory to be accessed by the stored memory access requests. In other embodiments, the field 316 stores a hash value . As described earlier, the hash value is computed using the page address and one or more of a source identifier (ID), an application ID, a program counter (PC) value of an instruction being processed by the source, and so forth. In various embodiments, the request selector 300 is used to select a stored memory access request of the requests stored in the buffer 310 and identify one or more other stored requests storing a same field such as the field 316 holding a page address, a hash value or other ... (¶ 0044-0045)]. As to claim 5, Kyrychynskyi in view of Yen teaches The apparatus of claim 4, wherein: the first memory address comprises the first part of the embedded data and first other bits; the second memory address comprises the second part of the embedded data and second other bits; and the at least one memory address comprises the corresponding check code and third other bits [Kyrychynskyi – as shown in figure 3, where the corresponding data comprises attributes (312) and next pointer (314); In some embodiments, the page address field 316 stores a DRAM page addres s of partitioned memory to be accessed by the stored memory access requests. In other embodiments, the field 316 stores a hash value . As described earlier, the hash value is computed using the page address and one or more of a source identifier (ID), an application ID, a program counter (PC) value of an instruction being processed by the source, and so forth. In various embodiments, the request selector 300 is used to select a stored memory access request of the requests stored in the buffer 310 and identify one or more other stored requests storing a same field such as the field 316 holding a page address, a hash value or other ... (¶ 0044-0045)]. As to claim 6, Kyrychynskyi in view of Yen teaches The apparatus of claim 1, wherein to copy the respective portion of memory addresses from the memory to each buffer, the controller is configured to: copy the respective portion of memory addresses from the memory to each buffer of the multiple buffers; and load the memory addresses of the portion of memory addresses into each buffer of the multiple buffers in a different permutation order of multiple permutation orders [as shown in figure 3; one embodiment of a memory access request selector 300 is shown. The request selector 300 includes the buffer 310. In some embodiments, the request selector 300 includes another single buffer 320A. In such embodiments, the single buffer 320A is used to search a subset of memory access requests stored in the buffer 310. In other embodiments, the request selector 300 includes multiple other buffers 320A-320F . In such embodiments, the multiple other buffers 320A-320F are used to search multiple subsets of memory access requests stored in the buffer 310 based on criteria. The criteria includes a source identifier (ID) of the requestor generating memory access requests, a memory access type, a priority level or other ... Rather than search the buffer 310 as it can store an appreciable number of entries, the request selector 300 searches a subset of the requests stored in the buffer 310. The subset(s) are stored in the buffers 320A-320F. The selector 306 determines whether the buffers 320A-320F are filled from the memory access requests on the input 302 or from the buffer 310. For example, when the buffer 320A stores a subset of the oldest requests in the buffer 310, the buffer 320A is initially filled from the input 302. When the buffer 320A becomes full and later creates available entries by sending requests on output 340, the buffer 320A receives requests from the buffer 310 . Therefore, the buffer 320A holds a number N of the oldest requests in the buffer 310 where N is an integer less than a total number M of the entries in the buffer 310 ... (¶ 0040-0052)]. As to claim 7, Kyrychynskyi in view of Yen teaches The apparatus of claim 1, wherein: each buffer of the multiple buffers comprises multiple storage locations; the multiple storage locations have a first quantity of storage locations; each decoder is configured to compute the respective check code using a subset of memory addresses of the respective portion of memory addresses stored in the respective buffer of the respective decoder, the subset of memory addresses having a second quantity of memory addresses; and the first quantity of storage locations is greater than the second quantity of memory addresses [Kyrychynskyi -- as shown in figure 3, 320A-320F; In some embodiments, the page address field 316 stores a DRAM page addres s of partitioned memory to be accessed by the stored memory access requests. In other embodiments, the field 316 stores a hash value . As described earlier, the hash value is computed using the page address and one or more of a source identifier (ID), an application ID, a program counter (PC) value of an instruction being processed by the source, and so forth. In various embodiments, the request selector 300 is used to select a stored memory access request of the requests stored in the buffer 310 and identify one or more other stored requests storing a same field such as the field 316 holding a page address, a hash value or other ... In various embodiments, each entry of the buffer 320A stores a subset of the information stored in a corresponding entry in the buffer 310 . As shown in the illustrated embodiment, each entry of the multiple entries in the buffer 320A includes an address field 322, a status field 324 and a pointer field 326. In various embodiments, the field 322 stores the same information stored in the field 316 of the corresponding entry in the buffer 310 . For example, the field 322 stores the same page address, the same hash value or other . The status field 324 stores status information such as a valid bit, an entry or position number, and so forth (¶ 0044-0047)]. As to claim 11, it recites substantially the same limitations as in claim 1, and is rejected for the same reasons set forth in the analysis of claim 1. Refer to “As to claim 1” presented earlier in this Office Action for details. As to claim 13, it recites substantially the same limitations as in claim 2, and is rejected for the same reasons set forth in the analysis of claim 2. Refer to “As to claim 2” presented earlier in this Office Action for details. As to claim 15, Kyrychynskyi in view of Yen teaches The method of claim 13, further comprising: interpreting, by a memory device, the identified embedded data as an indication of at least one object that is allocated [Kyrychynskyi – figure 3, 314, next pointer; The pointer field 326 stores an indication of the corresponding entry in the buffer 310 . For example, in some embodiments, the pointer field 326 stores an entry number. The tail pointer 328 stores an indication of the last in-order allocated entry in the buffer 310. In some embodiments, an indication of a next entry in the buffer 310 to read when an entry in the buffer 320A becomes available for allocation is found by using both the pointer field 326 of the last allocated entry in the buffer 320A and the next pointer field 314 in the buffer 310 of the entry identified by pointer field 326 of the last allocated entry in the buffer 320A ... (¶ 0048)]. As to claim 16, Kyrychynskyi in view of Yen teaches The method of claim 15, further comprising: tracking, by the memory device, memory-side behavior of the at least one object based on the interpreting of the identified embedded data as the indication of the at least one object [Kyrychynskyi – figure 3, 314, next pointer; The pointer field 326 stores an indication of the corresponding entry in the buffer 310 . For example, in some embodiments, the pointer field 326 stores an entry number. The tail pointer 328 stores an indication of the last in-order allocated entry in the buffer 310. In some embodiments, an indication of a next entry in the buffer 310 to read when an entry in the buffer 320A becomes available for allocation is found by using both the pointer field 326 of the last allocated entry in the buffer 320A and the next pointer field 314 in the buffer 310 of the entry identified by pointer field 326 of the last allocated entry in the buffer 320A ... (¶ 0048)]. As to claim 17, Kyrychynskyi in view of Yen teaches The method of claim 15, further comprising: storing, by the memory device, historical statistics relating to the at least one object based on the interpreting of the identified embedded data as the indication of the at least one object [Kyrychynskyi – The arbiter determines whether one or more other stored requests access memory locations in the given page storing the memory location targeted by the selected request. In some embodiments, the arbiter selects a subset of stored requests to search. For example, in some embodiments, the subset includes a given number of the oldest requests of the stored requests . In other embodiments, the subset includes a given number of requests with a highest ranking of the stored requests . Similar to the selection of the given request, the ranking of the stored requests is based on an algorithm using a combination of one or more of a monitored age, a priority level, a quality-of-service parameter, a source identifier (ID), an application ID and so forth (¶ 0013)]. As to claim 21, Kyrychynskyi in view of Yen teaches The apparatus of claim 1, wherein the controller is configured to: copy the same portion of memory addresses of the multiple memory addresses from the memory to each buffer of the multiple buffers [Kyrychynskyi -- as shown in figure 3, 310, and 320A-320F]. As to claim 22, it recites substantially the same limitations as in claim 21 and is rejected for the same reasons set forth in the analysis of claim 21. Refer to “As to claim 21” presented earlier in this Office Action for details. As to claim 23, it recites substantially the same limitations as in claim 1, and is rejected for the same reasons set forth in the analysis of claim 1. Refer to “As to claim 1” presented earlier in this Office Action for details . 07-21-aia AIA 6 . Claim s 8-10, 12, and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Kyrychynskyi in view of Yen, and further in view of Roberts (US Patent Application Publication 2021/0365380) . Regarding claim 8, Kyrychynskyi in view of Yen teaches The apparatus of claim 1, wherein at least some memory addresses of the multiple memory addresses comprise: a mailbox portion comprising a mailbox indicator indicative of an association between two or more memory addresses [Kyrychynskyi – the corresponding “mailbox” is “a subset of the stored memory addresses” -- The arbiter determines whether one or more other stored requests access memory locations in the given page storing the memory location targeted by the selected request. In some embodiments, the arbiter selects a subset of stored requests to search . For example, in some embodiments, the subset includes a given number of the oldest requests of the stored requests . In other embodiments, the subset includes a given number of requests with a highest ranking of the stored requests ... (¶ 0013); Rather than search the buffer 310 as it can store an appreciable number of entries, the request selector 300 searches a subset of the requests stored in the buffer 310. The subset(s) are stored in the buffers 320A-320F ... (¶ 0045-0046); Roberts more expressively teaches a mailbox -- Techniques and devices are described for embedding data in an address stream on an interconnect, such as a memory bus. Addresses in an address stream indicate at least part of a location in memory (e.g., a memory page and offset), whereas data embedded in the address stream can indicate when metadata or other information is available to lend context to the addresses in the address stream. The indication of data in the address stream can be communicated using, for example, a mailbox , a preamble message in a messaging protocol, a checksum, repetitive transmission, or combinations thereof. The indication of data can be recorded from the address stream and may later be used to interpret memory traces recorded during a test or can be used to communicate with a memory device or other recipient of the data during testing or regular operations (abstract)]; and a packet portion, the packet portion comprising at least one instance of embedded data or at least one instance of a check code [Kyrychynskyi – the corresponding “check code” is “a hash value” -- ... In various embodiments, the request selector 300 is used to select a stored memory access request of the requests stored in the buffer 310 and identify one or more other stored requests storing a same field such as the field 316 holding a page address, a hash value or other ... (¶ 0045-0046); Roberts teaches embedded data -- Techniques and devices are described for embedding data in an address stream on an interconnect, such as a memory bus. Addresses in an address stream indicate at least part of a location in memory (e.g., a memory page and offset), whereas data embedded in the address stream can indicate when metadata or other information is available to lend context to the addresses in the address stream ... (abstract)]. Regarding claim 8, Kyrychynskyi in view of Yen does not recite the term “mailbox.” However, Kyrychynskyi’s disclosure of “a subset” effectively serves as a mailbox, because a subset indicates an association of a group of stored requests. Further, Roberts specifically teaches teach a mailbox indicator indicative of an association between two or more memory addresses [Techniques and devices are described for embedding data in an address stream on an interconnect, such as a memory bus. Addresses in an address stream indicate at least part of a location in memory (e.g., a memory page and offset), whereas data embedded in the address stream can indicate when metadata or other information is available to lend context to the addresses in the address stream. The indication of data in the address stream can be communicated using, for example, a mailbox , a preamble message in a messaging protocol, a checksum, repetitive transmission, or combinations thereof. The indication of data can be recorded from the address stream and may later be used to interpret memory traces recorded during a test or can be used to communicate with a memory device or other recipient of the data during testing or regular operations (abstract)]. Therefore, it would have been obvious for one of ordinary skills in the art before the effective filing date of the claimed invention to recognize that the feature of a mailbox is implicitly disclosed by Kyrychynskyi by way of a subset, and explicitly demonstrated by Roberts, rendering the feature patentably insignificant. Regarding claim 9, Kyrychynskyi in view of Yen & Roberts teaches The apparatus of claim 8, wherein the controller is configured to: copy the portion of memory addresses from the memory to each buffer of the multiple buffers based on the mailbox indicator in each memory address of the multiple memory addresses [Kyrychynskyi -- the corresponding “mailbox” is “a subset of the stored memory addresses” -- as shown in figure 3; Referring now to FIG. 3, one embodiment of a memory access request selector 300 is shown. The request selector 300 includes the buffer 310. In some embodiments, the request selector 300 includes another single buffer 320A. In such embodiments, the single buffer 320A is used to search a subset of memory access requests stored in the buffer 310. In other embodiments, the request selector 300 includes multiple other buffers 320A-320F . In such embodiments, the multiple other buffers 320A-320F are used to search multiple subsets of memory access requests stored in the buffer 310 based on criteria. The criteria includes a source identifier (ID) of the requestor generating memory access requests, a memory access type, a priority level or other ... Rather than search the buffer 310 as it can store an appreciable number of entries, the request selector 300 searches a subset of the requests stored in the buffer 310. The subset(s) are stored in the buffers 320A-320F. The selector 306 determines whether the buffers 320A-320F are filled from the memory access requests on the input 302 or from the buffer 310. For example, when the buffer 320A stores a subset of the oldest requests in the buffer 310, the buffer 320A is initially filled from the input 302. When the buffer 320A becomes full and later creates available entries by sending requests on output 340, the buffer 320A receives requests from the buffer 310 . Therefore, the buffer 320A holds a number N of the oldest requests in the buffer 310 where N is an integer less than a total number M of the entries in the buffer 310 ... (¶ 0040-0052)]. Regarding claim 10, Kyrychynskyi in view of Yen & Roberts teaches The apparatus of claim 8, further comprising: a filter coupled to the memory, the filter comprising at least one register configured to store at least one mailbox value, the filter configured to: receive a stream of memory addresses comprising a plurality of memory addresses including the multiple memory addresses, the stream of memory addresses comprising mailbox portions in the plurality of memory addresses; perform a filter comparison including the mailbox portions of the stream of memory addresses and the at least one mailbox value; and load the memory with the multiple memory addresses based on the filter comparison [Kyrychynskyi – the corresponding “mailbox value” is the “hash value,” the the corresponding “filter operation” is the “search operation” -- In various embodiments, the request selector 300 is used to select a stored memory access request of the requests stored in the buffer 310 and identify one or more other stored requests storing a same field such as the field 316 holding a page address, a hash value or other. When determining whether any other stored request also includes a same value in the field 316, control logic (not shown) within the request selector 300 searches the requests. Rather than search the buffer 310 as it can store an appreciable number of entries, the request selector 300 searches a subset of the requests stored in the buffer 310 . The subset(s) are stored in the buffers 320A-320F (¶ 0045); When the oldest or highest ranking request is selected, the field 322 is inspected for the address, hash value or other that it stores . This value is used to search the other entries of the buffer 320A . For example, in various embodiments, the search logic 330 performs a CAM match operation using the identified value to find whether one or more other requests with entries in the buffer 320A also store the identified value ... (¶ 0050)]. As to claim 12, it recites substantially the same limitations as in claim 10, and is rejected for the same reasons set forth in the analysis of claim 10. Refer to “As to claim 10” presented earlier in this Office Action for details. Regarding claim 14, Kyrychynskyi in view of Yen & Roberts teaches The method of claim 13, further comprising: interpreting, by a memory device, the identified embedded data as an instruction to perform at least one operation [Roberts -- A program or system state, a thread identifier or process identifier, an instruction or program counter, and a function or task identifier are some examples of data that can be directly embedded in an address stream . To indirectly communicate the embedded data through the address stream, this data can include a pointer or reference to a mailbox or other portion of memory, which is allocated for the purpose of communicating data through the address stream (¶ 0011)] . Conclusion 7 . Claims 1-17, and 21-23 are rejected as explained above. 07-39 AIA 8 . THIS ACTION IS MADE FINAL . Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. 9 . Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHENG JEN TSAI whose telephone number is 571-272-4244. The examiner can normally be reached on Monday-Friday, 9-6. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Raginald Bragdon can be reached on 571-272-4204. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). /SHENG JEN TSAI/Primary Examiner, Art Unit 2139 Application/Control Number: 18/799,622 Page 2 Art Unit: 2139 Application/Control Number: 18/799,622 Page 3 Art Unit: 2139 Application/Control Number: 18/799,622 Page 4 Art Unit: 2139 Application/Control Number: 18/799,622 Page 5 Art Unit: 2139 Application/Control Number: 18/799,622 Page 6 Art Unit: 2139 Application/Control Number: 18/799,622 Page 7 Art Unit: 2139 Application/Control Number: 18/799,622 Page 8 Art Unit: 2139 Application/Control Number: 18/799,622 Page 9 Art Unit: 2139 Application/Control Number: 18/799,622 Page 10 Art Unit: 2139 Application/Control Number: 18/799,622 Page 11 Art Unit: 2139 Application/Control Number: 18/799,622 Page 12 Art Unit: 2139 Application/Control Number: 18/799,622 Page 13 Art Unit: 2139 Application/Control Number: 18/799,622 Page 14 Art Unit: 2139 Application/Control Number: 18/799,622 Page 15 Art Unit: 2139 Application/Control Number: 18/799,622 Page 16 Art Unit: 2139 Application/Control Number: 18/799,622 Page 17 Art Unit: 2139 Application/Control Number: 18/799,622 Page 18 Art Unit: 2139 Application/Control Number: 18/799,622 Page 19 Art Unit: 2139 Application/Control Number: 18/799,622 Page 20 Art Unit: 2139 Application/Control Number: 18/799,622 Page 21 Art Unit: 2139 Application/Control Number: 18/799,622 Page 22 Art Unit: 2139 Application/Control Number: 18/799,622 Page 23 Art Unit: 2139 Application/Control Number: 18/799,622 Page 24 Art Unit: 2139 Application/Control Number: 18/799,622 Page 25 Art Unit: 2139 Application/Control Number: 18/799,622 Page 26 Art Unit: 2139 Application/Control Number: 18/799,622 Page 27 Art Unit: 2139 Application/Control Number: 18/799,622 Page 28 Art Unit: 2139 Application/Control Number: 18/799,622 Page 29 Art Unit: 2139
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