Prosecution Insights
Last updated: September 17, 2026
Application No. 18/800,081

INPUT CIRCUIT FOR HIGH-POWER AMPLIFIER, APPARATUS, AND SYSTEM

Non-Final OA §103
Filed
Aug 11, 2024
Priority
Feb 25, 2022 — CN 202210178659.0 +1 more
Examiner
PERENY, TYLER J
Art Unit
Tech Center
Assignee
Innogration (Suzhou) Co. Ltd.
OA Round
1 (Non-Final)
95%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 95% — above average
95%
Career Allowance Rate
170 granted / 179 resolved
+35.0% vs TC avg
Moderate +6% lift
Without
With
+5.9%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 0m
Avg Prosecution
27 currently pending
Career history
203
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
55.7%
+15.7% vs TC avg
§102
19.2%
-20.8% vs TC avg
§112
22.5%
-17.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 179 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-2 & 9-10 are rejected under 35 U.S.C. 103 as being unpatentable over Jang et al. (US 2020/0162033 A1), hereinafter Jang, in view of Zhang (CN 111510077 A). Regarding claim 1, Jang discloses, in figure 3C & 9D, an input circuit for high-power amplifier (Para [0059], “multi-stage impedance matching network at the RF amplifier input”), disposed between an input terminal and a control terminal of the amplifier (left-most terminal and control terminal of M.sub.1), wherein the input circuit comprises an impedance matching network (MN) and a harmonic phase tuning network (LPMN), the impedance matching network is used for impedance matching (Para [0059], “impedance matching network MN”), the harmonic phase tuning network is used for adjusting a phase and an amplitude of a second harmonic impedance at a high-frequency end (Para [0065] & [0066], “broadband matching network LPMN provides high reflection at the second harmonic frequency band…FIG. 9D depicts the reflection coefficients magnitude of the LPMN and phase shifter…These graphs demonstrate lower frequency dispersion, with higher reflection magnitude”), and the impedance matching network and the harmonic phase tuning network work together to match fundamental impedance (Para [0059], “multi-stage impedance matching network”…works together to match fundamental impedance), but does not explicitly disclose the phase balancing network used for balancing a synthesized phase of multiple signals for an impedance matching network. However, Zhang discloses, in figure 2, the phase balancing network (phase equalization network PBN) used for balancing a synthesized phase of multiple signals for an impedance matching network (pg. 6, “the output end of the phase equalization network PBN is connected with the input end of the auxiliary transistor…realizing the balanced phase shift”…between amplification paths [i.e., multiple signals]). It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include the phase balancing network of Zhang in the input circuit of Jang, to achieve the benefit of forming an impedance matching multi-stage network capable of phase balancing between multiple signals (Zhang, pg. 6). Regarding claim 2, Jang in view of Zhang disclose the input circuit for high-power amplifier according to claim 1, and Jang continues to disclose, in figure 3B, wherein the impedance matching network (MN) comprises: a first capacitor connected to the input terminal (shunted capacitor coupled to the input terminal via L.sub.SH, phase shifter, and LPMN), the other end of the first capacitor being grounded (grounded capacitor); and a first inductor connected to the input terminal (inductor L.sub.SH connected to the input terminal via the phase shifter and LPMN), the other end of the first inductor being connected to an input terminal of the phase balancing network (other end of the inductor is connected to the phase shifter). Regarding claim 9, Jang in view of Zhang disclose the input circuit for high-power amplifier according to claim 1, and Jang continues to disclose, in figure 3B, a radio frequency power amplifier apparatus (Para [0059], “multi-stage impedance matching network at the RF amplifier input”), comprising the input circuit for high-power amplifier (multi-stage impedance matching network). Regarding claim 10, Jang in view of Zhang disclose the radio frequency power amplifier apparatus according to claim 9, and Jang continues to disclose, in figure 3B, a radio frequency power amplifier system (broadband RF amplifier), comprising the radio frequency power amplifier apparatus (Para [0002], “RF amplifiers are particularly important in wireless communication networks, such as for example in a base station providing wireless transmissions over a large geographic area. To communicate a greater volume and variety of content, e.g., video, wireless communications operate over increasingly broad frequency bands”). Allowable Subject Matter Claims 3-8 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. El-Rayis et al. (US 2019/0296709 A1) [Figure 4. Discloses impedance matching circuitry for adjusting an impedance match between a source impedance and a load impedance, the impedance matching circuitry comprising: tapered transmission line circuitry which comprises one or more tapered transmission lines coupled or couplable between the source impedance and the load impedance; and a controller) in communication with the tapered transmission line circuitry and configured to adjust one or more impedances of the tapered transmission line circuitry to thereby adjust an impedance match between the source impedance and the load impedance.] Kim et al. (US 2015/0008980 A1) [Figure 1. Discloses an apparatus of a power amplifier. The apparatus includes an input boosting circuit configured to match a second harmonic input signal using a harmonic control circuit of an input stage to maximize an efficiency and an output power, a die cell configured to receive and amplify an output signal of the input boosting circuit, and an output boosting circuit configured to receive an output signal of the die cell and to match a second harmonic output signal of the output signal of the die cell using a harmonic control circuit of an output stage to maximize the efficiency and the output power.] Any inquiry concerning this communication or earlier communications from the examiner should be directed to TYLER J PERENY whose telephone number is (571)272-4189. The examiner can normally be reached M-F 7:30-5. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Taelor Kim can be reached at (571) 270-7166. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /TYLER J PERENY/ Examiner, Art Unit 2836
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Prosecution Timeline

Aug 11, 2024
Application Filed
Sep 04, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
95%
Grant Probability
99%
With Interview (+5.9%)
2y 0m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 179 resolved cases by this examiner. Grant probability derived from career allowance rate.

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