DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim 1 is rejected under 35 U.S.C. 103 as being unpatentable over Suh et al., US 2013/00265518 (corresponding to US 8,592,232; listed in IDS filed on 08/12/2024).
In re Claim 1, Suh discloses a display apparatus, comprising: a substrate 51 extending along a first (horizontal) direction and having a first substrate electrode 1SE (Fig. A) and a second substrate electrode 2SE; and a plurality of light emitting sources (LES1, LES2) disposed on the substrate 51 and spaced apart from one another, wherein the light emitting source LES1 comprises: a light emitting structure 30 having an n-type semiconductor layer 25, an active layer 27, and a p-type semiconductor layer 29; a p-type electrode disposed 35b on the p-type semiconductor layer 29 and electrically connected to the p-type semiconductor layer 29; and an n-type electrode 35a disposed on the n-type semiconductor layer 25 and electrically connected to the n-type semiconductor layer 25, wherein the first substrate electrode 1SE extends from an upper surface of the substrate 51 facing the light emitting sources (LES1, LES2) to a lower surface thereof and is electrically connected to the p-type electrode 36b, the first substrate electrode 1SE including an upper portion 35b having a substantially flat top surface and disposed on the upper surface of the substrate 51 and a lower portion 37b disposed on the lower surface of the substrate 51, wherein the second substrate electrode 2SE extends from the upper surface of the substrate 51 to the lower surface thereof and is electrically connected to the n-type electrode 35a, the second substrate electrode 2SE including an upper portion 35a having a substantially flat top surface and disposed on the upper surface of the substrate 51 and a lower portion 37a disposed on the lower surface of the substrate 51, wherein the upper portion 35b of the first substrate electrode 1SE of a first light emitting source LES1 and the upper portion 35b of the second substrate electrode 2SE of a second light emitting source LES2 adjacent to the first light emitting source LES1 is spaced apart from each other (Figs. 1-10 and A; [0025 -0060]). Let’s note that Suh does not explicitly name the layer 25 as a n-type semiconductor layer and the layer 27 as a p-type semiconductor layer. It would have been obvious to one of ordinary skill in the semiconductor art at the time the invention was made to name the layer 25 as n-type layer since it was known in the art that the first type (electron) conductivity is n-type (See MPEP2144.I.)
PNG
media_image1.png
200
400
media_image1.png
Greyscale
Fig. A. Suh’s Fig. 3 annotated to show the details cite
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NIKOLAY K YUSHIN whose telephone number is (571)270-7885. The examiner can normally be reached Monday-Friday (7-7 PST).
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Yara B. Green can be reached at 5712703075. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/NIKOLAY K YUSHIN/Primary Examiner, Art Unit 2893
Prosecution Insights