Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Election/Restrictions
Applicant’s election without traverse of Invention I and Species A in the reply filed June 12, 2026 is acknowledged. Claims 3-4 and 7-9 drawn to the non-elected invention(s) have been withdrawn from examination for patentability.
Claim Objections
Claim 1 is objected to because of the following informalities: “including” in claim 1 should be changed to “including”.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-2 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US 2009/0002054 to Tsunoda et al. (“Tsunoda”).
With respect to claim 1, Tsunoda discloses in Fig. 18 a gate driver stage, comprising:
a first power transistor (e.g., Q5) including a first drain terminal and a first source terminal;
a second power transistor (e.g., Q7) including a second drain terminal and a second source terminal, wherein the first source terminal is electrically conductively connected to the second drain terminal and the first drain terminal is electrically conductively connected to (e.g., the drain of Q5 is coupled to VDD2 via Q1 and the source of Q5 is coupled to the drain of Q7 via R10) a first voltage terminal (e.g., VDD2),
wherein the second source terminal is electrically conductively connected to a second voltage terminal (e.g., the source of Q7 is coupled to ground which is coupled to the lower terminals of Fig. 18 circuit including the emitter of switching device 1), wherein the first voltage terminal (e.g., VDD2) has a first voltage value (e.g., VDD2) and the second voltage terminal (e.g., ground coupled to the lower terminals of Fig. 18 circuit including the emitter of switching device 1) has a second voltage value (e.g., ground), wherein the second voltage value (e.g., ground) is smaller than the first voltage value (VDD2 is higher than VDD1 which in turn is higher than ground per Para. 58);
a node (e.g., the node between Q5 and G) arranged between the first power transistor (e.g., Q5) and the second power transistor (e.g., Q7), and being electrically conductively connected to a third gate terminal (e.g., G) of a normally-off power transistor, wherein the third gate terminal (e.g., G) can be controlled via the node (e.g., the node between Q5 and G);
wherein the node (e.g., the node between Q5 and G) arranged between the first power transistor (e.g., Q5) is electrically conductively connected to (e.g., via R9) a third voltage terminal (e.g., VDD1), wherein the third voltage terminal (e.g., VDD1) has a third voltage value (e.g., VDD1) and the third voltage value (e.g., VDD1) is between the first voltage value and the second voltage value (e.g., VDD2 is higher than VDD1 which in turn is higher than ground per Para. 58).
With respect to claim 2, as to the feature that the third voltage value (e.g., VDD2) depends on a drain-source leakage current of the normally-off power transistor, such a feature is considered to be a recitation of the intended use of the claimed invention: a circuit or a controller to determine the value of VDD2 to depend on a drain-source leakage current of the normally-off power transistor (e.g., 1) is not positively recited as an element of the claim. A recitation of the intended use of the claimed invention must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claimed invention from the prior art. If the prior art structure is capable of performing the intended use, then it meets the claim. Here, the circuit in Fig. 18 of Tsunoda is capable of the recited use (e.g., receiving VDD1 determined to depend on a drain-source leakage current of the normally-off power transistor 1.).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Tsunoda.
With respect to claim 6, Tsunoda discloses in Fig. 18 a normally-off power transistor (e.g., insulated gate bipolar transistor IGBT 1) but fails to disclose that IGBT 1 may be replaced with a SiC MOSFET. However, it was notoriously well known at the time of the invention, however, that an IGBT may be replaced by a SiC MOSFET to obtain a faster speed and/or lower losses; an official notice of the foregoing fact is hereby taken. Thus, it would have been obvious to a person of ordinary skill in the art at the time of the invention to replace IGBT 1 in Fig. 18 of Tsunoda with a SIC MOSFET in light of the notoriously well-known teaching of replacing an IGBT with a SiC MOSFET because such a modification a faster speed and/or lower losses.
Allowable Subject Matter
Claim 5 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Jung KIM whose telephone number is (571)270-7964. The examiner can normally be reached on M-F from 9AM to 5:30PM.
If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Regis BETSCH, can be reached at (571)270-7101. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JUNG KIM/
Primary Examiner, Art Unit 2836
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