CTNF 18/806,104 CTNF 82560 DETAILED ACTION 1. This action is in response to the application filed on 8/15/24. Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia 2. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Claim Objections 07-29-01 AIA 3. Claim 1 is objected to because of the following informalities: Claim 1 recites “the boosted input voltage” should be replaced with “a boosted input voltage” . Appropriate correction is required. Claim Rejections - 35 USC § 112 07-30-02 AIA 34 (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. 07-34-01 5. Claims 2 and 7 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. 07-34-08 Regarding claims 2 and 7, the phrase "for example" (i.e.,) renders the claim indefinite because it is unclear whether the limitation(s) following the phrase are part of the claimed invention. See MPEP § 2173.05(d). Claims 3-4 and 8 are rejected due to their dependency of claim 2, Claim Rejections - 35 USC § 102 07-07-aia AIA 07-07 6. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 7. Claims 1 and 6 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yang (US 20110038180). Regarding claim 1 : Yang disclsoes a power conversion device (i.e. figures 1-10) comprising: a boost converter (i.e. converter between 65 and full bridge) ; an electric current resonant converter (i.e. full bridge, 10 and output circuit) connected to a stage subsequent to the boost converter (i.e. converter between 65 and full bridge) ; and a control circuit (i.e. 100) , wherein the boost converter (i.e. converter between 65 and full bridge) boosts an input voltage (i.e. voltage from 65) to designate the boosted input voltage (i.e. function of the boost circuit) as an output voltage (i.e. voltage from 55) and output the output voltage (i.e. voltage from 55) while charging a first output capacitor (i.e. 70) with the output voltage (i.e. voltage from 55) , wherein the control circuit controls (i.e. 100) the boost converter (i.e. converter between 65 and full bridge) on the basis of a voltage (i.e. VPFC, VP) detected by an output voltage detection circuit (i.e. circuit of 200) configured to detect a voltage (i.e. voltage of 70, corresponding to voltage VPFC that provide voltage VP) of the first output capacitor (i.e. 70) , wherein the control circuit (i.e. 100) sets the output voltage (i.e. voltage from 55) of the boost converter (i.e. converter between 65 and full bridge) to a first output voltage level (i.e. voltage level lower than threshold) or a second output voltage level (i.e. voltage level higher than threshold) in accordance with a voltage (i.e. voltage of Vin) detected by an input voltage detection circuit (i.e. 120, 110, 150, 160) configured to detect a voltage (i.e. voltage detect by 150, 120, 110, 160) corresponding to the input voltage (i.e. Vin) , causes the electric current resonant converter (i.e. full bridge, 10 and output circuit) to operate in a full-bridge mode (i.e. full bridge) as an operating mode (i.e. mode for full bridge) when the first output voltage level (i.e. voltage level lower than threshold) has been set (i.e. set by the controller) , and causes the electric current resonant converter to operate in a half-bridge mode (i.e. half bridge) as an operating mode (i.e. mode for half bridge) when the second output voltage level (i.e. voltage level higher than threshold) has been set (i.e. set by the controller) , wherein the output voltage detection circuit (i.e. circuit of 200) and the input voltage detection circuit (i.e. 120, 110, 150, 160) are a common circuit or separate circuits (i.e. see figure 2) , and wherein the first output voltage level (i.e. voltage level lower than threshold) or the second output voltage level (i.e. voltage level higher than threshold) is set (i.e. set by the controller) at a predetermined timing (i.e. set by the delay of 150) after the input voltage (i.e. Vin) is input and a set operating mode (i.e. full, half bridge mode and/or the mode of the power converter of figure 1) is maintained until a process (i.e. function of the controller that controls the boost circuit) of setting the first output voltage level (i.e. voltage level lower than threshold) or the second output voltage level (i.e. voltage level higher than threshold) is reset (i.e. ¶ 23-29) . Regarding claim 6 : Yang disclsoes (i.e. figures 1-10) the input voltage is a single- or three-phase alternating current (AC) voltage (i.e. VAC) , and wherein the boost converter is a power factor correction (PFC) converter (i.e. 60, 55, 50) configured to perform power factor improvement control (i.e. function of the PFC) . Claim Rejections - 35 USC § 103 07-20-aia AIA 8. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 9. Claims 2 is rejected under 35 U.S.C. 103 as being unpatentable over Yang (US 20110038180) in views of Reis et al. (US 20240405693). Regarding claim 2 : Yang disclsoes (i.e. figures 1-10) wherein the electric current resonant converter (i.e. full bridge, 10 and output circuit) includes a first leg (i.e. leg of 20, 25) in which a first switching element (i.e. 20) and a second switching element (i.e. 25) are connected in series; a second leg (i.e. leg of 30, 35) in which a third switching element (i.e. 30) and a fourth switching element (i.e. 35) are connected in series; a transformer (i.e. 10) having a primary winding and a secondary winding; a first resonant inductor (i.e. 15) ; a first resonant capacitor (i.e. 45) ; and a first rectification circuit (i.e. 81, 82) , wherein, in a primary circuit of the transformer (i.e. 10) , the first leg (i.e. leg of 20, 30) and the second leg (i.e. leg of 30, 35) are connected in parallel and both ends of the primary winding are connected to two connection points (i.e. points between 20, 25, and 30, 35) , i.e., a connection point between the first switching element (i.e. 20) and the second switching element (i.e. 25) and a connection point between the third switching element (i.e. 30) and the fourth switching element (i.e. 35) , via the first resonant inductor (i.e. 15) and the first resonant capacitor (i.e. 45) , wherein, in a secondary circuit of the transformer (i.e. 10) , both ends of the secondary winding are connected to an input end of the first rectification circuit (i.e. 81, 82) , and wherein, in the set operating mode (i.e. full, half bridge mode and/or the mode of the power converter of figure 1) , but does not specifically disclose the first switching element, the second switching element, the third switching element, and the fourth switching element operate at a fixed frequency without a control process of feeding back an output from the secondary circuit. Reis et al. disclose a power supply (i.e. figure 4) comprising the first switching element, the second switching element, the third switching element, and the fourth switching element (i.e. elements of 430) operate at a fixed frequency (i.e. ¶ 45) without a control process of feeding back an output from the secondary circuit (i.e. see configuration of figure 4, there is no feedback) . Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Yang’s invention with the power supply as disclose by Reis et al. to ensure the bulk capacitor voltage is maintained within limits at all operating conditions. 07-21-aia AIA 10. Claim s 3-4 are rejected under 35 U.S.C. 103 as being unpatentable over Yang (US 20110038180) in views of Reis et al. (US 20240405693) and further in views of Jia et al. (US 20220045619) . Regarding claim 3 : Yang discloses the limitation of the claim(s) as discussed above, but does not specifically disclose the first rectification circuit is a full-bridge rectification circuit, and wherein, in the secondary circuit, the input end of the first rectification circuit and both ends of the secondary winding are connected via a second resonant inductor and a second resonant capacitor. Jia et al. disclose a power supply (i.e. figure 3) comprising the first rectification circuit is a full-bridge rectification circuit (i.e. 32) , and wherein, in the secondary circuit, the input end of the first rectification circuit (i.e. 32) and both ends of the secondary winding are connected via a second resonant inductor (i.e. Lrs) and a second resonant capacitor (i.e. Crs) . Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Yang’s invention with the power supply as disclose by Jia et al. to enhance efficiency of the power supply. Regarding claim 4 : Yang discloses the limitation of the claim(s) as discussed above, but does not specifically disclose leakage inductance of the transformer is used as the first resonant inductor and the second resonant inductor. Jia et al. disclose a power supply (i.e. figure 3) comprising leakage inductance of the transformer is used as the first resonant inductor and the second resonant inductor (i.e. ¶ 38) . Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Yang’s invention with the power supply as disclose by Jia et al. to enhance efficiency of the power supply. 11. Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Yang (US 20110038180) in views of Reis et al. (US 20240405693) and Jia et al. (US 20220045619) further in views of Chen et al. (US 20200366215). Regarding claim 7 : Yang disclose the limitation of the claim(s) as discussed above, but does not specifically disclose the first rectification circuit includes a third leg in which a first rectification element and a second rectification element are connected in series; and a fourth leg in which a third rectification element and a fourth rectification element are connected in series, wherein the third leg and the fourth leg are connected in parallel and both ends of the secondary winding are connected to two connection points, i.e., a connection point between the first rectification element and the second rectification element and a connection point between the third rectification element and the fourth rectification element, wherein the first rectification circuit is operable as a double-voltage rectification circuit by short-circuiting any one target rectification element of the first rectification element, the second rectification element, the third rectification element, and the fourth rectification element with a first switch, and wherein the first switch is a semiconductor switch element or relay. Chen et al. disclose a power supply (i.e. figure 1) comprising the first rectification circuit includes a third leg in which a first rectification element (i.e. D1) and a second rectification element (i.e. D3) are connected in series; and a fourth leg in which a third rectification element (i.e. D2) and a fourth rectification element (i.e. D4) are connected in series, wherein the third leg (i.e. leg of D1, D3) and the fourth leg (i.e. leg of D2, D4) are connected in parallel and both ends of the secondary winding are connected to two connection points, i.e., a connection point between the first rectification element (i.e. DE) and the second rectification element (i.e. D3) and a connection point between the third rectification element (i.e. D2) and the fourth rectification element (i.e. D4) , wherein the first rectification circuit is operable as a double-voltage rectification circuit by short-circuiting (i.e. function of switch S) any one target rectification element (i.e. D1, D2, D3, or D4) of the first rectification element (i.e. D1) , the second rectification element (i.e. D3) , the third rectification element (i.e. D2) , and the fourth rectification element (i.e. D4) with a first switch, and wherein the first switch is a semiconductor switch (i.e. S) element or relay. Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Yang’s invention with the power supply as disclose by Chen et al. to provide a wide range of output voltages from a single power converter . 07-21-aia AIA 12. Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Yang (US 20110038180) in views of Makino et al. (US 20170353028) . Regarding claim 5 : Yang disclose the limitation of the claim(s) as discussed above, but does not specifically disclose an inrush current limit circuit is provided within a path along which the first output capacitor is charged, and wherein the control circuit decides a target boost voltage of the boost converter in accordance with a voltage detected by the input voltage detection circuit after an inrush current during activation is terminated and an inrush current limit of the inrush current limit circuit is canceled. Makino et al. disclose a power supply (i.e. figure 1) comprising an inrush current limit circuit (i.e. 11, 12) is provided within a path along which the first output capacitor (i.e. 24) is charged, and wherein the control circuit decides a target boost voltage (i.e. output voltage target) of the boost converter (i.e. 14) in accordance with a voltage detected by the input voltage detection circuit (i.e. circuit of 16) after an inrush current during activation is terminated (i.e. turn on/off switch 12) and an inrush current limit (i.e. current to 13) of the inrush current limit circuit (i.e. 11, 12) is canceled. Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Yang’s invention with the power supply as disclose by Makino et al., because it capable of enduring the inrush current and without being affected by an operating state of a booster circuit unit and fluctuations in an AC voltage . Allowable Subject Matter 12-151-08 AIA 07-43 12-51-08 13. Claim 8 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion 14. Any inquiry concerning this communication or earlier communications from the examiner should be directed to NGUYEN TRAN whose telephone number is (571)270-1269. The examiner can normally be reached Flex: M-F 8-7. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Monica Lewis can be reached at 571-272-1838. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Nguyen Tran/Primary Examiner, Art Unit 2838 Application/Control Number: 18/806,104 Page 2 Art Unit: 2838 Application/Control Number: 18/806,104 Page 3 Art Unit: 2838 Application/Control Number: 18/806,104 Page 4 Art Unit: 2838 Application/Control Number: 18/806,104 Page 5 Art Unit: 2838 Application/Control Number: 18/806,104 Page 6 Art Unit: 2838 Application/Control Number: 18/806,104 Page 7 Art Unit: 2838 Application/Control Number: 18/806,104 Page 8 Art Unit: 2838 Application/Control Number: 18/806,104 Page 9 Art Unit: 2838 Application/Control Number: 18/806,104 Page 10 Art Unit: 2838 Application/Control Number: 18/806,104 Page 11 Art Unit: 2838