Prosecution Insights
Last updated: October 02, 2026
Application No. 18/806,236

INTEGRATED CIRCUIT INCLUDING POWER GATING SWITCH

Non-Final OA §102§103
Filed
Aug 15, 2024
Priority
Sep 06, 2023 — RE 10-2023-0118551 +1 more
Examiner
NGUYEN, SOPHIA T
Art Unit
Tech Center
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
45%
Grant Probability
Moderate
1-2
OA Rounds
8m
Est. Remaining
59%
With Interview

Examiner Intelligence

Grants 45% of resolved cases
45%
Career Allowance Rate
236 granted / 528 resolved
-15.3% vs TC avg
Moderate +14% lift
Without
With
+14.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
71 currently pending
Career history
617
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
53.6%
+13.6% vs TC avg
§102
14.6%
-25.4% vs TC avg
§112
26.5%
-13.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 528 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of species 7, Fig. 14, Fig. 15 in the reply filed on 08/26/2026 is acknowledged. Accordingly, claims 5-7, 10-15 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species, there being no allowable generic or linking claim. Priority Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d) to foreign application KR10-2023-0197638 filed on 12/29/2023 and foreign application KR10-2023-0118551 filed on 09/06/2023. The foreign applications are not in English. The certified copies of the foreign priority applications KR10-2023-0197638 and KR10-2023-0118551 have been received. Filing Dates for the Claims — All Claims Not Entitled to Priority Date To be entitled to the filing date of the foreign priority application KR10-2023-0197638 that is not in English, an English translation of the non-English language foreign application KR10-2023-0197638 and a statement that the translation is accurate in accordance with 37 CFR 1.55 is required to perfect the claim for priority under 35 U.S.C. 119 (a)-(d). To be entitled to the filing date of the foreign priority application KR10-2023-0118551 that is not in English, an English translation of the non-English language foreign application KR10-2023-0118551 and a statement that the translation is accurate in accordance with 37 CFR 1.55 is required to perfect the claim for priority under 35 U.S.C. 119 (a)-(d). The foreign application must adequately support the claimed subject matter, meaning satisfy the written description and enablement requirements of 35 U.S.C. 112(a). See MPEP §§ 215 and 216. 37 C.F.R. 1.55(g)(3)(ii)-(iii). To demonstrate compliance with 35 U.S.C. 112(a), applicant should point to support for their claimed subject matter in their translations. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1-4, 8, 16-20 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Li et al. (US Pub. 20240186246). Li et al. discloses in paragraph [0034] “the first backside connecting power line 205 can be located at a lower metal line than the backside power line 110, or they can be at the same level.” Thus, in this rejection, the first backside connecting power line 205/300 will be located at the same level as the backside power line 110/305. Regarding claim 1, Li et al. discloses in Fig. 2, Fig. 3A- 3C, Fig. 4A-4C, Fig. 5A-5C, paragraph [0031]-[0044] an integrated circuit comprising: a backside wiring layer [110, 205, 300 and 305] on a backside of a substrate [105], the backside wiring layer [110, 205, 300 and 305] comprising a first backside pattern [110 or 305] and a second backside pattern [205 or 300] isolated from each other; and a power gating switch [header and/or footer] on a front side of the substrate [105], the power gating switch connected to the first [110 or 305] and second backside patterns [205 or 300], wherein the power gating switch [header and/or footer] comprises: a first source/drain region [130 or 325] connected to the first backside pattern [110 or 305], and configured to receive a first supply voltage from the first backside pattern [110 or 305][Fig. 2, Fig. 3A, Fig. 3C]; a gate line structure [160 or 340] configured to receive a power gating signal[Fig. 2, Fig. 4A, Fig. 4C]; and a second source/drain region [165 or 327] connected to the second backside pattern [205 or 300], and configured to receive a power signal from the first source/drain region [130 or 325] based on the power gating signal. Notes, the limitations “configured to receive a first supply voltage from the first backside pattern”, “configured to receive a power gating signal”, “configured to receive a power signal from the first source/drain region based on the power gating signal” direct to manner of operation of the device. "[A]pparatus claims cover what a device is, not what a device does." Hewlett-Packard Co. v. Bausch & Lomb Inc., 909 F.2d 1464, 1469, 15 USPQ2d 1525, 1528 (Fed. Cir. 1990) (emphasis in original). A claim containing a "recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus" if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987). MPEP 2114 (II). Further, a recitation of the intended use of the claimed invention must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claimed invention from the prior art. If the prior art structure is capable of performing the intended use, then it meets the claim. Regarding claims 2-3, 17-18, the limitations of claims 2-3 and 17-18 direct to manner of operation of the device. "[A]pparatus claims cover what a device is, not what a device does." Hewlett-Packard Co. v. Bausch & Lomb Inc., 909 F.2d 1464, 1469, 15 USPQ2d 1525, 1528 (Fed. Cir. 1990) (emphasis in original). A claim containing a "recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus" if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987). MPEP 2114 (II). Further, a recitation of the intended use of the claimed invention must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claimed invention from the prior art. If the prior art structure is capable of performing the intended use, then it meets the claim. In this case, Li et al. discloses all the structural limitations of the claim, thus, it meets the claim. Regarding claims 4 and 8, Li et al. discloses in Fig. 2, Fig. 3A, Fig. 3C, Fig. 5A, Fig. 5C a first backside contact [125 or 320] on the first backside pattern [110 or 305][Figs. 2, 3A, 3C]; and a second backside contact [190 or 322] on the second backside pattern [205 or 300][Figs. 2, 5A, Fig. 5C], wherein the first source/drain region [130 or 325] of the power gating switch is connected to the first backside pattern [110 or 305] through the first backside contact [125 or 320][Fig. 2, Fig. 3A, Fig. 3C], and wherein the second source/drain region [165 or 327] of the power gating switch is connected to the second backside pattern [205 or 300] through the second backside contact [190 or 322][Fig. 2, Fig. 5A, Fig. 5C]; wherein the first backside contact [125 or 320] passes through the substrate [105] in a vertical direction and is connected to the first source/drain region [130 or 325] of the power gating switch [Fig. 2, Fig. 3A, Fig. 3C], and the second backside contact [190 or 322] passes through the substrate [105] in the vertical direction and is connected to the second source/drain region [165 or 327] of the power gating switch [Fig. 2, Fig. 5A, Fig. 5C]. Regarding claim 16, Li et al. discloses in Fig. 2, Fig. 3A- 3C, Fig. 4A-4C, Fig. 5A-5C, paragraph [0031]-[0044] an integrated circuit comprising: a backside wiring layer [110, 205, 300 and 305] on a backside of a substrate [105], the backside wiring layer [110, 205, 300 and 305] comprising a first backside pattern [110 or 305] and a second backside pattern [205 or 300] isolated from each other; and a power gating switch [header and/or footer] on a front side of the substrate [105]; a first backside via layer [120, 315, 195, 317] connected to the power gating switch and comprising a first backside via [120 or 315] and a second backside via [195 or 317][Figs. 2, 3A, 3C, 5A, 5C]; and a second backside via layer [115, 310, 197, 312] between the backside wiring layer [110, 205, 300 and 305] and the first backside via layer [120, 315, 195, 317], the second backside via layer [115, 310, 197, 312] comprising a third backside via [115 or 310] on the first backside pattern [110 or 305] and a fourth backside via [197 or 312] on the second backside pattern [205 or 300], wherein the first backside via [120 or 315] is on the third backside via [115 or 310], and the second backside via [195 or 317] is on the fourth backside via [197 or 312], and wherein the power gating switch [header and/or footer] comprises: a first source/drain region [130 or 325] configured to receive a first supply voltage from the first backside pattern [110 or 305] through the third backside via [115 or 310] and the first backside via [120 or 315][Fig. 2, Fig. 3A, Fig. 3C]; a gate line structure [160 or 340] configured to receive a power gating signal[Fig. 2, Fig. 4A, Fig. 4C]; and a second source/drain region [165 or 327] connected to the second backside pattern [205 or 300] through the fourth backside via [197 or 312] and the second backside via [195 or 317], and configured to receive a power signal from the first source/drain region [130 or 325] based on the power gating signal. Notes, the limitations “configured to receive a first supply voltage from the first backside pattern through the third backside via and the first backside via”, “configured to receive a power gating signal”, “configured to receive a power signal from the first source/drain region based on the power gating signal” direct to manner of operation of the device. "[A]pparatus claims cover what a device is, not what a device does." Hewlett-Packard Co. v. Bausch & Lomb Inc., 909 F.2d 1464, 1469, 15 USPQ2d 1525, 1528 (Fed. Cir. 1990) (emphasis in original). A claim containing a "recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus" if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987). MPEP 2114 (II). Further, a recitation of the intended use of the claimed invention must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claimed invention from the prior art. If the prior art structure is capable of performing the intended use, then it meets the claim. Regarding claims 19-20, Li et al. discloses in Fig. 2, Fig. 3A- 3C, Fig. 5A-5C, paragraph [0031]-[0044] a first backside contact [125 or 320] on the first backside via [120 or 315][Fig. 2, 3A, 3C]; and a second backside contact [190 or 322] on the second backside via [195 or 317], wherein the first source/drain region [130 or 325] is connected to the first backside pattern [110 or 305] through the first backside contact [125 or 320], the first backside via [120 or 315], and the third backside via [115 or 310][Fig. 2, 3A, 3C], and wherein the second source/drain region [165 or 327] is connected to the second backside pattern [205 or 300] through the second backside contact [190 or 322], the second backside via [195 or 317], and the fourth backside via [197 or 312][Fig. 2, Fig. 5A, Fig. 5C]; wherein the first backside contact [125 or 320] passes through the substrate [105] in a vertical direction, and the second backside contact [190 or 322] passes through the substrate [105] in the vertical direction [Fig. 2, Fig. 3A, 3C, 5A, 5C]. Claims 1-4, 8 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Chu et al. (US Pub. 20240371728). Regarding claim 1, Chu et al. discloses in Fig. 3, Fig. 16A, Fig. 16B, Fig. 16C an integrated circuit comprising: a backside wiring layer [165-1, 165-2] on a backside of a substrate [150], the backside wiring layer [165-1, 165-2] comprising a first backside pattern [165-1] and a second backside pattern [165-2] isolated from each other; and a power gating switch on a front side of the substrate [150], the power gating switch connected to the first and second backside patterns [165-1, 165-2], wherein the power gating switch comprises: a first source/drain region [130-1] connected to the first backside pattern [165-1], and configured to receive a first supply voltage from the first backside pattern [165-1]; a gate line structure [132] configured to receive a power gating signal; and a second source/drain region [130-2] connected to the second backside pattern [165-2], and configured to receive a power signal from the first source/drain region [130-1] based on the power gating signal. Notes, the limitations “configured to receive a first supply voltage from the first backside pattern”, “configured to receive a power gating signal”, “configured to receive a power signal from the first source/drain region based on the power gating signal” direct to manner of operation of the device. "[A]pparatus claims cover what a device is, not what a device does." Hewlett-Packard Co. v. Bausch & Lomb Inc., 909 F.2d 1464, 1469, 15 USPQ2d 1525, 1528 (Fed. Cir. 1990) (emphasis in original). A claim containing a "recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus" if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987). MPEP 2114 (II). Further, a recitation of the intended use of the claimed invention must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claimed invention from the prior art. If the prior art structure is capable of performing the intended use, then it meets the claim. Regarding claims 2-3, the limitations of claims 2-3 direct to manner of operation of the device. "[A]pparatus claims cover what a device is, not what a device does." Hewlett-Packard Co. v. Bausch & Lomb Inc., 909 F.2d 1464, 1469, 15 USPQ2d 1525, 1528 (Fed. Cir. 1990) (emphasis in original). A claim containing a "recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus" if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987). MPEP 2114 (II). Further, a recitation of the intended use of the claimed invention must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claimed invention from the prior art. If the prior art structure is capable of performing the intended use, then it meets the claim. In this case, Chu et al. discloses all the structural limitations of the claim, thus, it meets the claim. Regarding claims 4 and 8, Chu et al. discloses in Fig. 16A-16C a first backside contact [160-1] on the first backside pattern [165-1]; and a second backside contact [160-2] on the second backside pattern [165-2], wherein the first source/drain region [130-1] of the power gating switch is connected to the first backside pattern [165-1] through the first backside contact [160-1], and wherein the second source/drain region [130-2] of the power gating switch is connected to the second backside pattern [165-2] through the second backside contact [160-2]; wherein the first backside contact [160-1] passes through the substrate [150] in a vertical direction and is connected to the first source/drain region [130-1] of the power gating switch, and the second backside contact [160-2] passes through the substrate [150] in the vertical direction and is connected to the second source/drain region [130-2] of the power gating switch. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Li et al. (US Pub. 20240186246) as applied to claim 1 above and further in view of Kuhn et al. (US Pub. 20070236850). Regarding claim 9, Li et al. fails to disclose wherein the power gating switch comprises a plurality of transistors connected in parallel. Kuhn et al. discloses in Fig. 3, Fig. 4, paragraphs [0010], [0011], [0048]-[0050] wherein the power gating switch comprises a plurality of transistors connected in parallel. It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to incorporate the teachings of Kuhn et al. into the method of Li et al. to include wherein the power gating switch comprises a plurality of transistors connected in parallel. The ordinary artisan would have been motivated to modify Li et al. in the above manner for the purpose of providing a leaf cell design that may be used for a power switch unit [paragraphs [0010], [0011], [0048]-[0050] of Kuhn et al.]. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SOPHIA T NGUYEN whose telephone number is (571)272-1686. The examiner can normally be reached 9:00am -5:00 pm, Monday-Friday. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, BRITT D HANLEY can be reached at (571)270-3042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SOPHIA T NGUYEN/ Primary Examiner, Art Unit 2893
Read full office action

Prosecution Timeline

Aug 15, 2024
Application Filed
Sep 18, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
45%
Grant Probability
59%
With Interview (+14.4%)
2y 9m (~8m remaining)
Median Time to Grant
Low
PTA Risk
Based on 528 resolved cases by this examiner. Grant probability derived from career allowance rate.

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