Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of Claims
2. This Office Action is issued in response to the Amendment filed on 05/13/2026.
Claims 1-10 are pending in this Office Action.
Claims 1 and 5-9 have been amended.
Claim 10 is new.
Response to Arguments
3. The previous title objection, claim objection and 35 U.S.C. §112(b) rejections have been withdrawn in response to title amendment and claim amendments.
Applicants’ arguments regarding 35 U.S.C. § 103 Claim Rejections are moot in view of new grounds of rejection.
Claim Rejections - 35 USC § 103
4. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
5. Claims 1,5, and 7-10 are rejected under 35 U.S.C. 103 as being unpatentable over Shigeki Kimura (US 20070192835 A1), hereinafter “Kimura” in view of Martin et al. (US 20200293636 A1), hereinafter “Martin.”
Regarding claim 1, Kimura discloses a multi-functional peripheral storing a software module used for controlling a printing unit (Figs.1 and 2 with associated text, image forming device 3 has at least one software module), comprising:
one or more memories storing instructions; and
one or more processors coupled to the one or more memories (Figs.1 and 2 with associated text, paragraphs [0049], [0056]-[0057]: Image Forming Device is a multifunction device comprising a CPU and a memory storing various programs), wherein execution of the instructions causes the one or more processors to function as:
a receiving unit configured to receive information indicating that the software module is to be updated (Fig.2 with associated text, paragraphs [0060] and [0070]: Process Accepting Function-receiving unit- receives program data-software module to be updated);
an updating [unit] configured to update the software module to be updated according to the received information (paragraphs [0024] and [0058]: updating program data);
[a determining unit configured to determine whether security information that is used by the multi-functional peripheral is authentic]; and
a controlling unit configured to, [after the determining unit determines that the security information that is used by the multi-functional peripheral is authentic], reject the updating before execution of the updating in a case where the updating is determined to be an unauthorized updating by using a hash value or permit the updating in a case where the updating is not determined to be the unauthorized updating by using the hash value (Fig.2 with associated text, Fig.3, S10 with associated text, paragraphs [0060]-[0062]: using hash to determine updating program data when authorized or not updating when unauthorized; determining function- controlling unit).
Kimura discloses different function units performing different functions (Fig.2 with associated text) and Kimura discloses updating function as presented above, but Kimura does not explicitly disclose an updating unit. However, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have different units performing specific functions of choice and to have a unit performing updating function and the motivation to do so would be to make a system easier to manage and repair which is an advantage of an integrated system.
Kimura does not explicitly disclose a determining unit configured to determine whether security information that is used by the multi-functional peripheral is authentic. However, determining authentication of whitelist of devices authorized for execution is known in the art and Martin’s teaching is an example (paragraphs [0036], [0060], and [0065]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine Kimura’s teaching of using hash value to reject or permit updating software module and different function units performing different functions with Martin’s teaching of determining authentication of whitelist of devices authorized for execution to have obvious and predictable result of a determining unit configured to determine whether security information that is used by the multi-functional peripheral is authentic and after the determining unit determines that the security information that is used by the multi-functional peripheral is authentic, reject the updating before execution of the updating in a case where the updating is determined to be an unauthorized updating by using a hash value or permit the updating in a case where the updating is not determined to be the unauthorized updating by using the hash value.
Regarding claim 5, Kimura and Martin disclose the multi-functional peripheral according to claim 1. Kimura further discloses wherein the printing unit prints a print job to a printing medium (Kimura, paragraph [0049]: image forming device is a multifunction device functioning as a copying machine, a printer, a fax machine, and a scanner in combination.)
Regarding claim 7, Kimura and Martin disclose the multi-functional peripheral according to claim 1, further comprising a scanner unit and the printing unit, and wherein the software modulesise used for controlling the scanner unit (Kimura, paragraphs [0005]-[0006]: programs are used for generating operating environments of multi-functional peripheral. Paragraph [0049]: image forming device is a multifunction device functioning as a copying machine, a printer, a fax machine, and a scanner in combination.)
Claims 8-9 claim similar subject matters to claim 1; therefore, claims 8-9 are rejected at least for the same reasons as claim 1.
Regarding claim 10, Kimura and Martin disclose the multi-functional peripheral according to claim 1, wherein the security information is a white list including information indicating the hash value (Martin, paragraphs [0036], [0060], and [0065]).
6. Claims 2-3 are rejected under 35 U.S.C. 103 as being unpatentable over Shigeki Kimura (US 20070192835 A1), hereinafter “Kimura”, in view of Martin et al. (US 20200293636 A1), hereinafter “Martin”, and in view of Lavi et al. (US 20190311115), hereinafter “Lavi.”
Regarding claim 2, Kimura and Martin disclose the multi-functional peripheral according to claim 1. Kimura discloses different function units performing different functions as presented in claim 1, but Kimura and Martin do not explicitly disclose a recording unit configured to record a log indicating that the updating is rejected. However, recording a log of prevented action when unauthorized updating is detected is known in the art and Lavi’s teaching is an example (paragraphs [0034], [0061], and [0111]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine Kimura and Martin’s teaching of different function units performing different functions with Lavi’s teaching of recording a log of prevented action when unauthorized updating is detected to have an obvious and predictable result of the multi-functional peripheral comprising a recording unit configured to record a log indicating that the updating is rejected.
Regarding claim 3, Kimura and Martin disclose the multi-functional peripheral according to claim 1, further comprising a notification unit configured to notify that the unauthorized updating is [blocked] in a case where the updating is rejected (Kimura, Fig.2 with associated text: Notifying Function. Fig.3, S4 with associated text, paragraphs [0015], [0018], [0084]: notifying management server of unauthorized updating and not performing updating). Kimura and Martin do not explicitly disclose notifying the unauthorized updating is blocked. However, alerting prevented action when unauthorized updating is detected is known in the art and Lavi’s teaching is an example (paragraphs [0061], [0063], and [0111]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine Kimura’s teaching of notifying function unit notifying management server of unauthorized updating and not performing updating with Lavi’s teaching of alerting prevented action when unauthorized updating is detected to have an obvious and predictable result of the multi-functional peripheral comprising a notification unit configured to notify that the unauthorized updating is blocked in a case where the updating is rejected.
7. Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Shigeki Kimura (US 20070192835 A1), hereinafter “Kimura”, in view of Martin et al. (US 20200293636 A1), hereinafter “Martin”, and in view of Ayuta Kawazu (US 20170249483 A1), hereinafter “Kawazu.”
Regarding claim 4, Kimura and Martin disclose the multi-functional peripheral according to claim 1. Kimura and Martin do not explicitly disclose the multi-functional peripheral further comprising a tamper-resistant security chip configured to store the hash value. However, storing hash values in tamper-resistant security chip is known in the art and Kawazu’s teaching is an example (paragraphs [0038], [0058], and [0069]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine Kimura and Martin’s teachings of using hash value to determine whether or not to update software module with Kawazu’s teaching of storing hash values in tamper-resistant security chip to have an obvious and predictable result of the multi-functional peripheral further comprising a tamper-resistant security chip configured to store the hash value and the motivation to do so would be to protect data as taught by Kawazu (paragraph [0038]).
8. Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Shigeki Kimura (US 20070192835 A1), hereinafter “Kimura”, in view of Martin et al. (US 20200293636 A1), hereinafter “Martin”, and in view of Iizuka et al. (US 20080130042 A1), hereinafter “Iszuka.”
Regarding claim 6, Kimura and Martin disclose the multi-functional peripheral according to claim 5. Kimura discloses a client PC connecting to the multi-functional peripheral and transmitting data to the multi-functional peripheral via network (Fig.1 with associated text and paragraphs [0048], [0060] and [0070]), but Kimura and Martin do not explicitly disclose wherein the print job is transmitted from a client PC via a network. However, printing job transmitted from a client PC via a network to a multi-functional peripheral is known in the art and Iizuka’s teaching is an example (Fig.1 with associated text).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine Kimura’s teaching of a printing system including a client PC connecting to the multi-functional peripheral and transmitting data to the multi-functional peripheral with Iizuka’s teaching of printing job transmitted from a client PC via a network to a multi-functional peripheral to have an obvious and predictable result of the multi-functional peripheral wherein the print job is transmitted from a client PC via a network.
Prior Art of Record
9. The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure: see attached PTO-892 Notice of References Cited.
Conclusion
10. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to THANH T. LE whose telephone number is (571)270-0279. The examiner can normally be reached on Monday-Friday 8:00 am - 4:30 pm EST.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Farid Homayounmehr can be reached on 571-272-3739. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/THANH T LE/Primary Examiner, Art Unit 2495
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