DETAILED ACTION
This office action is in response to the filling with the office dated 8/15/2024
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). The certified copy has been filed in parent Application No. CN 202410103091.5, filed on 24 Jan 2024.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 8-15-2024. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 3,7,10,16 and 19 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claims 3,7,10,16 and 19 discloses “current at at least” Should read as current at the least. As this causes confusion as to rather this is a new sampling point or the same sampling point which was disclosed in claim 1. Making this unclear and indefinite.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1,2 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over NISHIMURA et al. (Hereinafter, “Nishimura”) In the Patent Application Publication Number US 20180076656 A1. In view of JIANG (Hereinafter, “Jiang”) In the Patent Application Publication Number US 20200186038 A1.
Regarding independent claim 1, Nishimura, “A fault detection and processing method for an uninterruptible power supply, wherein the uninterruptible power supply comprises at least one uninterruptible power supply module,” ([0028], “Uninterruptible power supply device U1 further includes switches S1 to S8, an input filter 10, current detectors CD1 to CD6, ” Reads on “fault detection method” and “uninterruptible power supply, wherein the uninterruptible power supply comprises at least one uninterruptible power supply module.”)
“Each of the at least one uninterruptible power supply module comprises a rectification and discharge multiplexing circuit” ([0028], “power converters 21 to 23,” reads on “rectification.” More over [0046], “diodes D3 and D4 are connected in anti-parallel with transistors Q3 and Q4, respectively. Transistors Q3, Q4 and diodes D3, D4 form a bidirectional switch.” Reads on “multiplexing circuit.”)
“A battery, at least one mains switching device and at least one battery switching device,” ([0035], “Bidirectional chopper 24 includes five terminals T1 to T5. Terminals T1 to T3 receive DC voltages V1 to V3 generated by power converters 21 to 23, respectively. Switches S7 and S8 have respective first terminals connected to terminals T4 and T5, respectively, and respective second terminal connected to battery terminals TBP and TBN” reads on, “battery, at least one mains switching device and at least one battery switching device.”)
“A first end of each of the at least one mains switching device is coupled to a mains input terminal of the uninterruptible power supply,” ([0028], “Uninterruptible power supply device U1 further includes switches S1 to S8, an input filter 10, current detectors CD1 to CD6, power converters 21 to 23, a bidirectional chopper 24, and an output filter 30. Switches S1, S3, and S3 have respective first terminals connected to input terminals TIa, TIb, and TIc,” reads on, “A first end of each of the at least one mains switching device is coupled to a mains input terminal of the uninterruptible power supply.”)
“A second end of each of the at least one mains switching device is electrically connected to the rectification and discharge multiplexing circuit and a first end of a corresponding one of the at least one battery switching device, and a second end of the corresponding one of the at least one battery switching device is coupled to the battery; ([0035], “Bidirectional chopper 24 includes five terminals T1 to T5. Terminals T1 to T3 receive DC voltages V1 to V3 generated by power converters 21 to 23, respectively. Switches S7 and S8 have respective first terminals connected to terminals T4 and T5, respectively, and respective second terminal connected to battery terminals TBP and TBN,” reads on, “second end of each of the at least one mains switching device is electrically connected to the rectification and discharge multiplexing circuit and a first end of a corresponding one of the at least one battery switching device.” And “a second end of the corresponding one of the at least one battery switching device is coupled to the battery;”)
“The method comprises: obtaining a value of a current at at least one sampling point to-be-tested in the uninterruptible power supply, ([0031], “Current detectors CD1 to CD3 detect respective instantaneous values of current flowing from commercial AC power supply 1 to input terminals 21a to 23a of power converters 21 to 23,” reads on, “obtaining a value of a current at at least one sampling point to-be-tested in the uninterruptible power supply.”)
Nishimura is silent on, “Wherein the at least one sampling point to-be-tested is located in at least one fault circuit to-be-detected of the uninterruptible power supply, And each of the at least one fault circuit to-be-detected comprises at least one mains switching device and at least one battery switching device Determining that at least one switching device in the fault circuit to-be-detected is faulty in a case that the value of the current is within a fault current range corresponding to the at least one sampling point to-be-tested; And adjusting an operation state of the rectification and discharge multiplexing circuit based on the faulty switching device to cut off the fault circuit where the faulty switching device is located.”
Jiang teaches, “Wherein the at least one sampling point to-be-tested is located in at least one fault circuit to-be-detected of the uninterruptible power supply,” ([0022], “detection unit” moreover, [0023], “the inverter power supply system may detect a fault in each DC/DC module by using the detection unit or another logical control module built in each DC/DC module.” Reads on, “sampling point to-be-tested is located in at least one fault circuit to-be-detected of the uninterruptible power supply.”)
Jiang teaches, “and each of the at least one fault circuit to-be-detected comprises at least one mains switching device and at least one battery switching device.” ([0021], “detection unit detects that the short circuit component in the faulty module is the Q1 or the Q3, turn on the Q2 of the faulty module” “Reads on, “one fault circuit to-be-detected comprises at least one mains switching device and at least one battery switching device.”)
Jiang teaches, “determining that at least one switching device in the fault circuit to-be-detected is faulty in a case that the value of the current is within a fault current range corresponding to the at least one sampling point to-be-tested;” ([0044], “the inverter power supply system immediately turns off the Q1 and the Q3 of the DC/DC power converter 1 to stop the battery charging mode of the DC/DC power converter 1, so that the faulty C1 of the DC/DC power converter 1 does not affect the normal working mode of the DC/DC power converter 2. Further, the inverter power supply system may turn on the Q2 of the DC/DC power converter 1 after a preset time interval since the inverter power supply system turns off the Q1 and the Q3 of the DC/DC power converter 1, so that the DC/DC power converter 1 enters an abnormal working mode. After the Q2 of the DC/DC power converter 1 is turned on, the current output by the BAT+ terminal of the battery flows through the F1, the K1, the L1, and the Q2 of the DC/DC power converter 1, then through the L2, the K2, and the F2, and returns to the BAT− terminal of the battery. In this abnormal working mode, the current of the F1 and the F2 of the DC/DC power converter 1 is excessively high, and consequently the F1 and the F2 are blown. Therefore, the DC/DC power converter 1 is isolated from the DC/DC power converter 2 and another module connected in parallel,” reads on “Determining that at least one switching device in the fault circuit to-be-detected is faulty in a case that the value of the current is within a fault current range”)
Jiang teaches, “and adjusting an operation state of the rectification and discharge multiplexing circuit based on the faulty switching device to cut off the fault circuit where the faulty switching device is located.” ([0022], “the control unit is further configured to: when the detection unit detects that the short circuit component in the faulty module is the Q1 or the Q3, turn off any one or more of a K1, a K2, the Q1, the Q2, or the Q3 of the faulty module, to disconnect a parallel connection between the faulty module and the another DC/DC module.” Reads on, “And adjusting an operation state of the rectification and discharge multiplexing circuit based on the faulty switching device to cut off the fault circuit where the faulty switching device is located.”)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify Nishimura in view of Jiang which also teaches a detection unit but goes into further disclosure on its abilities to detect the location of the short circuit component within the module that has the fault. Combining this would result in the controller cutting off the switch corresponding with the faulty module which would yield the predictable result of protecting both the UPS and load equipment from further damage. By doing this combination will improve the functionality of Nishimura and increase its feasibility. This is a well-known method in the industry and is widely used for surge protection on valuable equipment. (KSR)
As per claim 2, Nishimura teaches, “The method according to claim 1, wherein the rectification and discharge multiplexing circuit comprises at least one set of rectification switching devices, ([0069], “FIG. 5 is a circuit block diagram showing a configuration of bidirectional chopper 24. In FIG. 5, bidirectional chopper 24 includes terminals T1 to T5, capacitors C11, C12, transistors Q11 to Q14, diodes D11 to D14, a normal mode reactor 50, and fuses F11, F12. Normal mode reactor 50 includes two coils 51, 52.” Moreover, [0042], “FIG. 3 is a circuit block diagram showing a configuration of power converter 21. In FIG. 3, power converter 21 includes an input terminal 21a, a converter 40, a DC positive bus L1, a DC negative bus L2, a DC neutral point bus L3, capacitors C1, C2, fuses F1 to F3, an inverter 41, and an output terminal 21b. Power converter 21 is controlled by a controller 42.” Reads on, “rectification and discharge multiplexing circuit comprises at least one set of rectification switching devices.”)
“Each set of the at least one set of rectification switching devices corresponds to each of the at least one mains switching device in one-to-one correspondence,” ([0029], “Input filter 10 includes reactors 11 to 13 and capacitors 14 to 16. Reactors 11 to 13 have respective first terminals connected to the second terminals of switches S1 to S3, respectively, and respective second terminals connected to input terminals 21a to 23a of power converters 21 to 23.” Reads on “Each set of the at least one set of rectification switching devices corresponds to each of the at least one mains switching device in one-to-one correspondence.”)
“A mains fuse is connected in series between the first end of each of the at least one mains switching device and the corresponding coupled mains input terminal,” ([0052], “ Fuses F1 to F3 have respective first terminals connected to buses L1 to L3, respectively. Respective second terminals of fuses F1, F2 are connected to terminals T1, T2 of bidirectional chopper 24, respectively, and a second terminal of fuse F3 is connected to neutral point NP. In this comparative example, neutral point NP is connected to output terminal TOd and also to terminal T3 of bidirectional chopper 24 through wire LN.”)
Nishimura is silent on, “and a battery fuse is connected in series between the second end of each of the at least one battery switching device and the corresponding coupled battery;”
Jiang teaches, “and a battery fuse is connected in series between the second end of each of the at least one battery switching device and the corresponding coupled battery;” ([0039], “In a battery discharging mode, the Q2 of the DC/DC power converter is turned on, and a current from the BAT+ terminal of the battery flows through the F1 and the K1 and arrives at the L1, and flows through the Q2, the L2, the K, and the F2 and arrives at the BAT− terminal.” Also see fig 2, reads on “And a battery fuse is connected in series between the second end of each of the at least one battery switching device and the corresponding coupled battery.”)
Adding a fuse in series in between the line and the load, will increase protection for the components of the circuit in the event of excess current flow blowing the fuse in order to prevent catastrophic damage from happening.
Therefore, It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify Nishimura in view of Jiang which teaches a fuse used in series as disclosed in the [Abstract], “turning on a Q2 in the faulty module, so that an F1 and an F2 of the faulty module are blown, to disconnect the faulty module from another DC/DC module.” The utilization of fuses in this manner are well-know and commonly used in protection circuits. (KSR)
Nishimura is silent on, “The adjusting of the operation state of the rectification and discharge multiplexing circuit based on the faulty switching device to cut off the fault circuit where the faulty switching device is located comprises: turning on a set of rectification switching devices corresponding to the battery switching device to cut off the mains fuse corresponding to the battery switching device, in a case that the uninterruptible power supply operates in a mains mode and it is determined that the battery switching device is faulty;”
Jiang teaches, “The adjusting of the operation state of the rectification and discharge multiplexing circuit based on the faulty switching device to cut off the fault circuit where the faulty switching device is located comprises: turning on a set of rectification switching devices corresponding to the battery switching device to cut off the mains fuse corresponding to the battery switching device, in a case that the uninterruptible power supply operates in a mains mode and it is determined that the battery switching device is faulty; ([0044], “Further, the inverter power supply system may turn on the Q2 of the DC/DC power converter 1 after a preset time interval since the inverter power supply system turns off the Q1 and the Q3 of the DC/DC power converter 1, so that the DC/DC power converter 1 enters an abnormal working mode. After the Q2 of the DC/DC power converter 1 is turned on, the current output by the BAT+ terminal of the battery flows through the F1, the K1, the L1, and the Q2 of the DC/DC power converter 1, then through the L2, the K2, and the F2, and returns to the BAT− terminal of the battery. In this abnormal working mode, the current of the F1 and the F2 of the DC/DC power converter 1 is excessively high, and consequently the F1 and the F2 are blown. Therefore, the DC/DC power converter 1 is isolated from the DC/DC power converter 2 and another module connected in parallel, to ensure normal working of the DC/DC power converter and the another module connected in parallel, and ensure a normal power supply state of the inverter power supply system.” Reads on, “to the mains switching device to cut off the battery fuse, in a case that the uninterruptible power supply operates in a battery mode and it is determined that the mains switching device is faulty.”)
Adding The abnormal working mode system of Jiang which is a widely used protection process to disable the faulty power supply circuit while simultaneously switching to another power supply circuit to prevent service interruption to the connected load. Would further enhance the protection mechanisms of Nishimura.
Therefore, It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify Nishimura in view of Jiang by incorporating the teachings of an abnormal working function which would improve efficiency and further improve surge protection capabilities. (KSR)
Nishimura teaches “wherein the set of rectification switching devices corresponding to the battery switching device is a set of rectification switching devices corresponding to the mains switching device electrically connected to the battery switching device; the mains fuse corresponding to the battery switching device is a mains fuse that is electrically connected to the mains switching device electrically connected to the battery switching device; and the at least one set of rectification switching devices corresponding to the mains switching device comprises the battery fuse that is electrically connected to the battery switching device electrically connected to the mains switching device,” ([0042], “ FIG. 3 is a circuit block diagram showing a configuration of power converter 21. In FIG. 3, power converter 21 includes an input terminal 21a, a converter 40, a DC positive bus L1, a DC negative bus L2, a DC neutral point bus L3, capacitors C1, C2, fuses F1 to F3, an inverter 41, and an output terminal 21b. Power converter 21 is controlled by a controller 42.”)
Reads on “a set of rectification switching devices corresponding to the mains switching device electrically connected to the battery switching device. And mains fuse that is electrically connected to the mains switching device electrically connected to the battery switching device; and the at least one set of rectification switching devices corresponding to the mains switching device comprises the battery fuse that is electrically connected to the battery switching device electrically connected to the mains switching device.”)
Nishimura is silent on, “and a battery fuse that is electrically connected to other battery switching device which is closed simultaneously with the battery switching device in the battery mode.”
Jiang teaches, “and a battery fuse that is electrically connected to other battery switching device which is closed simultaneously with the battery switching device in the battery mode.” ([0049], “so that the F1 and the F2 of the DC/DC power converter 1 are blown, to disconnect the DC/DC power converter 1” reads on, “a battery fuse that is electrically connected to other battery switching device which is closed simultaneously with the battery switching device in the battery mode.”)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify Nishimura in view of Jiang to implement the teachings of an abnormal working mode which opens a fuse to turn off power to the defective converter circuit. As mentioned in [0045], “In this abnormal working mode, the current of the F1 and the F2 of the DC/DC power converter 1 is excessively high, and consequently the F1 and the F2 are blown. Therefore, the DC/DC power converter 1 is isolated from the DC/DC power converter 2 and another module connected in parallel, to ensure normal working of the DC/DC power converter and the another module connected in parallel, ensure the normal power supply state of the inverter power supply system, and improve power supply stability and applicability of the inverter power supply system.” Combining this would yield the predictable result of protecting the equipment from major damage in the event of a short circuit and to keep it operational with a constant flow of energy giving maintenance staff time to fix the defect, doing so would eliminate any down time.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 3-18 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Nishimura ‘656
As per claim 3, Nishimura teaches, “The method according to claim 1, wherein the rectification and discharge multiplexing circuit comprises at least one rectification and discharge multiplexing unit,” ([0037], “bidirectional chopper 24 steps down DC voltage VDC (=V1−V2) generated by power converters 21 to 23 to supply the resultant voltage to battery 3 and thereby charge battery 3. During an outage, bidirectional chopper 24 steps up terminal-to-terminal voltage VB of battery 3 to generate DC voltage VDC, and supplies DC voltage VDC to power converters 21 to 23 to discharge battery 3.” Reads on, “the rectification and discharge multiplexing circuit comprises at least one rectification and discharge multiplexing unit,”)
“and the mains input terminal comprises three-phase mains terminal; ([0025], “Input terminals TIa, TIb, TIc receive three-phase AC voltages VU, VV, VW at the commercial frequency, respectively, from commercial AC power supply 1.” Reads on, “and the mains input terminal comprises three-phase mains terminal.”)
“Each of the at least one rectification and discharge multiplexing unit has three input terminals,” ([0034], “power converters 21 to 23 convert three-phase AC voltages VU, VV, VW which are supplied from commercial AC power supply 1 to input terminals 21a to 23a into DC voltages V1 to V3, and convert these DC voltages V1 to V3 into three-phase AC voltages V4a to V4c to output the AC voltages to output terminals 21b to 23b.” Reads on, “Each of the at least one rectification and discharge multiplexing unit has three input terminals.”)
PNG
media_image1.png
547
795
media_image1.png
Greyscale
“Each of the three input terminals is electrically connected to a second end of a mains switching device among three corresponding mains switching devices respectively, and a first end of the mains switching device among the three corresponding mains switching devices is coupled to a corresponding mains terminal of the three-phase mains terminal;” ([0028], “ Uninterruptible power supply device U1 further includes switches S1 to S8, an input filter 10, current detectors CD1 to CD6, power converters 21 to 23, a bidirectional chopper 24, and an output filter 30. Switches S1, S3, and S3 have respective first terminals connected to input terminals TIa, TIb, and TIc, respectively, and respective second terminals connected to input filter 10. During a normal condition, switches S1 to S3 are ON. When maintenance of uninterruptible power supply device U1 is to be performed, for example, switches S1 to S3 are made OFF.” Also see Fig 2. Reads on, “three input terminals is electrically connected to a second end of a mains switching device among three corresponding mains switching devices respectively, and a first end of the mains switching device among the three corresponding mains switching devices is coupled to a corresponding mains terminal of the three-phase mains terminal.”)
“and the obtaining of the value of the current at at least one sampling point to-be-tested in the uninterruptible power supply comprises obtaining a value of a current at a first end of a mains switching device to-be-tested.” ([0031], “Current detectors CD1 to CD3 detect respective instantaneous values of current flowing from commercial AC power supply 1 to input terminals 21a to 23a of power converters 21 to 23, and output signals indicative of the detected values to a controller (not shown).” Reads on, “obtaining of the value of the current at at least one sampling point to-be-tested in the uninterruptible power supply comprises obtaining a value of a current at a first end of a mains switching device to-be-tested.”)
As per claim 4, Nishimura teaches, “The method according to claim 3, wherein the obtaining of the value of the current at the first end of the mains switching device to-be-tested comprises: for each of the at least one rectification and discharge multiplexing unit, obtaining a value of a current at the first end of the mains switching device to-be-tested among the three corresponding mains switching devices.” ([0031], “Current detectors CD1 to CD3 detect respective instantaneous values of current flowing from commercial AC power supply 1 to input terminals 21a to 23a of power converters 21 to 23, and output signals indicative of the detected values to a controller (not shown).” Moreover, [0038], “Current detectors CD4 to CD6 detect respective instantaneous values of output current from power converters 21 to 23. The values detected by current detectors CD4 to CD6 are supplied to the controller (not shown).” Reads on, “The method according to claim 3, wherein the obtaining of the value of the current at the first end of the mains switching device to-be-tested comprises: for each of the at least one rectification and discharge multiplexing unit, obtaining a value of a current at the first end of the mains switching device to-be-tested among the three corresponding mains switching devices.”)
As per claim 5, Nishimura teaches “The method according to claim 4, wherein the determining that at least one switching device in the fault circuit to-be-detected is faulty in a case that the value of the current is within the fault current range corresponding to the at least one sampling point to-be-tested comprises:” ([0092]), “it is supposed that transistor Q12 of bidirectional chopper 24 in uninterruptible power supply device U1 fails to be short-circuited.”Reads on, “least one switching device in the fault circuit to-be-detected is faulty.”
“determining that the battery switching device electrically connected to the mains switching device is faulty, in a case that the uninterruptible power supply operates in the mains mode and an absolute value of the value of the current at the first end of the mains switching device to-be-tested is greater than a first predetermined current value; and determining that the mains switching device is faulty, in a case that the uninterruptible power supply operates in the battery mode and an absolute value of the value of the current at the first end of the mains switching device to-be-tested is greater than a second predetermined current value.” ([0089], “During an outage in which commercial AC power supply 1 stops supply of three-phase AC power, operation of respective converters 40 of power converters 21 to 23 are stopped, and DC power of battery 3 is supplied to respective inverters 41 of power converters 21 to 23 through switches S7, S8 and bidirectional chopper 24. The DC power is then converted by respective inverters 41 of power converters 21 to 23 into three-phase AC power at the commercial frequency.” Moreover, [0090], “Three-phase AC voltages V4a to V4c generated by inverters 41 of power converters 21 to 23 are converted by output filter 30 into sinusoidal three-phase AC voltages VR, VS, VT and supplied to load 2 through switches S4 to S6. Further, DC voltage V3 on DC neutral-point bus L3 of power converters 21 to 23 is supplied as neutral-point voltage VN to load 2. Load 2 is driven by three-phase AC voltages VR, VS, VT and neutral-point voltage VN, namely the AC power supplied through the three-phase four-wire system.” Furthermore, [0091],” Thus, even when an outage occurs, operation of load 2 is continued as long as battery 3 stores DC power. When supply of AC power from commercial AC power supply 1 is restarted, operation of converters 40 of power converters 21 to 23 is restarted. In each of power converters 21 to 23, converter 40 generates DC power, and the DC power is supplied to battery 3 through bidirectional chopper 24 and switches S7, S8, and also supplied to inverter 41. Thus, the original condition is recovered. The configuration and operation of each of the other uninterruptible power supply devices U2 to UN are identical to those of uninterruptible power supply device U1, and therefore, the description thereof is not repeated.” Reads on, “determining that the battery switching device electrically connected to the mains switching device is faulty, in a case that the uninterruptible power supply operates in the mains mode and an absolute value of the value of the current at the first end of the mains switching device to-be-tested is greater than a first predetermined current value; and determining that the mains switching device is faulty, in a case that the uninterruptible power supply operates in the battery mode and an absolute value of the value of the current at the first end of the mains switching device to-be-tested is greater than a second predetermined current value.”)
As per claim 6, Nishimura teaches, “The method according to claim 3, wherein the obtaining of the value of the current at the first end of the mains switching device to-be-tested comprises: obtaining values of currents at first ends of at least one set of mains switching devices to-be-tested, in a case that the rectification and discharge multiplexing circuit comprises at least two rectification and discharge multiplexing units; wherein each set of the at least one set of mains switching devices comprises all the mains switching devices coupled to a same phase terminal of the three-phase mains terminal.” ([0031], “Current detectors CD1 to CD3 detect respective instantaneous values of current flowing from commercial AC power supply 1 to input terminals 21a to 23a of power converters 21 to 23, and output signals indicative of the detected values to a controller (not shown). The controller (not shown) controls power converters 21 to 23 so that respective phases of AC voltages VU, VV, VW match the phases of the current detected by current detectors CD1 to CD3, specifically the power factor is 1.0.” Moreover, [0038], “Current detectors CD4 to CD6 detect respective instantaneous values of output current from power converters 21 to 23. The values detected by current detectors CD4 to CD6 are supplied to the controller (not shown). The controller (not shown) communicates with other uninterruptible power supply devices U2 to UN and controls power converters 21 to 23 based on the values detected by current detectors CD4 to CD6, so that the load current is equally supplied from uninterruptible power supply devices U1 to UN.” Reads on, “wherein the obtaining of the value of the current at the first end of the mains switching device to-be-tested comprises: obtaining values of currents at first ends of at least one set of mains switching devices to-be-tested, in a case that the rectification and discharge multiplexing circuit comprises at least two rectification and discharge multiplexing units; wherein each set of the at least one set of mains switching devices comprises all the mains switching devices coupled to a same phase terminal of the three-phase mains terminal.”)
As per claim 7, Nishimura teaches, “The method according to claim 6, wherein the determining that at least one switching device in the fault circuit to-be-detected is faulty in a case that the value of the current is within the fault current range corresponding to the at least one sampling point to-be-tested comprises: for each set of the at least one set of mains switching devices, obtaining a minimum value among absolute values of values of currents at each mains switching device of the set of mains switching devices; in a case that the uninterruptible power supply operates in the mains mode and a difference between an absolute value of the value of the current at at least one mains switching device and the minimum value is greater than a first predetermined difference, (See explanation of claim 6)
determining that a battery switching device electrically connected to the at least one mains switching device is faulty; and in a case that the uninterruptible power supply operates in the battery mode and a difference between an absolute value of the value of the current at at least one mains switching device and the minimum value is greater than a second predetermined difference, determining that the at least one mains switching device is faulty.” ([0036], “During a normal condition in which commercial AC power supply 1 supplies three-phase AC power, bidirectional chopper 24 stores, in battery 3, DC power generated by power converters 21 to 23. During an outage in which supply of the three-phase AC power from commercial AC power supply 1 is stopped, bidirectional chopper 24 supplies the DC power of battery 3 to power converters 21 to 23.” Moreover, [0037], “Specifically, during a normal condition, bidirectional chopper 24 steps down DC voltage VDC (=V1−V2) generated by power converters 21 to 23 to supply the resultant voltage to battery 3 and thereby charge battery 3. During an outage, bidirectional chopper 24 steps up terminal-to-terminal voltage VB of battery 3 to generate DC voltage VDC, and supplies DC voltage VDC to power converters 21 to 23 to discharge battery 3.” Furthermore, [0038], “Current detectors CD4 to CD6 detect respective instantaneous values of output current from power converters 21 to 23. The values detected by current detectors CD4 to CD6 are supplied to the controller (not shown). The controller (not shown) communicates with other uninterruptible power supply devices U2 to UN and controls power converters 21 to 23 based on the values detected by current detectors CD4 to CD6, so that the load current is equally supplied from uninterruptible power supply devices U1 to UN.”
As per claim 8, Nishimura teaches, “The method according to claim 3, wherein the obtaining of the value of the current at the first end of the mains switching device to-be-tested comprises: obtaining a value of a current at the corresponding mains terminal of the three-phase mains terminal coupled to the first end of the mains switching device to-be-tested.” ([0031], “Current detectors CD1 to CD3 detect respective instantaneous values of current flowing from commercial AC power supply 1 to input terminals 21a to 23a of power converters 21 to 23, and output signals indicative of the detected values to a controller (not shown). The controller (not shown) controls power converters 21 to 23 so that respective phases of AC voltages VU, VV, VW match the phases of the current detected by current detectors CD1 to CD3, specifically the power factor is 1.0.”)
As per claim 9, Nishimura teaches, “The method according to claim 8, wherein the determining that at least one switching device in the fault circuit to-be-detected is faulty in a case that the value of the current is within the fault current range corresponding to the at least one sampling point to-be-tested comprises: determining that at least one battery switching device corresponding to the corresponding mains terminal of the three-phase mains terminal is faulty in a case that the uninterruptible power supply operates in the mains mode and an absolute value of the value of the current at the corresponding mains terminal of the three-phase mains terminal is greater than a third predetermined current value, wherein the at least one battery switching device corresponding to the corresponding mains terminal of the three-phase mains terminal is electrically connected to the mains switching device coupled to the corresponding mains terminal of the three-phase mains terminal; and determining that at least one mains switching device coupled to the corresponding mains terminal of the three-phase mains terminal is faulty in a case that the uninterruptible power supply operates in the battery mode and the absolute value of the value of the current at the corresponding mains terminal of the three-phase mains terminal is greater than a fourth predetermined current value.”
([0112], “FIG. 9 is a flowchart showing an operation of controller 63 shown in FIGS. 7 and 8 in a discharging mode. In FIG. 9, controller 63 uses voltage detectors 61, 62 to detect terminal-to-terminal voltages V11, V12 of capacitors C11, C12 in step ST1. In step ST2, controller 63 determines whether or not the absolute value |VDCT-VDC| of the difference between target voltage VDCT and DC voltage VDC=V11+V12 is larger than threshold value Vα. When |VDCT-VDC|>Vα does not hold (i.e., VDC≈VDCT), controller 63 returns to step ST1. When |VDCT-VDC|>Vα holds (i.e., VDC≠VDCT), controller 63 proceeds to step ST3. Vα is set to a value that is sufficiently smaller than VDCT and VDC.”
[0113], “In step ST3, controller 63 determines whether or not VDC<VDCT holds. When VDC<VDCT holds, controller 63 proceeds to step ST4. When VDC<VDCT does not hold, controller 63 proceeds to step ST5. In step ST4, controller 63 increases duty ratio D(φ12) and duty ratio D(φ13) of PWM signals φ12 and φ13. Accordingly, the ON period per cycle of each of transistors Q12 and Q13 is increased and DC voltage VDC is increased to approach target voltage VDCT. In step ST5, controller 63 decreases duty ratio D(φ12) and duty ratio D(φ13) of PWM signals φ12 and φ13. Accordingly, the ON period per cycle of each of transistors Q12 and Q13 is decreased and DC voltage VDC is decreased to approach target voltage VDCT.” [0114], “Subsequently, in step ST6, controller 63 determines whether or not the absolute value |V11-V12| of the difference between the detected values of voltages V11 and V12 is larger than threshold value Vβ. When |V11-V12|>Vβ does not hold (i.e., V11≈V12), controller 63 returns to step ST1. When |V11-V12|>Vβ holds (i.e., V11≠V12), controller 63 proceeds to step ST7. Vβ is set to a value sufficiently smaller than V11 and V12.” [0115], “In step ST7, controller 63 determines whether or not V11<V12 holds. When V11<V12 holds, controller 63 proceeds to step ST8. When V11<V12 does not hold, controller 63 proceeds to step ST9. In step ST8, controller 63 decreases duty ratio D(φ12) of PWM signal φ12 and increases duty ratio D(φ13) of PWM signal φ13 and returns to step ST1. Accordingly, the ON period per cycle of transistor Q12 decreases and the ON period per cycle of transistor Q13 increases, so that voltage V11 increases and voltage V12 decreases and the difference between voltages V11 and V12 is reduced. [0116] In step ST9, controller 63 increases duty ratio D(φ12) of PWM signal φ12 and decreases duty ratio D(φ13) of PWM signal φ13 and returns to step ST1. Accordingly, the ON period per cycle of transistor Q12 increases and the ON period per cycle of transistor Q13 decreases, so that voltage V11 decreases and voltage V12 increases and the difference between voltages V11 and V12 is reduced. Steps ST1 to ST5 can be repeated to allow VDC VDCT and V11 V12 to hold.”
[0117], “In steps ST4, ST5, duty ratios D(φ12), D(φ13) of PWM signals φ12, φ13 may be increased or decreased by a certain value, or the value by which duty ratios D(φ12), D(φ13) of PWM signals φ12, φ13 is increased or decreased may be changed depending on the difference between VDCT and VDC.”
[0118], “Likewise, in steps ST8, ST9, duty ratios D(φ12), D(φ13) of PWM signals φ12, φ13 may be increased or decreased by a certain value, or the value by which duty ratios D(φ12), D(φ13) of PWM signals φ12, φ13 is increased or decreased may be changed depending on the difference between V11 and V12.” Reads on, “The method according to claim 8, wherein the determining that at least one switching device in the fault circuit to-be-detected is faulty in a case that the value of the current is within the fault current range corresponding to the at least one sampling point to-be-tested comprises: determining that at least one battery switching device corresponding to the corresponding mains terminal of the three-phase mains terminal is faulty in a case that the uninterruptible power supply operates in the mains mode and an absolute value of the value of the current at the corresponding mains terminal of the three-phase mains terminal is greater than a third predetermined current value, wherein the at least one battery switching device corresponding to the corresponding mains terminal of the three-phase mains terminal is electrically connected to the mains switching device coupled to the corresponding mains terminal of the three-phase mains terminal; and determining that at least one mains switching device coupled to the corresponding mains terminal of the three-phase mains terminal is faulty in a case that the uninterruptible power supply operates in the battery mode and the absolute value of the value of the current at the corresponding mains terminal of the three-phase mains terminal is greater than a fourth predetermined current value.”)
As per claim 10, Nishimura teaches, “The method according to claim 1, wherein the rectification and discharge multiplexing circuit comprises at least one rectification and discharge multiplexing unit, each of the at least one rectification and discharge multiplexing unit has three input terminals, each of the three input terminals is electrically connected to a first end of three corresponding battery switching devices respectively, and a second end of the three corresponding battery switching devices is electrically connected to a positive electrode or a negative electrode of the battery;” ([0035], “Bidirectional chopper 24 includes five terminals T1 to T5. Terminals T1 to T3 receive DC voltages V1 to V3 generated by power converters 21 to 23, respectively. Switches S7 and S8 have respective first terminals connected to terminals T4 and T5, respectively, and respective second terminal connected to battery terminals TBP and TBN, respectively. Battery terminals TBP and TBN are connected to the positive electrode and the negative electrode of battery 3, respectively. During a normal condition, switches S7 and S8 are ON. When maintenance of uninterruptible power supply device U1 or battery 3 is to be performed, for example, switches S7 and S8 are made OFF.” Reads on, “The method according to claim 1, wherein the rectification and discharge multiplexing circuit comprises at least one rectification and discharge multiplexing unit, each of the at least one rectification and discharge multiplexing unit has three input terminals, each of the three input terminals is electrically connected to a first end of three corresponding battery switching devices respectively, and a second end of the three corresponding battery switching devices is electrically connected to a positive electrode or a negative electrode of the battery”)
“and the obtaining of the value of the current at at least one sampling point to-be-tested in the uninterruptible power supply comprises obtaining a value of a current at the second end of a battery switching device to-be-tested.” ([0031], “Current detectors CD1 to CD3 detect respective instantaneous values of current flowing from commercial AC power supply 1 to input terminals 21a to 23a of power converters 21 to 23, and output signals indicative of the detected values to a controller ” Moreover, ([0038], “Current detectors CD4 to CD6 detect respective instantaneous values of output current from power converters 21 to 23. The values detected by current detectors CD4 to CD6 are supplied to the controller (not shown).” Reads on “and the obtaining of the value of the current at at least one sampling point to-be-tested in the uninterruptible power supply comprises obtaining a value of a current at the second end of a battery switching device to-be-tested.”)
As per claim 11, Nishimura teaches, “The method according to claim 10, wherein the obtaining of the value of the current at the second end of the battery switching device to-be-tested comprises: for each of the at least one rectification and discharge multiplexing unit, obtaining a value of a current at the second end of the battery switching device to-be-tested among the three corresponding battery switching devices.” ([0038], “Current detectors CD4 to CD6 detect respective instantaneous values of output current from power converters 21 to 23. The values detected by current detectors CD4 to CD6 are supplied to the controller (not shown). The controller (not shown) communicates with other uninterruptible power supply devices U2 to UN and controls power converters 21 to 23 based on the values detected by current detectors CD4 to CD6, so that the load current is equally supplied from uninterruptible power supply devices U1 to UN.” Reads on, “The method according to claim 10, wherein the obtaining of the value of the current at the second end of the battery switching device to-be-tested comprises: for each of the at least one rectification and discharge multiplexing unit, obtaining a value of a current at the second end of the battery switching device to-be-tested among the three corresponding battery switching devices.”)
As per claim 12, Nishimura teaches, “The method according to claim 11, wherein the determining that at least one switching device in the fault circuit to-be-detected is faulty in a case that the value of the current is within the fault current range corresponding to the at least one sampling point to-be-tested comprises: determining that the battery switching device is faulty, in a case that the uninterruptible power supply operates in the mains mode and an absolute value of the value of the current at the second end of the battery switching device to-be-tested is greater than a fifth predetermined current value; and determining that the mains switching device electrically connected to the battery switching device is faulty, in a case that the uninterruptible power supply operates in the battery mode and an absolute value of the value of the current at the second end of the battery switching device to-be-tested is greater than a sixth predetermined current value.” ([0076], “At this time, the duty ratio of PWM signals φ11, φ14 is controlled so that terminal-to-terminal voltage VB of battery 3 is equal to a predetermined target voltage VBT.” Moreover, [0112], “FIG. 9 is a flowchart showing an operation of controller 63 shown in FIGS. 7 and 8 in a discharging mode. In FIG. 9, controller 63 uses voltage detectors 61, 62 to detect terminal-to-terminal voltages V11, V12 of capacitors C11, C12 in step ST1. In step ST2, controller 63 determines whether or not the absolute value |VDCT-VDC| of the difference between target voltage VDCT and DC voltage VDC=V11+V12 is larger than threshold value Vα. When |VDCT-VDC|>Vα does not hold (i.e., VDC≈VDCT), controller 63 returns to step ST1. When |VDCT-VDC|>Vα holds (i.e., VDC≠VDCT), controller 63 proceeds to step ST3. Vα is set to a value that is sufficiently smaller than VDCT and VDC”) Examiner notes that even though this is reading on voltage values, it is well known that the two have a direct relationship in terms of value.” Reads on, “The method according to claim 11, wherein the determining that at least one switching device in the fault circuit to-be-detected is faulty in a case that the value of the current is within the fault current range corresponding to the at least one sampling point to-be-tested comprises: determining that the battery switching device is faulty, in a case that the uninterruptible power supply operates in the mains mode and an absolute value of the value of the current at the second end of the battery switching device to-be-tested is greater than a fifth predetermined current value; and determining that the mains switching device electrically connected to the battery switching device is faulty, in a case that the uninterruptible power supply operates in the battery mode and an absolute value of the value of the current at the second end of the battery switching device to-be-tested is greater than a sixth predetermined current value.”
As per claim 13, Nishimura teaches, “The method according to claim 10, wherein the obtaining of the value of the current at the second end of the battery switching device to-be-tested comprises: obtaining values of currents at second ends of at least one set of battery switching devices to-be-tested, in a case that the rectification and discharge multiplexing circuit comprises at least two rectification and discharge multiplexing units; wherein each set of the at least one set of battery switching devices comprises a first battery switching device electrically connected to the positive electrode of the battery and a second battery switching device electrically connected to the negative electrode of the battery.” ([0027], “Battery terminals TBP and TBN are connected respectively to the positive electrode and the negative electrode of battery 3.” Moreover [0035], “Switches S7 and S8 have respective first terminals connected to terminals T4 and T5, respectively, and respective second terminal connected to battery terminals TBP and TBN, respectively. Battery terminals TBP and TBN are connected to the positive electrode and the negative electrode of battery 3, respectively.” Reads on, “The method according to claim 10, wherein the obtaining of the value of the current at the second end of the battery switching device to-be-tested comprises: obtaining values of currents at second ends of at least one set of battery switching devices to-be-tested, in a case that the rectification and discharge multiplexing circuit comprises at least two rectification and discharge multiplexing units; wherein each set of the at least one set of battery switching devices comprises a first battery switching device electrically connected to the positive electrode of the battery and a second battery switching device electrically connected to the negative electrode of the battery.”)
As per claim 14, Nishimura teaches, “The method according to claim 13, wherein the determining that at least one switching device in the fault circuit to-be-detected is faulty in a case that the value of the current is within the fault current range corresponding to the at least one sampling point to-be-tested comprises: for each set of the at least one set of battery switching devices, calculating an absolute value of a sum of a value of a current at a second end of the first battery switching device and a value of a current at a second end of the second battery switching device; ([0112], ”n step ST2, controller 63 determines whether or not the absolute value |VDCT-VDC| of the difference between target voltage VDCT and DC voltage VDC=V11+V12 is larger than threshold value Vα.” Reads on, )
determining that the first battery switching device and/or the second battery switching device are faulty, in a case that the uninterruptible power supply operates in the mains mode and the absolute value of the sum is greater than a seventh predetermined current value; and determining that at least one mains switching device electrically connected to the set of the at least one set of battery switching devices is faulty, in a case that the uninterruptible power supply operates in the battery mode and the absolute value of the sum is greater than an eighth predetermined current value.” ([112], “in step ST1. In step ST2, controller 63 determines whether or not the absolute value |VDCT-VDC| of the difference between target voltage VDCT and DC voltage VDC=V11+V12 is larger than threshold value Vα. When |VDCT-VDC|>Vα does not hold (i.e., VDC≈VDCT), controller 63 returns to step ST1. When |VDCT-VDC|>Vα holds (i.e., VDC≠VDCT), controller 63 proceeds to step ST3. Vα is set to a value that is sufficiently smaller than VDCT and VDC.” Moreover, [0120] Further, when DC power of battery 3 is to be discharged during an outage, the ON period of each of transistors Q12 and Q13 is controlled so that terminal-to-terminal voltage V11 of capacitor C11 is equal to terminal-to-terminal voltage V12 of capacitor C12. “
Reads on, “determining that the first battery switching device and/or the second battery switching device are faulty, in a case that the uninterruptible power supply operates in the mains mode and the absolute value of the sum is greater than a seventh predetermined current value; and determining that at least one mains switching device electrically connected to the set of the at least one set of battery switching devices is faulty, in a case that the uninterruptible power supply operates in the battery mode and the absolute value of the sum is greater than an eighth predetermined current value.”)
As per claim 15, Nishimura teaches, “The method according to claim 10, wherein the uninterruptible power supply module further comprises a battery charging circuit, the positive electrode of the battery is electrically connected to a first end of the battery charging circuit through a first wire, the negative electrode of the battery is electrically connected to a second end of the battery charging circuit through a second wire,”([0027], “Battery terminals TBP and TBN are connected respectively to the positive electrode and the negative electrode of battery.” Reads on, “battery charging circuit, the positive electrode of the battery is electrically connected to a first end of the battery charging circuit through a first wire, the negative electrode of the battery is electrically connected to a second end of the battery charging circuit through a second wire.”)
“A second end of at least one first battery switching device is electrically connected to a first endpoint, the first endpoint is electrically connected to the first wire through a third wire, a second end of at least one second battery switching device is electrically connected to a second endpoint, and the second endpoint is electrically connected to the second wire through a fourth wire,” ([0034], “Specifically, during a normal condition, power converters 21 to 23 convert three-phase AC voltages VU, VV, VW which are supplied from commercial AC power supply 1 to input terminals 21a to 23a into DC voltages V1 to V3, and convert these DC voltages V1 to V3 into three-phase AC voltages V4a to V4c to output the AC voltages to output terminals 21b to 23b. During an outage, power converters 21 to 23 convert DC voltages V1 to V3 generated from DC power supplied from bidirectional chopper 24 into three-phase AC voltages V4a to V4c to output the AC voltages to output terminals 21b to 23b.” Reads on, “A second end of at least one first battery switching device is electrically connected to a first endpoint, the first endpoint is electrically connected to the first wire through a third wire, a second end of at least one second battery switching device is electrically connected to a second endpoint, and the second endpoint is electrically connected to the second wire through a fourth wire.”)
“The obtaining of the value of the current at the second end of the battery switching device to-be-tested comprises: obtaining a value of a current at the third wire and a value of a current at the fourth wire, wherein the at least one first battery switching device or the at least one second battery switching device comprises the battery switching device to-be-tested;”([0028], “current detectors”, reads on “obtaining a value of a current at the third wire and a value of a current at the fourth wire, wherein the at least one first battery switching device or the at least one second battery switching device comprises the battery switching device to-be-tested.”)
“And wherein the determining that at least one switching device in the fault circuit to-be-detected is faulty in a case that the value of the current is within the fault current range corresponding to the at least one sampling point to-be-tested comprises:” ([0031], “Current detectors CD1 to CD3 detect respective instantaneous values of current flowing from commercial AC power supply 1 to input terminals 21a to 23a of power converters 21 to 23, and output signals indicative of the detected values to a controller (not shown). The controller (not shown) controls power converters 21 to 23 so that respective phases of AC voltages VU, VV, VW match the phases of the current detected by current detectors CD1 to CD3, specifically the power factor is 1.0.” Furthermore, [0038], “Current detectors CD4 to CD6.” Reads on, “one switching device in the fault circuit to-be-detected is faulty in a case that the value of the current is within the fault current range.”)
“Calculating an absolute value of a sum of the value of the current at the third wire and the value of the current at the fourth wire; determining that the first battery switching device and/or the second battery switching device are faulty, ([0112], “controller 63 uses voltage detectors 61, 62 to detect terminal-to-terminal voltages V11, V12 of capacitors C11, C12 in step ST1. In step ST2, controller 63 determines whether or not the absolute value |VDCT-VDC| of the difference between target voltage VDCT and DC voltage VDC=V11+V12 is larger than threshold value Vα.” Reads on, “Calculating an absolute value of a sum of the value of the current at the third wire and the value of the current at the fourth wire; determining that the first battery switching device and/or the second battery switching device are faulty.”)
“In a case that the uninterruptible power supply operates in the mains mode and the absolute value of the sum is greater than a ninth predetermined current value; and determining that at least one mains switching device electrically connected to the first battery switching device and/or the second battery switching device is faulty, in a case that the uninterruptible power supply operates in the battery mode and the absolute value of the sum is greater than a tenth predetermined current value. ([0114], “Subsequently, in step ST6, controller 63 determines whether or not the absolute value |V11-V12| of the difference between the detected values of voltages V11 and V12 is larger than threshold value Vβ. When |V11-V12|>Vβ does not hold (i.e., V11≈V12), controller 63 returns to step ST1. When |V11-V12|>Vβ holds (i.e., V11≠V12), controller 63 proceeds to step ST7. Vβ is set to a value sufficiently smaller than V11 and V12.” Moreover, [0119], “In the present embodiment, there is no wire LN connecting neutral point NP to terminal T3 of bidirectional chopper 24 in each uninterruptible power supply device 60. Therefore, even when transistor Q12 of bidirectional chopper 24 fails to be short-circuited, no current flows from battery 3 to load 2 and other uninterruptible power supply devices 60 through failing transistor Q12. Thus, even when transistor Q12 of bidirectional chopper 24 fails to be short-circuited, load 2 and other uninterruptible power supply devices 60 will not fail due to the current from battery 3.” Furthermore, [0120], “Further, when DC power of battery 3 is to be discharged during an outage, the ON period of each of transistors Q12 and Q13 is controlled so that terminal-to-terminal voltage V11 of capacitor C11 is equal to terminal-to-terminal voltage V12 of capacitor C12. Thus, capacitors C11 and C12 can be equally charged, and capacitor C11 or C12 can be prevented from being broken due to excessive terminal-to-terminal voltage V11 or V12 of capacitor C11 or capacitor C12.” Reads on, “Absolute value of the sum is greater than a ninth predetermined current value; and determining that at least one mains switching device electrically connected to the first battery switching device and/or the second battery switching device is faulty, in a case that the uninterruptible power supply operates in the battery mode and the absolute value of the sum is greater than a tenth predetermined current value.”)
As per claim 16, Nishimura “The method according to claim 1, wherein the uninterruptible power supply module further comprises a battery charging circuit, a positive electrode of the battery is electrically connected to a first end of the battery charging circuit through a first wire, a negative electrode of the battery is electrically connected to a second end of the battery charging circuit through a second wire,” ([0027], “Battery terminals TBP and TBN are connected respectively to the positive electrode and the negative electrode of battery.” Reads on, “a positive electrode of the battery is electrically connected to a first end of the battery charging circuit through a first wire, a negative electrode of the battery is electrically connected to a second end of the battery charging circuit through a second wire.”)
a second end of at least one first battery switching device is electrically connected to a first endpoint, the first endpoint is electrically connected to the first wire through a third wire, a second end of at least one second battery switching device is electrically connected to a second endpoint, and the second endpoint is electrically connected to the second wire through a fourth wire;“ ([0034], “Specifically, during a normal condition, power converters 21 to 23 convert three-phase AC voltages VU, VV, VW which are supplied from commercial AC power supply 1 to input terminals 21a to 23a into DC voltages V1 to V3, and convert these DC voltages V1 to V3 into three-phase AC voltages V4a to V4c to output the AC voltages to output terminals 21b to 23b. During an outage, power converters 21 to 23 convert DC voltages V1 to V3 generated from DC power supplied from bidirectional chopper 24 into three-phase AC voltages V4a to V4c to output the AC voltages to output terminals 21b to 23b.” Reads on, “a second end of at least one first battery switching device is electrically connected to a first endpoint, the first endpoint is electrically connected to the first wire through a third wire, a second end of at least one second battery switching device is electrically connected to a second endpoint, and the second endpoint is electrically connected to the second wire through a fourth wire;”)
“And the obtaining of the value of the current at at least one sampling point to-be-tested in the uninterruptible power supply comprises: in a case that the uninterruptible power supply comprises at least two uninterruptible power supply modules, obtaining a value of a current on the first wire and/or the second wire in each of the uninterrupted power supply modules.” ([0023], “During a normal condition in which commercial AC power supply 1 properly supplies three-phase AC power, each of uninterruptible power supply devices U1 to UN converts the three-phase AC power, which is supplied from commercial AC power supply 1 through the three-phase three-wire system, into DC power to supply the DC power to battery 3, and converts the DC power into three-phase AC power to supply the AC power to load 2. Load 2 is driven by the three-phase AC power supplied from uninterruptible power supply devices U1 to UN through the three-phase four-wire system. The current to be consumed by load 2 is supplied equally from N uninterruptible power supply devices U1 to UN.” Reads on, “And the obtaining of the value of the current at at least one sampling point to-be-tested in the uninterruptible power supply comprises: in a case that the uninterruptible power supply comprises at least two uninterruptible power supply modules, obtaining a value of a current on the first wire and/or the second wire in each of the uninterrupted power supply modules.”)
As per claim 17, Nishimura teaches, “The method according to claim 16, wherein the determining that at least one switching device in the fault circuit to-be-detected is faulty in a case that the value of the current is within the fault current range corresponding to the at least one sampling point to-be-tested comprises: obtaining a maximum normal operation current of each of the uninterruptible power supply modules; ([0023], “normal condition in which commercial AC power supply 1 properly supplies three-phase AC power, each of uninterruptible power supply devices U1 to UN converts the three-phase AC power.” Reads on, “obtaining a maximum normal operation current of each of the uninterruptible power supply modules.”)
“For each of the uninterruptible power supply modules, determining that at least one battery switching device electrically connected to a target wire is faulty, in a case that the uninterruptible power supply module operates in the mains mode and an absolute value of a value of a current on the target wire is greater than the maximum normal operation current; and for each of the uninterruptible power supply modules, determining that at least one mains switching device electrically connected to the target wire is faulty, in a case that the uninterruptible power supply module operates in the battery mode and the absolute value of the value of the current on the target wire is greater than the maximum normal operation current; wherein the target wire comprises the first wire or the second wire.” ([0119],
“In the present embodiment, there is no wire LN connecting neutral point NP to terminal T3 of bidirectional chopper 24 in each uninterruptible power supply device 60. Therefore, even when transistor Q12 of bidirectional chopper 24 fails to be short-circuited, no current flows from battery 3 to load 2 and other uninterruptible power supply devices 60 through failing transistor Q12. Thus, even when transistor Q12 of bidirectional chopper 24 fails to be short-circuited, load 2 and other uninterruptible power supply devices 60 will not fail due to the current from battery 3.” Furthermore, [0120], “Further, when DC power of battery 3 is to be discharged during an outage, the ON period of each of transistors Q12 and Q13 is controlled so that terminal-to-terminal voltage V11 of capacitor C11 is equal to terminal-to-terminal voltage V12 of capacitor C12. Thus, capacitors C11 and C12 can be equally charged, and capacitor C11 or C12 can be prevented from being broken due to excessive terminal-to-terminal voltage V11 or V12 of capacitor C11 or capacitor C12.” Reads on, “In a case that the uninterruptible power supply module operates in the battery mode and the absolute value of the value of the current on the target wire is greater than the maximum normal operation current; wherein the target wire comprises the first wire or the second wire.”)
As per claim 18, Nishimura teaches, “The method according to claim 16, wherein the current on the first wire is set to be a forward current and the current on the second wire is set to be a reverse current;” ([0071], “Terminals T1, T2 are connected respectively to DC positive bus L1 and DC negative bus L2 of each of power converters 21 to 23. Terminal T3 is connected to neutral point NP through wire LN.” Reads on, “forward current and the current on the second wire is set to be a reverse current.”)
“And the determining that at least one switching device in the fault circuit to-be-detected is faulty in a case that the value of the current is within the fault current range corresponding to the at least one sampling point to-be-tested comprises: in a case that the uninterruptible power supply comprises at least three uninterruptible power supply modules and values of currents on the first wire and the second wire in each of the uninterrupted power supply modules are obtained, ([0094], “An uninterruptible power supply system of the present embodiment includes uninterruptible power supply devices 60 replacing uninterruptible power supply devices U1 to UN shown in FIG. 1.” Furthermore, [0038], “Current detectors CD4 to CD6 detect respective instantaneous values of output current from power converters 21 to 23. The values detected by current detectors CD4 to CD6 are supplied to the controller (not shown). The controller (not shown) communicates with other uninterruptible power supply devices U2 to UN and controls power converters 21 to 23 based on the values detected by current detectors CD4 to CD6, so that the load current is equally supplied from uninterruptible power supply devices U1 to UN.” Reads on, “comprises at least three uninterruptible power supply modules and values of currents on the first wire and the second wire in each of the uninterrupted power supply modules are obtained.”)
“Calculating a sum of the values of the currents on the first wire and the second wire in each of the uninterrupted power supply modules ; determining that at least one switching device coupled to the first wire is faulty, in a case that the sum of the currents is greater than a first predetermined current sum; determining that at least one switching device coupled to the second wire is faulty, in a case that the sum of the currents is less than a second predetermined current sum; wherein the at least one switching device comprises the mains switching device or the battery switching device.” ([0118], “Likewise, in steps ST8, ST9, duty ratios D(φ12), D(φ13) of PWM signals φ12, φ13 may be increased or decreased by a certain value, or the value by which duty ratios D(φ12), D(φ13) of PWM signals φ12, φ13 is increased or decreased may be changed depending on the difference between V11 and V12.”
Furthermore, [0119] “In the present embodiment, there is no wire LN connecting neutral point NP to terminal T3 of bidirectional chopper 24 in each uninterruptible power supply device 60. Therefore, even when transistor Q12 of bidirectional chopper 24 fails to be short-circuited, no current flows from battery 3 to load 2 and other uninterruptible power supply devices 60 through failing transistor Q12. Thus, even when transistor Q12 of bidirectional chopper 24 fails to be short-circuited, load 2 and other uninterruptible power supply devices 60 will not fail due to the current from battery 3.” Reads on, “Calculating a sum of the values of the currents on the first wire and the second wire in each of the uninterrupted power supply modules ; determining that at least one switching device coupled to the first wire is faulty, in a case that the sum of the currents is greater than a first predetermined current sum; determining that at least one switching device coupled to the second wire is faulty, in a case that the sum of the currents is less than a second predetermined current sum; wherein the at least one switching device comprises the mains switching device or the battery switching device.”)
As per claim 20, Nishimura teaches, “A controller”, ([Abstract], “controller.” Reads on, “A controller.”)
Nishimura is silent on, “Comprising: a processor; and a memory connected in communication with the processor; wherein the memory stores computer executable instructions; and the processor is configured to, when executing the computer executable instructions, perform the method according to claim 1.”
Jiang teaches, “Comprising: a processor; and a memory connected in communication with the processor; wherein the memory stores computer executable instructions; and the processor is configured to, when executing the computer executable instructions, perform the method according to claim 1.” ([0042], “The control unit processes the voltage signal and/or the current signal detected by the detection unit, sends a control signal, and controls on and off of the relay and the switch transistor by using a drive circuit.” Reads on, “a processor; and a memory connected in communication with the processor; wherein the memory stores computer executable instructions; and the processor is configured to, when executing the computer executable instructions, perform the method according to claim 1.”)
Adding a microprocessor to a control module would greatly enhance the capabilities of the control unit by allowing it to store historical data to keep track of trends as well as programable instructions which would allow the setting of operational limits, and failure limits which would prompt the switching of a functional UPS.
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify Nishimura in view of Jiang which teaches [0042], “In one embodiment, the control unit may also be referred to as a processing unit, and may be a processor of the inverter power supply system, for example, a central processing unit (CPU), configured to process a voltage signal and/or a current signal of each DC/DC power converter, and another functional module in the inverter power supply system.” Combining this would improve the protection parameters giving the technician more control as well as historical data which would allow them to observe is a UPS is beginning to fail. (KSR)
Claim 19 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Nishimura ‘656
Regarding Independent claim 19, Nishimura “A fault detection and processing apparatus for an uninterruptible power supply, comprising: an obtaining module configured to obtain a value of a current at at least one sampling point to-be-tested in the uninterruptible power supply, wherein the at least one sampling point to-be-tested is located in at least one fault circuit to-be-detected of the uninterruptible power supply, and each of the at least one fault circuit to-be-detected comprises at least one mains switching device and at least one battery switching device; and a processing module configured to determine that at least one switching device in the fault circuit to-be-detected is faulty, in a case that the value of the current is within a fault current range corresponding to the at least one sampling point to-be-tested, and adjust an operation state of a rectification and discharge multiplexing circuit based on the faulty switching device, to cut off the faulty circuit where the faulty switching device is located.” ([0038], “Current detectors CD4 to CD6 detect respective instantaneous values of output current from power converters 21 to 23. The values detected by current detectors CD4 to CD6 are supplied to the controller (not shown). The controller (not shown) communicates with other uninterruptible power supply devices U2 to UN and controls power converters 21 to 23 based on the values detected by current detectors CD4 to CD6, so that the load current is equally supplied from uninterruptible power supply devices U1 to UN. Moreover, [0043], “Controller 42.” Additionally, [0070], “Bidirectional chopper 24 is controlled by a controller 53.” Furthermore, “a controller 63 and voltage detectors 61, 62 are provided.” Reads on, “obtain a value,” “switching device,” “and a processing module.”)
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Zhang et al. (CN 103344870 A) teaches, The invention claims an uninterrupted power supply system of thyristor short-circuit detection method and device, when uninterruptible power supply system UPS is city power working mode, through control of the rectifier module of the UPS to be tested. power switch tube of battery discharger is in stop working state into the test current, and detecting whether there is current inductor in the battery discharger is, if it is determined that the battery discharger in short circuit of the thyristor, and the module to be tested from the city power working mode switching to the battery power supply mode. so as to realize the compatibility detection of UPS single module system and a UPS module system capable of accurately recognizing fault of single module, avoiding using more detection elements, reduces the hardware cost of the UPS.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JARELL W PAXTON whose telephone number is (571)272-0521. The examiner can normally be reached Monday-Friday 8:00 am - 5:00 pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eman Alkafawi can be reached at (571)272-4448. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/JARELL W PAXTON/ Examiner, Art Unit 2858
/EMAN A ALKAFAWI/ Supervisory Patent Examiner, Art Unit 2858 5/20/2026
Prosecution Insights