Prosecution Insights
Last updated: May 29, 2026
Application No. 18/806,812

LASER-FREE SINGLE QUBIT GATE

Non-Final OA §103§112
Filed
Aug 16, 2024
Priority
Sep 07, 2023 — provisional 63/581,019
Examiner
KINKEAD, ARNOLD M
Art Unit
2849
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Quantinuum LLC
OA Round
1 (Non-Final)
91%
Grant Probability
Favorable
1-2
OA Rounds
2m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 91% — above average
91%
Career Allowance Rate
1259 granted / 1382 resolved
+23.1% vs TC avg
Moderate +8% lift
Without
With
+7.9%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 0m
Avg Prosecution
15 currently pending
Career history
1399
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
51.2%
+11.2% vs TC avg
§102
24.0%
-16.0% vs TC avg
§112
15.2%
-24.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1382 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-13 and 14-19 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. The following language in claims 1 and 13 is not clear: Re claim 1, line 1: “ A method for performing a single qubit gate on a target qubit…”; Re claim 13: “13. A system configured to perform a single qubit gate on a target qubit” Please advise. The dependent claims 2-12 and 14-19 are thus indefinite too. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 1, 5, 6, 7, 13, 15 and 16 (as best understood)is/are rejected under 35 U.S.C. 103 as being unpatentable over Weidt et al (PRL 117, 220501 (2016) PHYSICAL REVIEW LETTERS, 11/25/2016, cited by applicants) The reference to Weidt et al shows a single qubit gate(Green or Red dots, as shown below) and represents a target qubit, confined by a confinement apparatus, controllied by a controller( not shown), operates a dressing field circuit(static microwave field via current carrying wires in the confinement area) to cause the dressing field circuit to generate a dressing field at a target location(Green or RED dots) in the confinement apparatus. Please see figure 3: PNG media_image1.png 846 819 media_image1.png Greyscale Please note: Every entangled state is a superposition. Inherently due to entanglement and as noted in the reference, a maximally entangled state (see p.3) for the clock qubit design is shown in figure below: PNG media_image2.png 852 1551 media_image2.png Greyscale Where the dressing field is configured to modify an energy structure of a qubit disposed at the target location(small dots shown as ions) by causing a set of initial states of the qubit to form a set of superposition states, a first dressed state(l+1> of the set of superposition states includes a non-zero contribution from a first qubit state of the set of initial states and a second dressed state(l-1>) of the set of superposition states includes a non-zero contribution from a second qubit state of the set of initial states(l01>,l02>); Please note the non-zero qubit states shown in figure 1. (l+1,l-1>); a dressed frequency difference between the first dressed state and the second dressed state is different from a qubit frequency difference between the first qubit state and the second qubit state; controlling, by the controller, a microwave source to cause a gate microwave signal to be incident on the target location for a gate time, wherein the gate microwave signal is characterized by the dressed frequency difference plus the qubit frequency difference; As noted in figure 1 caption: 171Yb+ ions, each being driven by two resonant microwave fields near 12.6 GHz with slightly unequal Rabi frequencies denoted by Ωµw1 and Ωµw2 and after completion of the gate time(inherent), controlling, by the controller, operation of the dressing field circuit to cause the dressing field circuit to stop generating the dressing field at the target location. The method steps being inherent. The reference does not explicitly show the controller that allows for the particular design functionality, that is, for the microwave field changes, static field from currents thru wires (not shown)about targeting zones, however, this is simple a matter of design consideration as the reference, as noted above, lays out specifics on how to achieve the desired entangled state of the clock qubit gate and thus a controller is necessary to carry out the precise targeting and field application, ultimately leading to an entangled qubit gate as shown by the figures and description to achieve the desired extended coherence time, for example. In light of the above it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have recognized that the reference to Weidt et al shows the general design build for the qubit gate as noted above, the use of a controller is implicit to carry out the precise targeting and ultimate entangled qubit as shown by the figures and description to achieve the desired coherence time, for example, and achieve a more efficient and scalable quantum system. Re claims 5 and 15: current wires are used in control of the dressing fields.(see figure 3) Re claim 6: A dressing field circuit(static microwave field via current carrying wires in the confinement area) as noted in the rejection. Re claims 7 and 16: The dressing field circuit (current wires)generates a dressing field at a target location(Green or RED dots) in the confinement apparatus as shown in figure 3. ------------------------------------------------------------------------------------------------------------------------------ Claim(s) 8 and 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Weidt et al (PRL 117, 220501 (2016) PHYSICAL REVIEW LETTERS, 11/25/2016, cited by applicants) As applied to claims 1 and 13, respectively. The reference to Weidt et al shows a single qubit gate(Green or Red dots, as shown below) and represents a target qubit, confined by a confinement apparatus, controllied by a controller( not shown), operates a dressing field circuit(static microwave field via current carrying wires in the confinement area) to cause the dressing field circuit to generate a dressing field at a target location(Green or RED dots) in the confinement apparatus. Please see figure 3: The method steps being inherent. PNG media_image1.png 846 819 media_image1.png Greyscale Re claims 8 and 17: The reference does not explicitly show how the dressing fields from current wires under the target zones are lithographically implemented, however, this is simple a matter of design consideration for these nanoscale dimensions. The current wires(dressing field circuit) under the gate zones of figure 3(albeit, not shown), can be printed(lithographically) under the target zones due to the dimensions of the ions used on confinement area. Techniques, such as UV/EUV and electron beam, etc, are conventional lithographic techniques to create patterns in the semiconductor layers and substrate layers. In light of the above it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have recognized that the reference to Weidt et al shows the general design build for the qubit gate, figure 3, and using the lithographic type methods to print the current wires(producing dressing fields) under the target zones, nanoscale dimensions, is a simple matter of design consideration. This allows for better targeting of the qubits with regards the microwave fields being used to create the desired qubit gate operation to be scaled accordingly. Allowable Subject Matter Claim 20 is allowed. Claims 2, 3, 4, 9, 10, 11, 12, 14, 18 and 19 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ARNOLD M KINKEAD whose telephone number is (571)272-1763. The examiner can normally be reached M-F 7am-5:30pm(Fri-Flex). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Menatoallah Youssef can be reached at 571-270-3684. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. ARNOLD M. KINKEAD Primary Examiner Art Unit 2849 /ARNOLD M KINKEAD/Primary Examiner, Art Unit 2849
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Prosecution Timeline

Aug 16, 2024
Application Filed
Feb 25, 2026
Non-Final Rejection mailed — §103, §112
May 15, 2026
Response Filed

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
91%
Grant Probability
99%
With Interview (+7.9%)
2y 0m (~2m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1382 resolved cases by this examiner. Grant probability derived from career allowance rate.

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