Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Acknowledgment is made of applicant's claim for foreign priority based on an application filed in Japan on 30 August 2023. It is noted, however, that applicant has not filed a certified copy of the JP2023-139535 application as required by 37 CFR 1.55.
Examiner notes the priority document exchange failure status report mailed 30 January 2025.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title is suggested: METHODS AND APPARATUS FOR BULK INITIALIZATION OF A MEMORY DEVICE.
A different title may be chosen, but a descriptive title is required.
35 U.S.C. 112(a) or pre-AIA 35 U.S.C. 112, requires the specification to be written in “full, clear, concise, and exact terms.” The specification is replete with terms which are not clear, concise and exact. The specification should be revised carefully in order to comply with 35 U.S.C. 112(a) or pre-AIA 35 U.S.C. 112. Examples of some unclear, inexact or verbose terms used in the specification are:
Page 4, lines 1-2: “For clarity of explanation, the following description and drawings are appropriately omitted and simplified.” The language “the following description and drawings are appropriately omitted” indicates that the description and drawings are not included.
Page 5, line 20: “As shown in Fig. 6, the memory device 600 according to the embodiment includes an initialization control circuit (not shown), a Write/Read internal clock generation circuit 601…The initialization control circuit sends an initialization mode signal that transitions the memory device to the initialization mode.” It is unclear how FIG. 6 can include an initialization control circuit and send a signal if such initialization control circuit does not appear to be depicted in FIG. 6.
Page 6, lines 8-10: “Also, the initialization control circuit sends 0 or 1 initialization data to write to the memory device 600.” The language “0 or 1 initialization data” is unclear; it must be specified if “0 or 1 initialization data” is referring to binary bits or is intended to have some other meaning.
The specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Objections
Claim 1 sets forth “a selection circuit configured to simultaneously selects a plurality of word lines and a plurality of bit lines”. This language is unclear. For purposes of compact prosecution, this is being interpreted as “a selection circuit configured to simultaneously [[selects]] select a plurality of word lines and a plurality of bit lines”.
Appropriate correction is required. Claims 2-6 are objected to as dependent upon claim 1.
Claim 1 sets forth “the True side or Bar side of a bit line”. The terms True and Bar are capitalized but do not appear to be proper nouns. Appropriate clarification is required. Claims 2-6 are objected to as dependent upon claim 1.
Claim 4 sets forth “the High level potential”. The term “High” is capitalized but does not appear to be a proper noun. Appropriate clarification is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-6 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites the limitation "the True side of Bar side of a bit line" in lines 6-7. There is insufficient antecedent basis for this limitation in the claim. Appropriate clarification is required.
Claims 2-6 are rejected as dependent upon claim 1.
Claim 1 sets forth “a bit line”, “a plurality of bit lines”, and “bit lines”. This language is unclear. It is unclear whether “a bit line” is belonging to “a plurality of bit lines” and/or “bit lines”, and/or whether “a plurality of bit lines” and “bit lines” is referring to the same one or more “bit lines”. One of ordinary skill in the art would not understand how to implement such invention due to uncertainty about how to implement the one or more “bit lines” in the instant invention. Appropriate correction is required.
Claims 2-6 are rejected as dependent upon claim 1.
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1-6 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the enablement requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to enable one skilled in the art to which it pertains, or with which it is most nearly connected, to make and/or use the invention.
Claim 1 sets forth, in part, “and to write the initialization data simultaneously into a memory cell connected to the selected word lines and bit lines.” The use of the term “simultaneously” is unclear in this context. Although the word “simultaneously” would be broadly understood by one of ordinary skill in the art as events occurring at the same time, it is unclear what event the writing of initialization data is occurring at the same time as. Further, if the claim is intending to set forth that the writing of initialization data is occurring simultaneously with “a selection circuit configured to simultaneously selects a plurality of word lines and a plurality of bit lines”, this requires further written description in order to be implemented by one of ordinary skill in the art, because such a claim limitation is not clear. Appropriate clarification is required.
Claims 2-6 are rejected as dependent upon claim 1.
The following relevant prior art not relied upon is made of record:
US 6021077 A (Nakaoka)
US 6724686 B2 (Ooishi)
Further search and consideration is required upon resolution of indefiniteness issues. In particular, the claim limitation “and a selection circuit configured to simultaneously selects a plurality of word lines and a plurality of bit lines, and to write the initialization data simultaneously into a memory cell connected to the selected word lines and bit lines” is indefinite and is not clearly understood by one of ordinary skill in the art and the prior art cannot be sufficiently applied.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DANIEL J KING whose telephone number is (703)756-1232. The examiner can normally be reached M-F 9am-5pm.
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/DANIEL JOHN KING/Examiner, Art Unit 2827
/AMIR ZARABIAN/Supervisory Patent Examiner, Art Unit 2827