Prosecution Insights
Last updated: July 17, 2026
Application No. 18/808,536

STACKED LIGHT RECEIVING SENSOR AND ELECTRONIC APPARATUS

Final Rejection §103
Filed
Aug 19, 2024
Priority
Oct 31, 2018 — JP 2018-206014 +3 more
Examiner
TISSIRE, ABDELAAZIZ
Art Unit
2638
Tech Center
2600 — Communications
Assignee
Sony Group Corporation
OA Round
2 (Final)
84%
Grant Probability
Favorable
3-4
OA Rounds
2m
Est. Remaining
98%
With Interview

Examiner Intelligence

Grants 84% — above average
84%
Career Allowance Rate
596 granted / 709 resolved
+22.1% vs TC avg
Moderate +14% lift
Without
With
+13.6%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
22 currently pending
Career history
727
Total Applications
across all art units

Statute-Specific Performance

§101
0.6%
-39.4% vs TC avg
§103
86.4%
+46.4% vs TC avg
§102
6.4%
-33.6% vs TC avg
§112
3.6%
-36.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 709 resolved cases

Office Action

§103
CTFR 18/808,536 CTFR 88147 Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Response to Arguments Claims 1, 6 and 13 have been amended. Accordingly, claims 1-19 are now pending. Applicant’s arguments filed 03/03/2026, and in light of Applicant’s amendment to claims 1, 6 and 13 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of different interpretation of the previously applied reference. (see infra). Applicant argued that: “ In rejecting claim 1, as previously presented, the Office asserted that the "first substrate" is the photodetector layer 305 as taught by Liu, the "second substrate" is the ADC layer 315 as taught by Liu, and the "third substrate" is the CNN layer 325 as taught by Liu. 1 However, Liu also teaches that a feature extraction layer 320 is disposed between the ADC layer 315 and the CNN layer 325 .”. Examiner notes that a digital signal processing does not need to exist as a single physical material or layer. Instead, it can emerge from multiple interacting substrates working together as one functional processing system. Therefore, Examiner is interpreting the “ feature extraction layer 320 and the CNN layer 325 ” in Fig. 3 of Liu prior art as the corresponding claimed feature “ a third substrate including a digital signal processor ” of claims 1, 6 and 11. Double Patenting 08-33 AIA The no statutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A no statutory obviousness-type double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg , 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman , 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longa , 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Orne , 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel , 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington , 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the conflicting application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. Effective January 1, 1994, a registered attorney or agent of record may sign a terminal disclaimer. A terminal disclaimer signed by the assignee must fully comply with 37 CFR 3.73(b). Regarding Claims 1, 4 and 5 , are rejected on the ground of nonstatutory obviousness-type double patenting as being unpatentable over respective claims 1, 4 and 6 of U.S. Patent No. 11,792,551 B2 as depicted in the Table below . Although the conflicting claims are not identical, they are not patentably distinct from each other because claims 1, 4 and 5 of the instant application are broader in scope over claims 1, 4 and 6 of U.S. Patent 11,792,551 B2, in that claims 1, 4 and 6 of the U.S. Patent contain all the limitations of claims 1, 4 and 5 of the instant application. Claims 1, 4 and 5 of the instant application are therefore not patently distinct from the earlier U.S. Patent claim and such are unpatentable for obvious-type double patenting. Instant application US 11,792,551 B2 1. A stacked light receiving sensor comprising: a first substrate including a pixel array section, wherein the pixel array section includes a plurality of pixels arranged two-dimensionally in a matrix; a second substrate including an analog circuit, wherein the analog circuit is configured to read a pixel signal from the pixel array section; and a third substrate including a digital signal processor, wherein the digital signal processor is configured to process, with a computational model, data based on the pixel signal, and transmit an output to an application processor, the output based on the processing of the data with the computational model, wherein the first substrate is stacked on the second substrate, and the second substrate is stacked on the third substrate such that no other substrate is disposed between the second substrate and the third substrate. 1. A stacked light receiving sensor comprising: a first substrate that forms a first layer; a second substrate that is joined with the first substrate and that forms a second layer; a third substrate that is joined with the second substrate and that forms a third layer ; a pixel array section that includes a plurality of unit pixels arranged two-dimensionally in a matrix; an analog circuit that reads a pixel signal from the pixel array section; a logic circuit that is connected to the analog circuit and that outputs the pixel signal; a memory that stores therein a neural network computing model; a processing section that executes processing based on the neural network computing model, on data based on the pixel signal; and an output section that outputs a processing result at least based on the neural network computing model to an outside, wherein the pixel array section is disposed on the first layer, the analog circuit is disposed on any one or more of the first to third layers, and the logic circuit, the processing section, and the memory are disposed on any one or more of the second and third layers, wherein a first area defined by a first perimeter of the first substrate, a second area defined by a second perimeter of the second substrate, and a third area defined by a third perimeter of the third substrate substantially overlap each other from a plan view. 4. The stacked light receiving sensor according to claim 1, wherein the analog circuit includes a comparator and a counter. 5. The stacked light receiving sensor according to claim 1, wherein the analog circuit further includes a digital-to-analog converter. 4. The stacked light receiving sensor according to claim 1, wherein the analog circuit includes a comparator disposed on the second layer or the third layer, and a counter disposed on the second layer or the third layer. 6. The stacked light receiving sensor according to claim 4, wherein the analog circuit further includes a digital to analog converter that is disposed on the second layer or the third layer. Claim Rejections - 35 USC § 103 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim s 1-3, 6-10 and 13-17 are rejected under 35 U.S.C. 103 as being unpatentable over Liu; Xinqiao ( US 20190035154 A1, hereinafter “ Liu ”), in view of WANG et al. (US 20190065910 A1, hereinafter “ WANG ”) . Examiner notes: Examiner interpreted the use of terms: “comprising” means inclusive or open-ended terms that does not exclude additional, unrecited elements or method acts. “substrate” means and includes a base material or construction upon which additional materials are formed, additional structures are located, or both. Particularly, the “substrate” is interpreted to mean a base semiconductor layer . Examiner notes that a digital signal processing does not need to exist as a single physical material or layer. Instead, it can emerge from multiple interacting substrates working together as one functional processing system. Therefore, Examiner is interpreting the “ feature extraction layer 320 and the CNN layer 325 ” in Fig. 3 of Liu prior art as the corresponding claimed feature “ a third substrate including a digital signal processor ” of claims 1, 6 and 11. Regarding claim 1 , Liu teaches a stacked light receiving sensor ( Figs. 1-7, [0035]: a sensor assembly with a plurality of stacked sensor layers ) comprising: a first substrate including a pixel array section, wherein the pixel array section includes a plurality of pixels arranged two-dimensionally in a matrix ( Figs. 2, 3&5, [0035]&[0038]: the sensor assembly includes a plurality of layers stacked on top of each other, the layers are implemented based on a silicon material . A top layer of silicon-based customized for a photodetector layer 305 and comprises an array of pixels 310, e.g., a two-dimensional array of photodiodes. ); a second substrate including an analog circuit, wherein the analog circuit is configured to read a pixel signal from the pixel array section ( Figs. 2, 3&5, [0038]: the sensor assembly includes a plurality of layers of silicon stacked on top of each other . an ADC layer silicon-based 315 customized for conversion of analog signals (e.g., intensities of light captured by the photodetector layer 305) into digital data. The ADC layer 315 configured to convert (e.g., by its processing circuitry or ADC logic, details not shown in FIG. 3) analog values of light intensities captured by the pixels 310 of the photodetector layer 305 into digital values corresponding to, e.g., image frame data.); and a third substrate including a digital signal processor ( Figs. 2, 3&5, [0035]&[0038]: the sensor assembly includes a plurality of layers stacked on top of each other, the layers are implemented based on a silicon material . a feature extraction layer 320 and a CNN layer 325 formed on the bottom of the ADC layer 315 (claimed “digital signal processor”) ), wherein the digital signal processor is configured to process, with a computational model, data based on the pixel signal, and transmit an output to an application processor , the output based on the processing of the data with the computational model ( Figs. 2, 3&5, [0024], [0040]-[0041]&[0055]: the CNN layer 325 is implemented to perform inference, i.e., to apply a trained network weights to an input image to determine an output , e.g., an image classifier. The input corresponds to digital pixel values of an image, e.g., captured by the photodetector layer 305 and processed by ADC layer 315 and the feature extraction layer 320 of the sensor assembly 300. One sensor device can perform an extraction of a particular feature of an environment and provide extracted feature data to a controller 135 for further processing ), wherein the first substrate is stacked on the second substrate, and the second substrate is stacked on the third substrate ( Figs. 2, 3&5, [0046]: all silicon wafers of the sensor layers 305, 315, 325 manufactured and stacked together ) such that no other substrate is disposed between the second substrate and the third substrate ( Examiner is interpreting the “ feature extraction layer 320 and the CNN layer 325 ” in Fig. 3 of Liu prior art as the corresponding claimed feature “ a third substrate including a digital signal processor ”, therefore no “ no other substrate is disposed between the second substrate and the third substrate” ) . Liu does not teach transmit an output to an application processor . However, WANG discloses transmit an output to an application processor ( Figs. 2&6, [0020]-[0024]: RNN 50 provides a fusion of the content from the metadata extraction database 48 and the CNN output layer 40 to create metadata that contains object classification, prediction of angle (direction) of each classified object, prediction of the location of objects that may not be moving in a linear manner, prediction of the relative velocity of each classified object. the image and the combination of data including object location and object relative velocity from the processor 52 is provided to a display device 62 to display the image (claimed “ application processor” ). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate transmit an output to an application processor as taught by WANG into Liu image device. The suggestion/ motivation for doing so would be to increase the detection quality of the images and the speed at which the objects are recognized and classified ( WANG : [0004]-[0005]). Regarding claim 2 , Liu teaches the stacked light receiving sensor according to claim 1, except wherein the digital signal processor is further configured to transmit image data to a communication terminal, and the output includes metadata associated with the image data. However, WANG discloses wherein the digital signal processor is further configured to transmit image data to a communication terminal, and the output includes metadata associated with the image data ( Figs. 2&6, [0020]-[0024]: RNN 50 provides a fusion of the content from the metadata extraction database 48 and the CNN output layer 40 to create metadata that contains object classification, prediction of angle (direction) of each classified object, prediction of the location of objects that may not be moving in a linear manner, prediction of the relative velocity of each classified object. the image and the combination of data including object location and object relative velocity from the processor 52 is provided to a display device 62 to display the image ). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate wherein the digital signal processor is further configured to transmit image data to a communication terminal, and the output includes metadata associated with the image data as taught by WANG into Liu image device. The suggestion/ motivation for doing so would be to increase the detection quality of the images and the speed at which the objects are recognized and classified ( WANG : [0004]-[0005]). Regarding claim 3 , Liu teaches the stacked light receiving sensor according to claim 1, in addition Liu discloses wherein the second substrate is coupled to the third substrate with a Through Silicon Via (TSV) ( Figs. 1, 3&7, [0056]: the feature extraction layer 320 and the neural network 500 can be efficiently interfaced with the photodetector layer 305, and the ADC layer 315 of the sensor assembly 300 of FIG. 3, e.g., via the TSV interface 345 between the feature extraction layer 320 and the CNN layer 325 (i.e., the neural network 500) ). Regarding claim 6 , claim 6 has been analyzed and rejected with regard to claims 1 and 2 and in accordance with Liu 's further teaching on: signal processing system comprising: a light receiving sensor ( Figs. 2, 4, 6&7: a stacked sensor system into HDM ). Regarding claim 7 , claim 7 has been analyzed with regard to claim 2 and is rejected for the same reasons of obviousness as used above. Regarding claim 8 , claim 8 has been analyzed with regard to claim 2 and is rejected for the same reasons of obviousness as used above. Regarding claim 9 , claim 9 has been analyzed with regard to claim 3 and is rejected for the same reasons of obviousness as used above. Regarding claim 10 , Liu and WANG combination teaches the signal processing system according to claim 6, in addition WANG discloses further comprising: an imaging apparatus, wherein the application processor is included in the imaging apparatus ( Figs. 2&6, [0020]-[0024]: RNN 50 provides a fusion of the content from the metadata extraction database 48 and the CNN output layer 40 to create metadata that contains object classification, prediction of angle (direction) of each classified object, prediction of the location of objects that may not be moving in a linear manner, prediction of the relative velocity of each classified object. the image and the combination of data including object location and object relative velocity from the processor 52 is provided to a display device 62 to display the image ). The suggestion/ motivation for doing so would be to increase the detection quality of the images and the speed at which the objects are recognized and classified ( WANG : [0004]-[0005]). Regarding claim 13 , Method claim 13 is drawn to the method of using the corresponding apparatus claimed in either claim 1 or claim 6. Therefore, method claim 13, corresponds to apparatus claims 1 or 6, is rejected for the same reasons of obviousness as used above. Regarding claims 14 and 15 , Method claims 14 and 15 are drawn to the method of using the corresponding apparatus claimed in claim 2. Therefore, method claims 14 and 15, corresponds to apparatus claim 1, are rejected for the same reasons of obviousness as used above. Regarding claim 16 , Method claims 16 is drawn to the method of using the corresponding apparatus claimed in claim 3. Therefore, method claim 16, corresponds to apparatus claim 3, is rejected for the same reasons of obviousness as used above. Regarding claim 17 , Method claim 17 is drawn to the method of using the corresponding apparatus claimed in claim 10. Therefore, method claim 17, corresponds to apparatus claim 10, is rejected for the same reasons of obviousness as used above . 07-21-aia AIA Claim s 4, 11 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over the Liu and WANG combination as applied above, in view of Liu; Xinqiao (US 20190056264 A1, hereinafter “ Liu’264 ”) . Regarding claim 4 , Liu and WANG combination teaches the stacked light receiving sensor according to claim 1, except wherein the analog circuit includes a comparator and a counter. However, Liu’264 discloses wherein the analog circuit includes a comparator and a counter ( Fig. 4, [0047]: a circuit 432 comprising a comparator 410 and a counter 418 in combination function as a single-slope analog-to-digital converter (ADC) ). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate wherein the analog circuit includes a comparator and a counter as taught by Liu’264 into Liu and WANG combination. The suggestion/ motivation for doing so would be to produce a digital signal ( Liu’264 : [0047]). Regarding claim 11 , Liu and WANG combination teaches the signal processing system according to claim 6, except wherein the analog circuit includes a comparator and a counter. However, Liu’264 discloses wherein the analog circuit includes a comparator and a counter ( Fig. 4, [0047]: a circuit 432 comprising a comparator 410 and a counter 418 in combination function as a single-slope analog-to-digital converter (ADC) ). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate wherein the analog circuit includes a comparator and a counter as taught by Liu’264 into Liu and WANG combination. The suggestion/ motivation for doing so would be to produce a digital signal ( Liu’264 : [0047]). Regarding claim 18 , Method claim 18 is drawn to the method of using the corresponding apparatus claimed in claim 4. Therefore, method claim 18, corresponds to apparatus claim 4, is rejected for the same reasons of obviousness as used above . 07-21-aia AIA Claim s 5, 12 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over the Liu and WANG combination as applied above, in view of Himebaugh et al. (US 20160328642 A1, hereinafter “ Himebaugh ”) . Regarding claim 5 , Liu and WANG combination teaches the stacked light receiving sensor according to claim 1, except wherein the analog circuit further includes a digital-to-analog converter. However, Himebaugh discloses wherein the analog circuit further includes a digital-to-analog converter ( Fig. 4, [0036]: sensors 102, 104 can include analog sensors 104 and/or digital sensors 106. Outputs of the digital sensors 104 may be sent to the analog neural network 106 via a digital-to-analog converter (DAC) 110. ). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate wherein the analog circuit further includes a digital-to-analog converter as taught by Himebaugh into Liu and WANG combination. The suggestion/ motivation for doing so would be to allow transmitting analog neural network via a digital-to-analog converter (DAC) ( Himebaugh : [0036]). Regarding claim 12 , Liu and WANG combination teaches the signal processing system according to claim 6, except wherein the analog circuit further includes a digital-to-analog converter. However, Himebaugh discloses wherein the analog circuit further includes a digital-to-analog converter ( Fig. 4, [0036]: sensors 102, 104 can include analog sensors 104 and/or digital sensors 106. Outputs of the digital sensors 104 may be sent to the analog neural network 106 via a digital-to-analog converter (DAC) 110. ). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate wherein the analog circuit further includes a digital-to-analog converter as taught by Himebaugh into Liu and WANG combination. The suggestion/ motivation for doing so would be to allow transmitting analog neural network via a digital-to-analog converter (DAC) ( Himebaugh : [0036]). Regarding claim 19 , Method claim 19 is drawn to the method of using the corresponding apparatus claimed in claim 5. Therefore, method claim 19, corresponds to apparatus claim 5, is rejected for the same reasons of obviousness as used above. Conclusion 07-40 AIA Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL . See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Contact Any inquiry concerning this communication or earlier communications from the examiner should be directed to ABDELAAZIZ TISSIRE whose telephone number is (571)270-7204. The examiner can normally be reached Monday through Friday from 8 AM to 5 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ye Lin can be reached at 571-272-7372. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ABDELAAZIZ TISSIRE/ Primary Examiner, Art Unit 2638 Application/Control Number: 18/808,536 Page 2 Art Unit: 2638 Application/Control Number: 18/808,536 Page 3 Art Unit: 2638 Application/Control Number: 18/808,536 Page 4 Art Unit: 2638 Application/Control Number: 18/808,536 Page 5 Art Unit: 2638 Application/Control Number: 18/808,536 Page 6 Art Unit: 2638 Application/Control Number: 18/808,536 Page 7 Art Unit: 2638 Application/Control Number: 18/808,536 Page 8 Art Unit: 2638 Application/Control Number: 18/808,536 Page 9 Art Unit: 2638 Application/Control Number: 18/808,536 Page 10 Art Unit: 2638 Application/Control Number: 18/808,536 Page 11 Art Unit: 2638 Application/Control Number: 18/808,536 Page 12 Art Unit: 2638 Application/Control Number: 18/808,536 Page 13 Art Unit: 2638 Application/Control Number: 18/808,536 Page 14 Art Unit: 2638 Application/Control Number: 18/808,536 Page 15 Art Unit: 2638 Application/Control Number: 18/808,536 Page 16 Art Unit: 2638 Application/Control Number: 18/808,536 Page 17 Art Unit: 2638 Application/Control Number: 18/808,536 Page 18 Art Unit: 2638 Application/Control Number: 18/808,536 Page 19 Art Unit: 2638 Application/Control Number: 18/808,536 Page 20 Art Unit: 2638
Read full office action

Prosecution Timeline

Aug 19, 2024
Application Filed
Dec 05, 2025
Non-Final Rejection mailed — §103
Mar 03, 2026
Response Filed
Jun 03, 2026
Final Rejection mailed — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12677056
CAMERA MODULE AND ELECTRONIC DEVICE
1y 11m to grant Granted Jul 07, 2026
Patent 12671888
CAMERA LENS MODULE, CAMERA LENS OPTICAL AXIS ADJUSTING DEVICE, AND BINOCULAR CAMERA
2y 4m to grant Granted Jun 30, 2026
Patent 12671912
IMAGE SENSOR INCLUDING COLOR SEPARATING LENS ARRAY
1y 11m to grant Granted Jun 30, 2026
Patent 12671908
Exposure control method applicable to exposure fusion
1y 7m to grant Granted Jun 30, 2026
Patent 12663698
MODULAR ACTION CAMERA LENS ASSEMBLY AND MOUNTING SYSTEM
2y 11m to grant Granted Jun 23, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

3-4
Expected OA Rounds
84%
Grant Probability
98%
With Interview (+13.6%)
2y 1m (~2m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 709 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month