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Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-18 are pending.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-16 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Kume et al (US20100153602) hereinafter Kume.
As to claim 1, Kume discloses a method of controlling a data processing system including a (Fig. 1, and element 11) master, (Fig. 1, and element 13) a slave, and a bus (Fig. 1, and element 12) provided on a path connecting the master and the slave, the method of controlling the data processing system comprising: performing normal processing which includes transmitting a plurality of command signals from the master to the slave via the bus and transmitting a plurality of response signals for the plurality of command signals from the slave to the master via the bus (Figs. 3 A and B, para. Where master module and slave module are coupled by a bus with key signals that captures the state of the slave, 0044); and performing anomaly avoidance processing to avoid an anomalous state when the slave is anomalous, wherein the performing of the anomaly avoidance processing includes: resetting the slave (Fig. 4, with anomaly prevent circuit 16, and reset circuit 105, para. 0046); and performing a first pseudo response which includes disconnecting communication between the bus and the slave, generating first pseudo response signals corresponding one to one to the plurality of command signals in place of the slave, and transmitting the first pseudo response signals to the master via the bus (Fig. 8, with pseudo-response circuit 203, para. 0055).
As to claim 7, Kume discloses a method of controlling a data processing system including a master, a slave, and a bus provided on a path connecting the master and the slave, the method of controlling the data processing system (Fig. 1 w master 11, bus 12, and slave 13) comprising: performing normal processing which includes transmitting a plurality of command signals from the master to the slave via the bus and transmitting a plurality of response signals for the plurality of command signals from the slave to the master via the bus (Figs. 3 A and B, para. Where master module and slave module are coupled by a bus with key signals that captures the state of the slave, 0044); and performing anomaly avoidance processing to avoid an anomalous state when the slave is anomalous, wherein the performing of the anomaly avoidance processing includes: resetting the slave (Fig. 4, with anomaly prevent circuit 16, and reset circuit 105, para. 0046); performing a first pseudo response which includes disconnecting communication between the bus and the slave, generating first pseudo response signals corresponding one to one to the plurality of command signals in place of the slave, and transmitting the first pseudo response signals toward the master via the bus (Fig. 8, with pseudo-response circuit 203, para. 0055); and performing a second pseudo response which includes generating second pseudo response signals corresponding to the first pseudo response signals and corresponding to the plurality of command signals transmitted from the master after the disconnecting of the communication between the bus and the slave, and transmitting the second pseudo response signals to the master (Fig. 12 illustrates a plurality of independent prevent/salve modules that would have their plurality of disconnection responses with the master, para. 0102).
As to claim 13, Kume discloses a data processing system comprising: a master (Fig. 1, and module 11); a slave (Fig. 1, and module 13); a bus provided on a path connecting the master and the slave (Fig. 1, and module 12); and a first transfer cancellation section (Fig. 2, and module 16) provided on a path connecting the bus and the slave (Fig. 2, and bus between module 16, and module 13), wherein the master transmits a plurality of command signals to the slave via the bus and the first transfer cancellation section, the slave transmits a plurality of response signals for the plurality of command signals to the master via the first transfer cancellation section and the bus, (Figs. 3 A and B, where master module and slave module are coupled by a bus with key signals that captures the state of the slave, para. 0044) and when the slave is anomalous: the slave performs a reset process (Fig. 4, with anomaly prevent circuit 16, and reset circuit 105, para. 0046); and the first transfer cancellation section disconnects communication with the slave, generates first pseudo response signals corresponding one to one to the plurality of command signals in place of the slave, and transmits the first pseudo response signals to the master via the bus (Fig. 12 illustrates a plurality of independent prevent/salve modules that would have their plurality of disconnection responses with the master, para. 0102).
As to claim 2, Kume discloses the method of controlling the data processing system, wherein the first pseudo response signals are same in signal format as the plurality of response signals transmitted from the slave to the master via the bus in the performing of the normal processing (Fig. 8 with signals such as S05 and S04 produced via a mux, para. 0056).
As to claims 3, and 14, Kume discloses the method of controlling the data processing system, wherein the performing of the first pseudo response includes: generating a first subset including each of the first pseudo response signals corresponding to a command signal which has been transmitted to the slave among the plurality of command signals (Fig. 6 where hang up counter and ready signals are a subset of commands from master module, para. 0082); and generating a second subset including each of the first pseudo response signals corresponding to a command signal which has not been transmitted to the slave among the plurality of command signals (Fig. 6, and the response signal from the slave, para. 0066).
As to claims 4, and 15, Kume discloses the method of controlling the data processing system, wherein the performing of the anomaly avoidance processing ends after: the resetting of the slave has ended (Fig. 9, and reset signal foes high, S15); all of the first pseudo response signals for the plurality of command signals have been transmitted in the performing of the first pseudo response (Fig. 9, and paras. 0083 – 0085 showing all signals engagement); and all of processing tasks related to processing details that the master was processing when the slave became anomalous have been completed (Fig. 9, and para. 0086).
As to claims 5, and 16, Kume discloses the method of controlling the data processing system, wherein the data processing system further includes an other slave that is connected to the master via the bus and is different from the slave, and when the performing of the anomaly avoidance processing of the slave is being executed (Fig. 7 illustrates a second embodiment with a plurality of slave modules 13): the master transmits another command signal different from the plurality of command signals to the other slave via the bus (Fig.10, and para. 0091); and the other slave transmits a response signal for the other command signal to the master via the bus (Fig. 10, and para. 0095, where a plurality of slave modules would respond according to its state).
As to claim 6, Kume discloses the method of controlling the data processing system, wherein the data processing system includes a plurality of slaves each being the slave, and the performing of the anomaly avoidance processing is executed for only a slave in which an anomaly has occurred among the plurality of slaves (Fig. 12, where each slave have an independent prevention module, para. 0102).
As to claim 8, Kume discloses the method of controlling the data processing system, (Fig. 12 with a plurality of prevent/slave independent modules, para. 0102) wherein the second pseudo response signals are same in signal format as the plurality of response signals transmitted from the slave to the master via the bus in the performing of the normal processing (Fig. 8 with signals such as S05 and S04 produced via a mux, para. 0056).
As to claim 9, Kume discloses the method of controlling the data processing system, wherein the performing of the second pseudo response includes: generating a first subset including each of the second pseudo response signals corresponding to a command signal which has been transmitted to the bus but for which no response signal has been transmitted to the master among the plurality of command signals (Fig. 6, where hang up counter and ready signals are a subset of commands from master module, para. 0082, and no response is delivered in the time threshold);
and generating a second subset including each of the second pseudo response signals corresponding to a command signal that has not been transmitted to the bus among the plurality of command signals (Fig. 6, and the response signal from the slave, para. 0066).
As to claim 10, Kume discloses the method of controlling the data processing system, wherein at least a portion of each of the second pseudo response signals is generated based on a corresponding one of the first pseudo response signals (Fig. 9, and para. 0083, as the prevent/slave module pairs of Fig. 12 performs similar).
As to claim 11, Kume discloses the method of controlling the data processing system, wherein the second pseudo response signals include a signal generated without using the first pseudo response signals (Fig. 12, and para. 0103).
As to claim 12, Kume discloses the method of controlling the data processing system, wherein the performing of the anomaly avoidance processing ends as a result of an end of the resetting of the slave and an end of the performing of the first pseudo response (Fig. 12, and hazard monitor 20 comprises the full results and when all issues are fixed, para. 0104).
Allowable Subject Matter
Claims 17, and 18 are allowed.
The following is an examiner’s statement of reasons for allowance: Independent claim 17 and its dependents thereof are allowed because the prior art either alone or in combination fail to anticipate or render obvious, the claimed limitation of
“the first transfer cancellation section disconnects communication with the slave, generates first pseudo response signals corresponding one to one to the plurality of command signals in place of the slave, and transmits the first pseudo response signals to the second transfer cancellation section via the bus; and the second transfer cancellation section generates second pseudo response signals corresponding to the first pseudo response signals and corresponding to the plurality of command signals transmitted from the master after the communication with the slave has been disconnected, and transmits the second pseudo response signals to the master.”
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. U9665528, US20050081115, and US10579581 among others teach the management of connection between a master and slave devices.
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/C.A.D/ Examiner, Art Unit 2184
/HENRY TSAI/ Supervisory Patent Examiner, Art Unit 2184