DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This Office Action is in response to amendments and remarks filed May 18, 2026. Claim 1-20 are currently pending. Claim 20 is currently withdrawn from consideration as being drawn to non-elected invention II.
Election/Restrictions
Applicant’s election without traverse of Invention I (claims 1-19) in the reply filed on May 18, 2026 is acknowledged.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-19 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No.12100723. Although the claims at issue are not identical, they are not patentably distinct from each other because the inventive concept of the image sensor structure and forming of the image sensor structure including an image stack, optical filter stack and nanowell layer as described in the claims is taught both by the present application and US patent 12100723.
In regards to claim 1, 12100723 teaches an image sensor structure (claims 1-16), comprising: an image stack disposed over a device stack, the image stack comprising a plurality of light detectors (claim 1, lines 2-3); a first optical filter stack disposed over the image stack, the first optical filter stack comprising: a light guide layer, light pipe cavities disposed in the light guide layer, each light pipe cavity associated with a light detector in the plurality of light detectors, and optical filter material disposed in the light pipe cavities, the optical filter material being in direct contact with the light guide layer at the sidewalls of the light pipe cavities (claim 1, lines 4-11, claim 3); a nanowell layer disposed over the first optical filter stack; and a plurality of nanowells disposed in the nanowell layer, each nanowell associated with a light detector in the plurality of light detectors (claim 1, lines 12-23).
Claims 2-10 are either read upon by claims 1-16 or obvious variants of the claims.
In regards to claim 11, 12100723 teaches a method of forming an image sensor structure (claims 1-20), the method comprising: disposing an image stack over a device stack, the image stack comprising a plurality of light detectors; disposing a first optical filter stack over the image stack (claim 17, lines 3-4, claim 1), the first optical filter stack comprising: a light guide layer, light pipe cavities disposed in the light guide layer, each light pipe cavity associated with a light detector in the plurality of light detectors, and optical filter material disposed in the light pipe cavities, the optical filter material being in direct contact with the light guide layer at the sidewalls of the light pipe cavities (claim 17, lines 5-11, claim 1, claim 3); disposing a nanowell layer over the first optical filter stack; and disposing a plurality of nanowells in the nanowell layer, each nanowell associated with a light detector in the plurality of light detectors (claim 17 and claim 1).
Claims 12-19 are either read upon by claims 1-20 or obvious variants of the claims.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 2, 11 and 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Vaartstra (US 20150056097) in view of Chung et al. (US 20170016830).
Re claims 1 and 11: Vaartstra teaches an image sensor structure and method of forming the image sensor structure (fig. 3-5), comprising: an image stack (42) disposed over a device stack (44/34), the image stack (42) comprising a plurality of light detectors (34) (see fig. 3-5, paragraph 21); a first optical filter stack (44/46/48) disposed over the image stack (42), the first optical filter stack (44/46/48) comprising: a light guide layer (44/48), light pipe cavities (46) disposed in the light guide layer (44/48), each light pipe cavity (46) associated with a light detector (34) in the plurality of light detectors (34), and optical filter material disposed in the light pipe cavities (46), the optical filter material being in direct contact with the light guide layer at the sidewalls of the light pipe cavities (46) (see fig. 3-5, the light cavities are formed in 48 filled with optical filter 46, the filter 46 is in contact with walls 48, paragraphs 24-25, the region where the color filters are located functions as a waveguide); a well layer (52/50) disposed over the first optical filter stack (44/48/46) (see fig. 3-5); and a plurality of wells (openings in 52 of 50/52 forming wells) disposed in the well layer (50/52), each well associated with a light detector (34) in the plurality of light detectors (34) (see fig. 3-5), but does not specifically teach the well layer is a nanowell layer. Chung teaches a nanowell layer (300) disposed over a first optical filter stack (310) (see fig. 1); and a plurality of nanowells (300) disposed in the nanowell layer (300), each nanowell (300) associated with a light detector (10) in the plurality of light detectors (10) (see fig. 1). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to use the nanowell layer of Chung over the optical filter stack of Vaartstra in order to better isolate cells in individual wells allowing for more accurate measurements of individual cells.
Re claims 2 and 12: Vaartstra as modified by Chung teaches the image sensor structure, wherein the light guide layer comprises one of a polymer material, a semiconductor material and a dielectric material (Vaartstra, 48 is an oxide, paragraph 25).
Claim(s) 3, 8 and 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Vaartstra (US 20150056097) as modified by Chung et al. (US 20170016830) as applied to claim 1, 2 and 11 above, and further in view of Eltoukhy et al. (US 20150079596).
Re claims 3 and 13: Vaartstra as modified by Chung teaches the first optical filter stack (Vaartstra, 44/46/48) comprising: the light guide layer (Vaartstra, 44/48), the light pipe cavities (Vaartstra, 46) disposed in the light guide layer (Vaartstra, 44/48, fig. 3-5), but does not specifically teach the light guide layer being disposed over an intermediate layer; wherein the light guide layer is a metal layer that is disposed on the sidewalls of the light pipe cavities and is not disposed on the bottom surface of the light pipe cavities; and wherein the light guide layer has a thickness of about 100 nanometers or less. Eltoukhy teaches a light guide layer (566) being disposed over an intermediate layer (562) (see fig. 29); wherein the light guide layer (566) is a metal layer that is disposed on the sidewalls of light pipe cavities (region where 540 is located) and is not disposed on the bottom surface of the light pipe cavities (region where 540 is located) (see fig. 29, the light guide layer covers the sidewalls but not disposed at bottom of region where 540 is located where light enters light sensor 536A); and wherein the light guide layer (566) has a thickness of about 100 nanometers or less (paragraph 143, the thickness T3 is 600 angstrom or less, so 60 nm or less). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to have the light guide layer of Vaartstra as modified by Chung be the intermediate layer with a reflective light guide layer of a desired thickness coating the sidewalls similar to Eltoukhy in order to ensure light from the specific nanowell is guided through the specific optical filter in the light cavity reducing crosstalk between light capture for each nanowell providing for more accurate readings.
Re claim 8: Vaartstra as modified by Chung teaches the first optical filter stack (Vaartstra, 44/46/48) comprising: the light guide layer (Vaartstra, 44/48), the light pipe cavities (Vaartstra, 46) disposed in the light guide layer (Vaartstra, 44/48, fig. 3-5), but does not specifically teach each light pipe cavity having an aspect ratio that is greater than about 2.5 to about 1. Eltoukhy teaches each light pipe cavity having an aspect ratio that is greater than about 2.5 to about 1 (paragraph 195). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to have each light cavity cavity having an aspect ratio that is greater than about 2.5 to about 1 similar to Eltoukhy with the light cavity of Vaartstra as modified by Chung in order to ensure that light from the nanowell passes to the light detector reducing crosstalk between light detectors and increasing the amount to the desired light detector providing for compact design with more efficient and accurate light detection.
Claim(s) 4, 5, 14 and 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Vaartstra (US 20150056097) as modified by Chung et al. (US 20170016830) and Eltoukhy et al. (US 20150079596) as applied to claim 3 and 13 above, and further in view of Chen et al. (US 20110127619) and Velichko (US 20130200251).
Re claims 4 and 14: Vaartstra as modified by Chung and Eltoukhy teaches the image stack (Vaartstra, 42) comprising a plurality of light detectors (Vaartstra, 34, see fig. 3-5, paragraph 21), but does not specifically teach the image stack comprises: a substrate layer disposed over the plurality of light detectors, the substrate layer operative to pass emissive light and excitation light; a plurality of isolation trenches disposed in the substrate layer, each isolation trench disposed adjacent a light detector in the plurality of light detectors; and a dielectric material disposed in each isolation trench, the dielectric material operative to electrically isolate each light detector in the plurality of light detectors. Chen teaches an image stack (302/304/306) (fig. 10) comprises: a substrate layer (302) disposed over a plurality of light detectors (306), the substrate layer (302) operative to pass emissive light and excitation light (see fig. 10); a plurality of isolation trenches (304) disposed in the substrate layer (302), each isolation trench disposed adjacent a light detector in the plurality of light detectors (306) (see fig. 10). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to include a substrate layer with isolation regions over the plurality of light detectors in Vaartstra as modified by Chung and Eltoukhy similar to Chen in order to further reduce cross talk between adjacent light detectors improving light detection and measurements. Vaartstra as modified by Chung, Eltoukhy and Chen does not specifically teach a dielectric material disposed in each isolation trench, the dielectric material operative to electrically isolate each light detector in the plurality of light detectors. Velichko teaches dielectric material disposed in each isolation trench (36), the dielectric material operative to electrically isolate each light detector in a plurality of light detectors (fig. 3, paragraph 30, silicon dioxide for electrically and optically reducing cross talk). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to include fill the isolation regions in Vaartstra as modified by Chung, Eltoukhy and Chen with dielectric material similar to Velichko in order to further reduce cross talk between adjacent light detectors improving light detection and measurements.
Re claims 5 and 15: Vaartstra as modified by Chung, Eltoukhy, Chen and Velichko teaches the image sensor structure, wherein the intermediate layer disposed in the first optical filter stack and the substrate layer disposed in the image stack are comprised of the same material (Chen, the intermediate layer and substrate 302 is made of the same material, see fig. 10).
Claim(s) 9 and 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Vaartstra (US 20150056097) as modified by Chung et al. (US 20170016830) as applied to claim 2 and 12 above, and further in view of Chen et al. (US 20110127619) and Velichko (US 20130200251).
Re claims 9 and 18: Vaartstra as modified by Chung teaches the image stack (Vaartstra, 42) comprising a plurality of light detectors (Vaartstra, 34, see fig. 3-5, paragraph 21), but does not specifically teach the image stack comprises: a substrate layer disposed over the plurality of light detectors, the substrate layer operative to pass emissive light and excitation light; a plurality of isolation trenches disposed in the substrate layer, each isolation trench disposed adjacent a light detector in the plurality of light detectors; and a dielectric material disposed in each isolation trench, the dielectric material operative to electrically isolate each light detector in the plurality of light detectors. Chen teaches an image stack (302/304/306) (fig. 10) comprises: a substrate layer (302) disposed over a plurality of light detectors (306), the substrate layer (302) operative to pass emissive light and excitation light (see fig. 10); a plurality of isolation trenches (304) disposed in the substrate layer (302), each isolation trench disposed adjacent a light detector in the plurality of light detectors (306) (see fig. 10). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to include a substrate layer with isolation regions over the plurality of light detectors in Vaartstra as modified by Chung similar to Chen in order to further reduce cross talk between adjacent light detectors improving light detection and measurements. Vaartstra as modified by Chung and Chen does not specifically teach a dielectric material disposed in each isolation trench, the dielectric material operative to electrically isolate each light detector in the plurality of light detectors. Velichko teaches dielectric material disposed in each isolation trench (36), the dielectric material operative to electrically isolate each light detector in a plurality of light detectors (fig. 3, paragraph 30, silicon dioxide for electrically and optically reducing cross talk). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to include fill the isolation regions in Vaartstra as modified by Chung and Chen with dielectric material similar to Velichko in order to further reduce cross talk between adjacent light detectors improving light detection and measurements.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JENNIFER D BENNETT whose telephone number is (571)270-3419. The examiner can normally be reached 9AM-6PM EST M-F.
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/JENNIFER D BENNETT/ Examiner, Art Unit 2878
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