DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
A rejection based on double patenting of the “same invention” type finds its support in the language of 35 U.S.C. 101 which states that “whoever invents or discovers any new and useful process... may obtain a patent therefor...” (Emphasis added). Thus, the term “same invention,” in this context, means an invention drawn to identical subject matter. See Miller v. Eagle Mfg. Co., 151 U.S. 186 (1894); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Ockert, 245 F.2d 467, 114 USPQ 330 (CCPA 1957).
A statutory type (35 U.S.C. 101) double patenting rejection can be overcome by canceling or amending the claims that are directed to the same invention so they are no longer coextensive in scope. The filing of a terminal disclaimer cannot overcome a double patenting rejection based upon 35 U.S.C. 101.
Claim [1] is/are rejected under 35 U.S.C. 101 as claiming the same invention as that of claim [1] of prior U.S. Patent No. [12,094,910]. This is a statutory double patenting rejection.
The following is the table shoeing the conflicting claims.
US. 18/809,689
US. PAT. No. 12, 094, 910
1. An imaging element comprising: a first substrate provided with (i) a photoelectric conversion portion, which is configured to photoelectrically convert light and generate charge, and (ii) a readout circuit configured to output a signal based on the charge generated by the photoelectric conversion portion; a second substrate laminated on the first substrate and provided with a processing portion configured to process the signal output from the readout circuit; and a connection portion (i) provided with a bent portion, which bends in a direction other than a laminating direction in which the first substrate and the second substrate are laminated, and (ii) configured to electrically connect the readout circuit to the processing portion, wherein the connection portion includes a first wiring portion provided on a side of the first substrate, a second wiring portion provided on a side of the second substrate, and a bonding portion configured to bond the first wiring portion and the second wiring portion, and the bent portion is provided on a side closer to the bonding portion than to the first substrate and the second substrate.
1. An imaging element comprising: a first substrate provided with (i) a photoelectric conversion portion, which is configured to photoelectrically convert light and generate charge, and (ii) a readout circuit configured to output a signal based on the charge generated by the photoelectric conversion portion; a second substrate laminated on the first substrate and provided with a processing portion configured to process the signal output from the readout circuit; and a connection portion (i) provided with a bent portion, which bends in a direction other than a laminating direction in which the first substrate and the second substrate are laminated, and (ii) configured to electrically connect the readout circuit to the processing portion, wherein the connection portion includes a first wiring portion provided on a side of the first substrate, a second wiring portion provided on a side of the second substrate, and a bonding portion configured to bond the first wiring portion and the second wiring portion, and the bent portion is provided on a side closer to the bonding portion than to the first substrate and the second substrate.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Kitano (US. Pat. No. 12, 183, 757) discloses: FIG. 3 schematically illustrates a cross-sectional configuration of the first substrate 100, the second substrate 200, and the third substrate 300 that are stacked on each other. FIG. 3 corresponds to a cross-sectional configuration taken along a line illustrated in FIG. 2. The imaging device 1 is an imaging device having a three-dimensional structure in which three substrates (the first substrate 100, the second substrate 200, and the third substrate 300) are bonded together. The first substrate 100 includes a semiconductor layer 100S and a wiring layer 100T. The second substrate 200 includes a semiconductor layer 200S and a wiring layer 200T. The third substrate 300 includes a semiconductor layer 300S and a wiring layer 300T. In 60-6
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/AHMED A BERHAN/Primary Examiner, Art Unit 2639